(19)
(11)EP 2 503 346 A3

(12)EUROPEAN PATENT APPLICATION

(88)Date of publication A3:
20.11.2013 Bulletin 2013/47

(43)Date of publication A2:
26.09.2012 Bulletin 2012/39

(21)Application number: 12160380.7

(22)Date of filing:  20.03.2012
(27)Previously filed application:
 24.03.2011 US 201113071025
(51)Int. Cl.: 
G01R 31/30  (2006.01)
(84)Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated Extension States:
BA ME

(30)Priority: 24.03.2011 US 201113071025

(71)Applicant: FREESCALE SEMICONDUCTOR, INC.
Austin, TX 78735 (US)

(72)Inventor:
  • Edwards, William E.
    Ann Arbor, MI Michigan 48103 (US)

(74)Representative: Ferro, Frodo Nunes 
Optimus Patent Limited Grove House, Lutyens Close Chineham Court
Basingstoke, Hampshire RG24 8AG
Basingstoke, Hampshire RG24 8AG (GB)

  


(54)Selectable threshold reset circuit


(57) A low voltage testing circuit (125), system (100 and 200), and method for performing low-voltage testing of a circuit (127) in an integrated circuit package (104 and 204) include a selectable threshold reset circuit (125) that includes a voltage-divider ladder (320) that produces a voltage that is a fraction of a power supply voltage, a comparator (310) that compares the fraction with a reference voltage, a switch (350) that controls topology of the voltage-divider ladder thereby changing a value of the fraction, the switch controlled by a signal from a production tester (102 and 202), the signal causing a reset threshold of the selectable threshold reset circuit to be reduced below a normal reset threshold to allow testing of the circuit at a power supply voltage below the normal reset threshold.