(19)
(11)EP 0 992 887 A3

(12)EUROPEAN PATENT APPLICATION

(88)Date of publication A3:
29.01.2003 Bulletin 2003/05

(43)Date of publication A2:
12.04.2000 Bulletin 2000/15

(21)Application number: 99400555.1

(22)Date of filing:  08.03.1999
(51)International Patent Classification (IPC)7G06F 9/318, G06F 9/30
(84)Designated Contracting States:
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
Designated Extension States:
AL LT LV MK RO SI

(30)Priority: 06.10.1998 EP 98402455

(71)Applicants:
  • TEXAS INSTRUMENTS INC.
    Dallas, Texas 75243 (US)
    Designated Contracting States:
    BE CH DE DK ES FI GB GR IE IT LI LU MC SE AT CY 
  • TEXAS INSTRUMENTS FRANCE
    06271 Villeneuve Loubet Cédex (FR)
    Designated Contracting States:
    FR 

(72)Inventor:
  • Laurenti, Gilbert (nmi)
    06570 Saint Paul de Vence (FR)

(74)Representative: Potter, Julian Mark et al
D. Young & Co., 21 New Fetter Lane
London EC4A 1DA
London EC4A 1DA (GB)

  


(54)Memory access using byte qualifiers


(57) A processor (100) is provided that is a programmable digital signal processor (DSP) with variable instruction length, offering both high code density and easy programming. Architecture and instruction set are optimized for low power consumption and high efficiency execution of DSP algorithms, such as for wireless telephones, as well as pure control tasks. An instruction (1003) is decoded and accesses a data item in accordance with an address field (1003a). Another instruction (1002) is decoded and accesses a data item in accordance with an address field (1002a); but in a different manner due to an instruction qualifier (1002b). The instruction qualifier is executed in an implicitly parallel manner with the qualified instruction (1002).





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