(19)
(11)EP 2 887 383 B1

(12)EUROPEAN PATENT SPECIFICATION

(45)Mention of the grant of the patent:
25.03.2020 Bulletin 2020/13

(21)Application number: 13863262.5

(22)Date of filing:  07.11.2013
(51)International Patent Classification (IPC): 
H01L 21/02(2006.01)
H01L 21/762(2006.01)
H01L 27/12(2006.01)
H01L 21/265(2006.01)
(86)International application number:
PCT/JP2013/006560
(87)International publication number:
WO 2014/091670 (19.06.2014 Gazette  2014/25)

(54)

SOI WAFER MANUFACTURING METHOD

VERFAHREN ZUR HERSTELLUNG EINES SOI-WAFERS

PROCÉDÉ DE FABRICATION DE TRANCHE SOI


(84)Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

(30)Priority: 14.12.2012 JP 2012274110

(43)Date of publication of application:
24.06.2015 Bulletin 2015/26

(73)Proprietor: Shin-Etsu Handotai Co., Ltd.
Tokyo (JP)

(72)Inventors:
  • AGA, Hiroji
    Annaka-shi Gunma 379-0196 (JP)
  • YOKOKAWA, Isao
    Annaka-shi Gunma 379-0196 (JP)
  • ISHIZUKA, Toru
    Annaka-shi Gunma 379-0196 (JP)

(74)Representative: Wibbelmann, Jobst 
Wuesthoff & Wuesthoff Patentanwälte PartG mbB Schweigerstrasse 2
81541 München
81541 München (DE)


(56)References cited: : 
EP-A1- 1 855 309
JP-A- H 098 124
JP-A- 2004 221 198
JP-A- 2008 300 435
US-A1- 2011 039 395
WO-A2-2012/012138
JP-A- 2003 347 176
JP-A- 2006 270 039
US-A1- 2008 318 394
  
      
    Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


    Description

    TECHNICAL FIELD



    [0001] The present invention relates to a method for manufacturing an SOI wafer by the ion implantation delamination method.

    BACKGROUND ART



    [0002] In manufacture of an SOI wafer by the ion implantation delamination method, when a bond wafer for forming an SOI layer (Silicon On Insulator layer, or Semiconductor On Insulator in a broad sense) and a base wafer are bonded through an oxide film, and then subjected to a heat treatment (a delamination heat treatment) to perform a delamination at an ion-implanted layer, the wafers just after delamination are taken out from a heat treatment furnace with which the delamination heat treatment has been performed in a state that an SOI layer surface (a delaminating plane) of the SOI wafer faces to a surface (a delaminating plane) of the bond wafer (See Patent Document 1, etc.).

    [0003] When a bond wafer on which an oxide film has been formed and a base wafer are bonded to manufacture an SOI wafer, the SOI wafer warps in a convex shape on the delaminating plane side due to a buried oxide film which has been transferred from a surface of the bond wafer by the delamination heat treatment, whereas the bond wafer after delamination warps in a concave shape on the delaminating plane side in contrast to the SOI wafer because the front surface oxide film is separated and the oxide film remains only on the back surface. Although a magnitude of the warpage is determined depending on a thickness of the transferred oxide film, a contact between the SOI wafer and the bond wafer after delamination hardly occurs because magnitudes of the warpages of these wafers are almost the same.

    [0004] In practice, however, there is also the influence of a warp shape formed during wafer processing. Therefore, for example, if the bond wafer warps convexly during wafer processing, the bond wafer after delamination is formed into a shape obtained by subtracting the convex shape formed during the wafer processing from the concave shape due to the influence of the back surface oxide film.

    [0005] In this case, a mismatch in warp shape between the SOI wafer and the bond wafer after delamination is caused. More specifically, a magnitude of the concave warp of the bond wafer after delamination becomes small compared with a magnitude of the convex warp of the SOI wafer.

    [0006] In addition, in the ion implantation delamination method by the so-called coimplantation in which the ion implantation is performed by implanting two types of ion, for example, a hydrogen ion and a helium ion to form an ion-implanted layer at which delamination is caused, if the helium ion is implanted more deeply than the hydrogen ion, a helium ion-implanted layer remains in the bond wafer still after delamination while a hydrogen ion-implanted layer is divided into an SOI side and the bond wafer after delamination because the delamination is caused at the hydrogen ion-implanted layer. In this case, warping force by which the bond wafer after delamination is warped so as to have a convex shape operates on the bond wafer after delamination by existence of the helium ion-implanted layer, thereby causing the mismatch in warp shape with the SOI wafer.

    CITATION LIST


    PATENT LITERATURE



    [0007] Patent Document 1: Japanese Unexamined Patent publication (Kokai) No. 2009-283582

    [0008] US 2008/0318394 A1 discloses a method for manufacturing a bond substrate by the ion implantation delamination method. A single crystal semiconductor substrate and the substrate having an insulating surface (a base wafer) are bonded, and heat treatment is performed after the bonding and then the separation is performed at a damage region formed by the ion implantation.

    SUMMARY OF INVENTION


    TECHNICAL PROBLEM



    [0009] The present inventors keenly conducted studies the above-mentioned method for manufacturing an SOI wafer by the ion implantation delamination method, and consequently found that, in the manufactured SOI wafer, SOI film thickness abnormalities in which a portion having a thin SOI film thickness is generated at a center portion of the SOI wafer are caused, and scratches occur at the thin film portion as shown in FIG. 4.

    [0010] The present invention was accomplished in view of the above-described problems. It is an object of the present invention to provide a method for manufacturing an SOI wafer that can inhibit scratches and SOI film thickness abnormalities.

    SOLUTION TO PROBLEM



    [0011] To achieve this object, the present invention provides a method for manufacturing an SOI wafer, comprising: implanting one or more gas ion selected from a hydrogen ion and a rare gas ion into a bond wafer from a surface of the bond wafer to form an ion-implanted layer; the bond wafer being a silicon single crystal wafer on which an oxide film has been formed; bonding the surface from which the ion is implanted into the bond wafer and a surface of a base wafer through the oxide film, the base wafer being a silicon single crystal wafer or a silicon single crystal wafer on which an insulator film has been formed; and then delaminating the bond wafer at the ion-implanted layer by performing a delamination heat treatment with a heat treatment furnace to form the SOI wafer, wherein after the delamination heat treatment, a temperature of the heat treatment furnace is decreased to 250°C or less at temperature-decreasing rate of less than 3.0°C/min, and then the SOI wafer and the bond wafer after delamination are taken out from the heat treatment furnace.

    [0012] In the present invention, first of all, the temperature inside the heat treatment furnace during taking out the SOI wafer and the bond wafer of 250°C or less enables the formation of an oxide film during taking out the wafers to be inhibited. Even if a tip part of the convex shape of the SOI wafer is in contact with the bond wafer after delamination because of the mismatch, the occurrence of the conventional film thickness abnormalities at the tip part of the convex shape of the SOI wafer can be inhibited since the formation of the oxide film during taking out the wafers is inhibited on all surfaces of the wafer from the beginning.

    [0013]  Moreover, in the present invention, the temperature-decreasing rate of less than 3.0°C/min enables a temperature distribution of the wafer surface to be small during decreasing the temperature, so that a deformation of the wafer due to the temperature distribution can be reduced. Therefore, the occurrence of scratches of the SOI wafer can be inhibited.

    [0014] Thus, the present invention enables an SOI wafer in which scratches and SOI film thickness abnormalities are inhibited to be obtained.

    [0015] In the method, a semiconductor single crystal substrate having a front surface oxide film and a back surface oxide film may be prepared as the bond wafer for forming the ion-implanted layer to implant the ion through the front surface oxide film, the back surface oxide film being thicker than the front surface oxide film.

    [0016] In this manner, the bond wafer after delamination is formed into a concave shape by a difference in film thickness among the oxide films, therefore the mismatch in warp shape between the SOI wafer and the bond wafer after delamination can be prevented, and the occurrence of scratches and SOI film thickness abnormalities due to the contact can be more greatly inhibited.

    [0017] Moreover, a wafer may be used as the semiconductor single crystal substrate having the back surface oxide film thicker than the front surface oxide film, the wafer being manufactured by forming a thermal oxide film on all surfaces of a semiconductor single crystal substrate, then removing a portion of the thermal oxide film on a front surface side to obtain a semiconductor single crystal substrate having the thermal oxide film only on a back surface side thereof, and thermally oxidizing the semiconductor single crystal substrate having the thermal oxide film only on the back surface side.

    [0018] In this manner, the difference in film thickness between the oxide film on the front surface that will become a surface to be bonded and the oxide film on the back surface can be appropriately adjusted.

    [0019] Moreover, before the semiconductor single crystal substrate having the thermal oxide film only on the back surface side is thermally oxidized, the front surface side on which the portion of the thermal oxide film has been removed may be polished.

    [0020] In this manner, failures during bonding can be inhibited.

    [0021] Moreover, a wafer manufactured by subjecting the bond wafer delaminated at the ion-implanted layer to a reclaiming process may be used as the semiconductor single crystal substrate having the back surface oxide film thicker than the front surface oxide film.

    [0022] In this manner, an SOI wafer can be manufactured economically.

    [0023] In the method, the reclaiming process may be performed without removing the back surface oxide film of the delaminated bond wafer.

    [0024] In this manner, it is easy to adjust the difference in film thickness among the oxide films of the bond wafer.

    [0025] Moreover, the ion implantation may be performed by a coimplantation of a hydrogen ion and a helium ion such that the helium ion is implanted more deeply than the hydrogen ion.

    [0026] The present invention can suppress the influence on warping of the bond wafer after delamination due to existence of the helium ion-implanted layer, and thereby prevent the mismatch in warp shape between the SOI wafer and the bond wafer after delamination, even if the helium ion is implanted more deeply than the hydrogen ion.

    ADVANTAGEOUS EFFECTS OF INVENTION



    [0027] As described above, the present invention can prevent the contact between the SOI wafer and the bond wafer after delamination due to the mismatch in relation to the delamination heat treatment in the ion implantation delamination method. In addition to this, a formation irregularity of the oxide film during taking out the wafers from the heat treatment furnace can be prevented even if the mismatch is caused. In this way, the occurrence of scratches and SOI film thickness abnormalities at the tip part of the convex shape of the SOI wafer can be inhibited.

    BRIEF DESCRIPTION OF DRAWINGS



    [0028] 

    FIG. 1 is a flow chart of an example of the inventive method for manufacturing an SOI wafer;

    FIG. 2 is a flow chart of an another example of the inventive method for manufacturing an SOI wafer;

    FIGS. 3 are diagrams showing measurement results of SOI film thickness distributions of Example 1 and Comparative examples 3 to 5; and

    FIG. 4 is a measurement diagram showing scratches and SOI film thickness abnormalities generated at a center portion of the SOI wafer.


    DESCRIPTION OF EMBODIMENTS



    [0029] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings, but the present invention is not limited thereto.

    [0030] The background of how the present inventors accomplished the present invention will now be described in detail.

    [0031] The present inventors found that, in the delamination heat treatment of the ion implantation delamination method for manufacturing an SOI wafer, if a magnitude of the concave shape of the bond wafer after delamination (the delaminated bond wafer) is smaller than that of the convex shape of the SOI wafer, a mismatch in warp shape is caused between the delaminated bond wafer and the SOI wafer, a tip part of the convex shape of the SOI layer surface is thereby brought into contact with the delaminated bond wafer in the delamination heat treatment process, and scratches and SOI film thickness abnormalities are likely to occur at a center portion of the SOI wafer and the like.

    [0032] In the case of bonding with the bond wafer on which a thermal oxide film has been formed, the SOI wafer warps convexly toward the delaminating plane side in proportion to the film thickness of the buried oxide film. On the other hand, in the delaminated bond wafer, the delaminating plane side warps concavely by action of the oxide film on the back surface because the oxide film on the front surface is separated by the delamination.

    [0033] As described above, a magnitude of the convex shape of the SOI wafer is usually equal to a magnitude of the concave shape of the delaminated bond wafer, so that the tip part of the convex shape of the SOI wafer is hardly in contact with the delaminated bond wafer.

    [0034] However, the above-mentioned mismatch possibly occurs, for example, by the influence of a warp shape formed in wafer processing.

    [0035] First, the present inventors investigated a mechanism of causing film thickness abnormalities.

    [0036] As a result, they found that the formation of an oxide film is inhibited at a contact portion in which the tip part of the convex shape of the SOI layer surface is in contact with the delaminated bond wafer, compared with a portion not in contact with the same. In this case, a thickness of the oxide film formed on the contact portion becomes thinner, and Si etching is started from the contact portion in SC1 cleaning of RCA cleaning (a cleaning with a mixed aqueous solution of NH4OH and H2O2) after delamination. Thus, it was revealed that the SOI film thickness of the tip part of the convex shape is reduced after cleaning.

    [0037] Then, a method is devised in which after the delamination heat treatment with a heat treatment furnace, the take-out temperature inside the heat treatment furnace is set at 250°C or less to inhibit the formation of an oxide film on the SOI wafer surface in order to improve non-uniformity in thickness of the oxide film to be formed on the SOI layer surface after delamination. If the wafers are taken out from the furnace at a temperature exceeded 250°C, an oxide film is formed on the SOI wafer surface by oxygen contained in air. Therefore, non-uniformity in oxide film thickness between the wafer contact portion and the noncontact portion is caused.

    [0038] The take-out temperature of 250°C or less can inhibit the oxide film from being formed on the surface during taking out the wafers from the beginning, thereby minimize an oxide film thickness distribution of the wafer surface. Si etching is therefore performed uniformly in a plane in the subsequent SC1 cleaning, and the occurrence of the conventional film thickness abnormalities can be inhibited.

    [0039] In addition, as for scratches, the temperature-decreasing rate of less than 3.0°C/min at which the temperature is decreased to the take-out temperature of 250°C or less after the SOI layer is delaminated in the delamination heat treatment (for example, at from 400 to 600°C) can minimize a temperature distribution of the wafer surface during decreasing the temperature, and inhibit scratching of the SOI wafer and the delaminated bond wafer due to a deformation of the wafer. If the temperature-decreasing rate is 3.0°C/min or more, a radial temperature distribution during decreasing the temperature is increased, and scratches easily occur because the wafer is deformed by a difference in thermal expansion coefficients.

    [0040] The present inventors found the foregoing, thereby brought the present invention to completion.

    [0041] Hereinafter, the inventive method for manufacturing an SOI wafer will be described in detail.

    (First embodiment)



    [0042] FIG. 1 shows an example of the inventive method for manufacturing an SOI wafer.

    [0043] First, a semiconductor single crystal substrate 2 is prepared as the bond wafer 1 to form an oxide film 3 (FIG. 1 at (A)).

    [0044] The semiconductor single crystal substrate used as the bond wafer is a silicon single crystal wafer. In this embodiment, the case of using a silicon single crystal wafer is described.

    [0045] Also, a method for forming the oxide film 3 is not particularly limited to, the oxide film may be formed by thermal oxidation, for example.

    [0046] Next, ions are implanted into the semiconductor single crystal substrate 1 having the oxide film 3 formed thereon from a side to be bonded (a front surface side) to form an ion-implanted layer (FIG. 1 at (B)).

    [0047] The ion-implanted layer may be, for example, a layer formed by implanting one or more gas ion selected from a hydrogen ion and a rare gas ion. In this embodiment, the case of implanting hydrogen ions (a hydrogen ion-implanted layer 4) is described as an example.

    [0048] Subsequently, the surface from which the ions are implanted into the bond wafer 1 and a surface of the base wafer 5 are bonded through the oxide film 3, for example, at room temperature of from 20 to 30°C to form a bonded wafer 6 (FIG. 1 at (C) and (D)). In this case, a plasma treatment may also be performed on a surface to be bonded of at least one of the bond wafer and the base wafer before bonding to increase the bonding strength obtained at room temperature.

    [0049] Also, as the base wafer 5, a silicon single crystal wafer or a silicon single crystal wafer on which an insulator film has been formed can be used, for example.

    [0050] Then, the bonded wafer 6 is loaded into a heat treatment furnace and heated, then the delamination heat treatment is performed at a prescribed temperature. The delamination heat treatment temperature may be, for example, 400°C or more, preferably from 400 to 600°C. The temperature in the above range enables the bonded wafer 6 to be appropriately delaminated at the hydrogen ion-implanted layer 4, and thereby a delaminated bond wafer 1' and an SOI wafer 8 having an SOI layer 7 can be obtained (FIG. 1 at (E)).

    [0051] Here, a batch type furnace can be used as the heat treatment furnace, for example. This is not a limitation, provided the delamination heat treatment can be appropriately performed on wafers and a temperature inside the furnace can be decreased at a later-explained temperature-decreasing rate.

    [0052] After the delamination heat treatment is performed as described above, a temperature inside the heat treatment furnace is decreased at a rate of less than 3.0°C/min. The SOI wafer 8 and the delaminated bond wafer 1' are then taken out under the temperature decreased to 250°C or less.

    [0053] In this way, the decreasing of the temperature at the rate of less than 3.0°C/min can reduce a temperature distribution of each wafer surface during decreasing the temperature, and inhibit scratching of the SOI wafer 8 and the delaminated bond wafer 1' due to a deformation of the wafer. Therefore, the occurrence of scratches can be prevented.

    [0054] In addition, the temperature-decreasing rate is preferably 2.5°C/min or less. A lower limit thereof is not particularly limited to, but preferably 1.0°C/min or more to perform the heat treatment process efficiently.

    [0055] Moreover, the take-out temperature of 250°C or less can inhibit an oxide film from being formed on the surface during taking out the wafers. Therefore, even if a mismatch between the SOI wafer 8 and the delaminated bond wafer 1' is caused, there is no possibility that the oxide film in a tip part of the convex shape of the SOI wafer is formed thinly than other portion unlike in the conventional manner, and a radial oxide film thickness distribution can be minimized. Therefore, a formation irregularity of the oxide film thickness can be inhibited, Si etching is uniformly performed in a radial direction by the subsequent step of SC1 cleaning, and the occurrence of the conventional film thickness abnormalities of the SOI wafer can be prevented.

    [0056] In this way, the SOI wafer 8 in which scratches are inhibited and the occurrence of SOI film thickness abnormalities is also inhibited can be obtained.

    (Second embodiment)



    [0057] In the first embodiment, as the bond wafer, the case of using the semiconductor single crystal substrate in which a thermal oxide film is merely formed on all surfaces thereof has been described.

    [0058] However, in addition to this, the present invention can also use a semiconductor single crystal substrate having a back surface oxide film thicker than a front surface oxide film (an oxide film formed on the side to be bonded) as the bond wafer. This case is now described with reference to FIG. 2.

    [0059] First, an oxide film 23' is formed on a back surface of a semiconductor single crystal substrate 22 (FIG. 2 at (A)). The oxide film 23' on the back surface is preferably a thermal oxide film, for example. A preferable method for forming the same is to manufacture a bond wafer having a thermal oxide film only on the back surface by forming a thermal oxide film on all surfaces of the bond wafer, and then removing a portion of the thermal oxide film on the side to be bonded of the bond wafer.

    [0060] Other methods for forming the oxide film 23' on the back surface include a method in which after forming a thermal oxide film having almost uniform thickness on all surfaces of the semiconductor single crystal substrate, while a part of the oxide film on the back surface is protected by a ring-shaped rubber (O-ring) or a protective sheet such as PVC, the semiconductor single crystal substrate is brought into contact with an etching solution for oxide film, or a method in which a part of the thermal oxide film is removed on the side to be bonded with a solution containing hydrogen fluoride (HF) by a spin etching etc. to remain the oxide film only on the back surface.

    [0061] Next, another oxide film is formed on the semiconductor single crystal substrate 22 having the oxide film 23' formed on the back surface (FIG. 2 at (B)). Another oxide film is preferably a thermal oxide film. A preferable method for forming the same is to thermally oxidize all surfaces of the bond wafer having the back surface oxide film formed thereon. In this way, the wafer having the oxide film 23 in which the back surface side is thicker than the front surface side that will become the surface to be bonded of the semiconductor single crystal substrate 22 can be obtained. The bond wafer 21 having an oxide film different in thickness in front and back is thus manufactured.

    [0062] Also, if failures during bonding are caused by a deterioration in surface roughness of the surface to be bonded of the bond wafer or an attachment of a particle due to the formation of the oxide film on the back surface and the removing of the oxide film on the side to be bonded (the front surface side), the method may comprise a step of polishing the side to be bonded by using chemical mechanical polishing (CMP) etc. after removing the oxide film on the side to be bonded, and then thermal oxidation may be performed on all surfaces (FIG. 2 between (A) and (B)).

    [0063] As described above, the bond wafer 21 in which the oxide film on the back surface is thicker than the oxide film on the front surface that will become the surface to be bonded can be previously formed into a concave shape before boding to the base wafer, and thereby the contact between the delaminated bond wafer and the SOI wafer can be inhibited. Moreover, this can inhibit the bond wafer from excessively warping and having a convex shape, thereby enabling the inhibition of the occurrence of the mismatch, even if a helium ion-implanted layer is formed as explained later.

    [0064] In addition, a degree of how thickly the oxide film on the back surface is formed compared with the oxide film on the surface to be bonded can be appropriately determined by experiments and calculations based on specifications of the SOI wafer to be manufactured (such as diameter, base wafer thickness and BOX layer thickness) and specifications of the bond wafer to be used (such as diameter and wafer thickness) so as to prevent the mismatch just after delamination (so that a magnitude of the convex shape of the SOI wafer is equal to a magnitude of the concave shape of the delaminated bond wafer).

    [0065] Next, ions are implanted into the bond wafer 21 having the oxide film 23 formed thereon from the side to be bonded (the front surface side) to form an ion-implanted layer.

    [0066] In the first embodiment, the case of forming only the hydrogen ion-implanted layer has been described. Here, the case of forming a co-implanted layer by implanting both of hydrogen ions and helium ions will be described as an example.

    [0067] When a coimplantaion using hydrogen ions and helium ions is performed as the ion implantation, first, hydrogen ions are implanted to form a hydrogen ion-implanted layer 24 (FIG. 2 at (C)). Next, it is preferable that helium ions are implanted more deeply than the hydrogen ion-implanted layer 24 to form a helium ion-implanted layer 24' (FIG. 2 at (D)). The coimplantation thus performed can reduce an amount of ions to be implanted compared with the case of implanting one type of ions.

    [0068] In the conventional method for manufacturing an SOI wafer, if hydrogen ions and helium ions are co-implanted, the delaminated bond wafer is formed into convex shape by existence of the helium ion-implanted layer, so that the mismatch in warp shape with the SOI wafer occurs, resulting in scratches and SOI film thickness abnormalities.

    [0069] However, as shown in FIG. 2 at (B), the thick thickness of the oxide film on the back surface enables the warp shape of the bond wafer to be previously adjusted before bonding, thereby the influence by existence of the helium ion-implanted layer 24' can be minimized.

    [0070]  Next, the surface from which the ions are implanted into the bond wafer 21 and a surface of the base wafer 25 are bonded through the oxide film 23, for example, at room temperature of from 20 to 30°C to form a bonded wafer 26 (FIG. 2 at (E) and (F)).

    [0071] Then, the bond wafer is delaminated from the bonded wafer 26 at the hydrogen ion-implanted layer 24 by the delamination heat treatment so as to obtain a delaminated bond wafer 21', and thereby forming an SOI wafer 28 having an SOI layer 27 (FIG. 2 at (G)). The delamination heat treatment conditions may be set, for example, as in the first embodiment.

    [0072] In the second embodiment, since the bond wafer having the oxide film in which the back surface side is thicker than the front surface side is used, the delaminated bond wafer 21' warps in a concave shape more reliably, and the conventional contact due to the mismatch in shape between the delaminated bond wafer and the SOI wafer can be prevented.

    [0073] Therefore, an SOI wafer in which scratches and SOI film thickness abnormalities after Si etching are further inhibited can be obtained more stably.

    (Third embodiment)



    [0074] In addition, the method for manufacturing an SOI wafer by the ion implantation delamination method is also characterize by being capable of reusing a delaminated bond wafer. Therefore, the present invention can also use a wafer manufactured by subjecting the delaminated bond wafer 21' and the like to a reclaiming process as the bond wafer. Thus, it is advantageous in a cost.

    [0075] In that case, the delaminated bond wafer is reclaimed by performing the reclaiming process without removing the oxide film on the back surface to manufacture a bond wafer having an oxide film on the back surface. The resultant wafer is then thermally oxidized, and thereby the bond wafer in which the oxide film on the back surface is thicker than the oxide film on the surface to be bonded can be easily manufactured.

    [0076] In this reclaiming process of the delaminated bond wafer, a removal of the oxide film remaining on an outer circumferential unbonded portion on the side to be bonded may be accomplished by directly polishing the side to be bonded. Alternatively, the removal may be performed using a method in which the delaminated bond wafer is brought into contact with an etching solution for oxide film while a part of the oxide film on the back surface is protected by a ring-shaped rubber (O-ring) or a protective sheet such as PVC, or using a spin etching machine.

    [0077] In the reclaiming process of the delaminated bond wafer, the back surface oxide film may be protected by blocking an etching solution or an etching gas by means of an O-ring, or by attaching a protective sheet, such as PVC, to the back surface of the delaminated bond wafer, as described above. A possible alternative way is performed such that an etching solution or an etching gas does not reach the back surface of the bond wafer because of wind pressure and centrifugal force generated by the rotation of the wafer. The etching solution for oxide film is preferably a HF solution. Alternatively, the etching may be performed with a HF gas. The O-ring is desirably provided at a position several millimeters from the outer circumference to warp the bond wafer. Depending on a permissible level of warping, however, it may be provided within the inside of this range.

    [0078] By subjecting the bond wafer having the back surface oxide film thicker than the front surface oxide film that is thus manufactured by reclaiming the delaminated bond wafer, to the steps of (C) to (G) in FIG. 2 as in the second embodiment, for example, an SOI wafer in which scratches and SOI film thickness abnormalities after Si etching are further inhibited can be obtained.

    EXAMPLE



    [0079] Hereinafter, the present invention will be more specifically described with reference to examples and comparative examples, but the present invention is not limited thereto.

    (Example 1 and Comparative Examples 1 to 6)



    [0080] A bond wafer consisting of a 300-mm-diameter silicon single crystal wafer both surfaces of which have been mirror-polished was thermally oxidized to form a 30-nm-thickness thermal oxide film on all surfaces thereof, and subjected to the hydrogen ion-implantation though the thermal oxide film. Subsequently, the resultant bond wafer was bonded to a base wafer consisting of a 300-mm-diameter silicon single crystal wafer to manufacture a bonded wafer. The delamination heat treatment was then performed (at 500°C, for 30min, in nitrogen atmosphere) to delaminate a part of the bond wafer from the bonded wafer so that an SOI wafer was manufactured, and subjected to an SC1 cleaning.

    [0081] In addition, the temperature-decreasing rate and the take-out temperature inside the heat treatment furnace were set as follows.
    Example 1 Temperature-decreasing rate: 2.0°C/min, Take-out temperature: 250°C;

    Comparative Example 1 Temperature-decreasing rate: 3.0°C/min, Take-out temperature: 250°C;

    Comparative Example 2 Temperature-decreasing rate: 3.0°C/min, Take-out temperature: 225°C;

    Comparative Example 3 Temperature-decreasing rate: 3.0°C/min, Take-out temperature: 500°C;

    Comparative Example 4 Temperature-decreasing rate: 3.0°C/min, Take-out temperature: 360°C;

    Comparative Example 5 Temperature-decreasing rate: 3.0°C/min, Take-out temperature: 295°C;

    Comparative Example 6 Temperature-decreasing rate: 5.0°C/min, Take-out temperature: 250°C;



    [0082] Table 1 shows various conditions, an incidence of scratches and an incidence of SOI film thickness distribution abnormalities of Example 1 and Comparative Examples 1 to 6. Also, FIGS. 3 show measurement results of an SOI film thickness distribution of Example 1 and Comparative Examples 3 to 5.
    (Table 1)
     EXAMPLE 1COMPARATIVE EXAMPLE 1COMPARATIVE EXAMPLE 2COMPARATIVE EXAMPLE 3COMPARATIVE EXAMPLE 4COMPARATIVE EXAMPLE 5COMPARATIVE EXAMPLE 6
    BACK SURFACE OXIDE FILM OF THE BOND WAFER 30nm 30nm 30nm 30nm 30nm 30nm 30nm
    FRONT SURFACE OXIDE FILM OF THE BOND WAFER (BURIED OXIDE FILM) 30nm 30nm 30nm 30nm 30nm 30nm 30nm
    H ION IMPLANTAION 30KeV, 5e16cm-2 30KeV, 5e16cm-2 30KeV, 5e16cm-2 30KeV, 5e16cm-2 30KeV, 5e16cm-2 30KeV, 5e16cm-2 30KeV, 5e16cm-2
    BONDING PROCESS BONDING AT ROOM TEMPERATURE BONDING AT ROOM TEMPERATURE BONDING AT ROOM TEMPERATURE BONDING AT ROOM TEMPERATURE BONDING AT ROOM TEMPERATURE BONDING AT ROOM TEMPERATURE BONDING AT ROOM TEMPERATURE
    DELAMINATION HEAT TREATMENT 500°C, 30min 500°C, 30min 500°C, 30min 500°C, 30min 500°C, 30min 500°C, 30min 500°C, 30min
    TEMPERATURE-DECREASING RATE 2.0°C/min 3.0°C/min 3.0°C/min 3.0°C/min 3.0°C/min 3.0°C/min 5.0°C/min
    TAKE-OUT TEMPERATURE 250°C 250°C 225°C 500°C 360°C 295°C 250°C
    INCIDENCE OF SCRATCHES 5% 10% 10% 100% 50% 30% 20%
    INCIDENCE OF SOI FILM THICKNESS DISTRIBUTION ABNORMALITIES 5% 5% 5% 100% 100% 50% 40%


    [0083] As shown in Table 1 and FIGS. 3, in Example 1 having performed the inventive method in which the temperature-decreasing rate was less than 3.0°C/min and the take-out temperature was 250°C or less, the incidence of scratches was limited to a small value of 5%, and the incidence of SOI film thickness distribution abnormalities was suppressed to be 5%. In this way, an excellent SOI wafer free of scratches and SOI film thickness abnormalities could be manufactured at a good yield.

    [0084]  By contrast, in Comparative Examples 1 to 5 in which the temperature-decreasing rate was 3.0°C/min as in the conventional method, the incidence of scratches was 10%, 10%, 100%, 50% and 30%, respectively. These values were from 2 to 20 times that of Example 1.

    [0085] Moreover, the incidence of scratches was 20% in Comparative Example 6 in which the temperature-decreasing rate was 5.0°C/min and other conditions were the same as in Example 1 (2.0°C/min) and Comparative Example 1 (3.0°C/min). This result was worse than Example 1 and Comparative Example 1.

    [0086] Moreover, in Comparative Examples 3 to 5 in which the take-out temperature was more than 250°C unlike the present invention, the incidence of SOI film thickness distribution abnormalities was a high value of 100%, 100% and 50%, respectively.

    (Example 2)



    [0087] A bond wafer consisting of a 300-mm-diameter silicon single crystal wafer both surfaces of which have been mirror-polished was thermally oxidized to form a 150-nm-thickness thermal oxide film on all surfaces thereof. Then, the bond wafer was immersed in HF aqueous solution while the back surface oxide film thereof was protected by an O-ring to remove the front surface oxide film. After that, the front surface was re-polished by CMP processing, and subjected to the thermal oxidation again to form a 30-nm-thickness thermal oxide film (for a buried oxide film) on the front surface side. At this time, the back surface oxide film grew to be 155nm. After hydrogen ions were implanted through the 30-nm-thickness thermal oxide film on the front surface side, the resultant bond wafer was bonded to a base wafer consisting of a 300-mm-diameter silicon single crystal wafer. The delamination heat treatment was then performed (at 500°C, for 30min, in nitrogen atmosphere) to manufacture an SOI wafer, and subjected to an SC1 cleaning.

    [0088] In addition, the temperature-decreasing rate was set at 2.0°C/min and the take-out temperature inside the heat treatment furnace was set at 250°C.

    (Example 3)



    [0089] A bond wafer which has been delaminated by the ion implantation delamination method (a delaminated bond wafer having a 150-nm-thickness back surface oxide film) was immersed in HF aqueous solution while the back surface oxide film was protected by an O-ring to remove the front surface oxide film, and then subjected to the reclaiming process by CMP processing. The obtained wafer was used as a bond wafer, and thermally oxidized to form a 30-nm-thickness thermal oxide film (for a buried oxide film) on the front surface side. At this time, the back surface oxide film grew to be 155nm. After hydrogen ions were implanted through the 30-nm-thickness thermal oxide film on the front surface side, the resultant bond wafer was bonded to a base wafer consisting of a 300-mm-diameter silicon single crystal wafer. The delamination heat treatment was then performed (at 500°C, for 30min, in nitrogen atmosphere) to manufacture an SOI wafer, and subjected to an SC1 cleaning.

    [0090] In addition, the temperature-decreasing rate was set at 2.0°C/min and the take-out temperature inside the heat treatment furnace was set at 250°C.

    (Example 4)



    [0091] A bond wafer consisting of a 300-mm-diameter silicon single crystal wafer both surfaces of which have been mirror-polished was thermally oxidized to form a 150-nm-thickness thermal oxide film on all surfaces thereof. Then, the bond wafer was immersed in HF aqueous solution while the back surface oxide film thereof was protected by an O-ring to remove the front surface oxide film. After that, the front surface was re-polished by CMP processing, and subjected to the thermal oxidation again to form a 30-nm-thickness thermal oxide film (for a buried oxide film) on the front surface side. At this time, the back surface oxide film grew to be 155nm. After hydrogen ions and helium ions were implanted through the 30-nm-thickness thermal oxide film, the resultant bond wafer was bonded to a base wafer consisting of a 300-mm-diameter silicon single crystal wafer. The delamination heat treatment was then performed (at 500°C, for 30min, in nitrogen atmosphere) to manufacture an SOI wafer, and subjected to an SC1 cleaning.

    [0092] In addition, the temperature-decreasing rate was set at 2.5°C/min and the take-out temperature inside the heat treatment furnace was set at 250°C.

    (Comparative Example 7)



    [0093] A 30-nm-thickness thermal oxide film was formed on a bond wafer consisting of a 300-mm-diameter silicon single crystal wafer both surfaces of which have been mirror-polished. Then, after hydrogen ions and helium ions were implanted through the 30-nm-thickness thermal oxide film, the resultant bond wafer was bonded to a base wafer consisting of a 300-mm-diameter silicon single crystal wafer. The delamination heat treatment was then performed (at 500°C, for 30min, in nitrogen atmosphere) to manufacture an SOI wafer, and subjected to an SC1 cleaning.

    [0094] In addition, the temperature-decreasing rate was set at 3.0°C/min and the take-out temperature inside the heat treatment furnace was set at 350°C.

    [0095] Table 2 shows various conditions, an incidence of scratches and an incidence of SOI film thickness distribution abnormalities of Examples 2 to 4 and Comparative Example 7.
    (Table 2)
     EXAMPLE 2EXAMPLE 3EXAMPLE 4COMPARATIVE EXAMPLE 7
    THE NUMBER OF TIMES OF REUSE OF THE BOND WAFER 0 1 1 0
    BACK SURFACE OXIDE FILM OF THE BOND WAFER 155nm 155nm 155nm 30nm
    FRONT SURFACE OXIDE FILM OF THE BOND WAFER (BURIED OXIDE FILM) 30nm 30nm 30nm 30nm
    H ION IMPLANTAION 30KeV, 5e16cm-2 30KeV, Se16cm-2 30KeV, 1.5e16cm-2 30KeV, 1.5e16cm-2
    He ION IMPLANTAION - - 50KeV, 1e16cm-2 50KeV, 1e16cm-2
    BONDING PROCESS BONDING AT ROOM TEMPERATURE BONDING AT ROOM TEMPERATURE BONDING AT ROOM TEMPERATURE BONDING AT ROOM TEMPERATURE
    DELAMINATION HEAT TREATMENT 500°C, 30min 500°C, 30min 500°C, 30min 500°C, 30min
    TEMPERATURE-DECREASING RATE 2.0°C/min 2.0°C/min 2.5°C/min 3.0°C/min
    TAKE-OUT TEMPERATURE 250°C 250°C 250°C 350°C
    INCIDENCE OF SCRATCHES 0% 0% 0% 50%
    INCIDENCE OF SOI FILM THICKNESS DISTRIBUTION ABNORMALITIES 0% 0% 0% 100%


    [0096] As shown in Table 2, in Examples 2 to 4 in which a silicon single crystal wafer having the back surface oxide film thicker than the front surface oxide film was used as the bond wafer according to the present invention, both the incidence of scratches and the incidence of SOI film thickness distribution abnormalities were 0%, and an excellent SOI wafer could be manufactured.

    [0097] Moreover, in Example 4, although the coimplantation was performed in the ion implantation, the above-explained excellent SOI wafer could be obtained unlike in the conventional manner.

    [0098] On the other hand, in Comparative Example 7 in which the temperature-decreasing rate and the take-out temperature were different from those of the present invention, the incidence of scratches and the incidence of SOI film thickness distribution abnormalities were high values of 50% and 100%, respectively.


    Claims

    1. A method for manufacturing an SOI wafer, comprising:

    implanting one or more gas ion selected from a hydrogen ion and a rare gas ion into a bond wafer from a surface of the bond wafer to form an ion-implanted layer, the bond wafer being a silicon single crystal wafer on which an oxide film has been formed;

    bonding the surface from which the ion is implanted into the bond wafer and a surface of a base wafer through the oxide film, the base wafer being a silicon single crystal wafer or a silicon single crystal wafer on which an insulator film has been formed; and then

    delaminating the bond wafer at the ion-implanted layer by performing a delamination heat treatment with a heat treatment furnace to form the SOI wafer, wherein after the delamination heat treatment, the temperature of the heat treatment furnace is decreased to 250°C or less at temperature-decreasing rate of less than 3.0°C/min, and then the SOI wafer and the bond wafer after delamination are taken out from the heat treatment furnace.


     
    2. The method for manufacturing an SOI wafer according to claim 1, wherein a silicon single crystal wafer having a front surface oxide film and a back surface oxide film is prepared as the bond wafer for forming the ion-implanted layer to implant the ion through the front surface oxide film, the back surface oxide film being thicker than the front surface oxide film.
     
    3. The method for manufacturing an SOI wafer according to claim 2, wherein the silicon single crystal wafer having the back surface oxide film thicker than the front surface oxide film, is manufactured by forming a thermal oxide film on all surfaces of a silicon single crystal wafer, then removing a portion of the thermal oxide film on a front surface side to obtain a silicon single crystal wafer having the thermal oxide film only on a back surface side thereof, and thermally oxidizing the silicon single crystal wafer having the thermal oxide film only on the back surface side.
     
    4. The method for manufacturing an SOI wafer according to claim 3, wherein before the silicon single crystal wafer having the thermal oxide film only on the back surface side is thermally oxidized, the front surface side on which the portion of the thermal oxide film has been removed is polished.
     
    5. The method for manufacturing an SOI wafer according to any one of claims 2 to 4, wherein a wafer manufactured by subjecting the bond wafer delaminated at the ion-implanted layer to a reclaiming process is used as the silicon single crystal wafer having the back surface oxide film thicker than the front surface oxide film.
     
    6. The method for manufacturing an SOI wafer according to claim 5, wherein the reclaiming process is performed without removing the back surface oxide film of the delaminated bond wafer.
     
    7. The method for manufacturing an SOI wafer according to any one of claims 1 to 6, wherein the ion implantation is performed by a coimplantation of a hydrogen ion and a helium ion such that the helium ion is implanted more deeply than the hydrogen ion.
     


    Ansprüche

    1. Verfahren zur Herstellung eines SOI-Wafers, umfassend:

    Implantieren von einem oder mehreren Gasionen, ausgewählt aus einem Wasserstoffion und einem Seltengasion in einen Bond-Wafer von einer Oberfläche des Bond-Wafers, um eine ionenimplantierte Schicht zu bilden, wobei der Bond-Wafer ein Silizium-Einkristall-Wafer ist, auf dem ein Oxidfilm gebildet wurde;

    Bonden der Oberfläche, von der das Ion implantiert ist in den Bond-Wafer und einer Oberfläche eines Basis-Wafers durch den Oxidfilm, wobei der Basis-Wafer ein Silizium-Einkristall-Wafer oder ein Silizium-Einkristall-Wafer, auf dem ein Isolatorfilm gebildet wurde, ist; und dann

    Delaminieren des Bond-Wafers an der ionenimplantierten Schicht durch Durchführung einer Delaminierungs-Wärmebehandlung mit einem Wärmebehandlungsofen, um den SOI-Wafer zu bilden, wobei nach der Delaminierungs-Wärmebehandlung die Temperatur des Wärmebehandlungsofens auf 250°C oder darunter abgesenkt wird bei einer Temperaturabsenkgeschwindigkeit von weniger als 3,0°C/min, und dann werden der SOI-Wafer und der Bond-Wafer nach der Delaminierung aus dem Wärmebehandlungsofen entnommen.


     
    2. Verfahren zur Herstellung eines SOI-Wafers nach Anspruch 1, wobei ein Silizium-Einkristall-Wafer mit einem Frontoberflächen-Oxidfilm und einem Rückoberflächen-Oxidfilm als Bond-Wafer hergestellt wird, um die ionenimplantierte Schicht zu bilden, um das Ion über den Frontoberflächen-Oxidfilm zu implantieren, wobei der Rückoberflächen-Oxidfilm dicker ist als der Frontoberflächen-Oxidfilm.
     
    3. Verfahren zur Herstellung eines SOI-Wafers nach Anspruch 2, wobei der Silizium-Einkristall-Wafer mit dem dickeren Rückoberflächen-Oxidfilm als der Frontoberflächen-Oxidfilm hergestellt wird durch Bildung eines thermischen Oxidfilms auf allen Oberflächen eines Silizium-Einkristall-Wafers, dann Entfernung eines Teils des thermischen Oxidfilms auf einer Frontoberflächenseite, um einen Silizium-Einkristall-Wafer zu erhalten, mit dem thermischen Oxidfilm nur auf einer Rückoberflächenseite davon, und thermisches Oxidieren des Silizium-Einkristall-Wafers mit dem thermischen Oxidfilm nur auf der Rückoberflächenseite.
     
    4. Verfahren zur Herstellung eines SOI-Wafers nach Anspruch 3, wobei bevor der Silizium-Einkristall-Wafer mit dem thermischen Oxidfilm nur auf der Rückoberflächenseite thermisch oxidiert wird, die Frontoberflächenseite, auf der ein Teil des thermischen Oxidfilms entfernt wird, poliert wird.
     
    5. Verfahren zur Herstellung eines SOI-Wafers nach irgendeinem der Ansprüche 2 bis 4, wobei ein Wafer, der hergestellt wurde durch Unterwerfen des Bond-Wafers, der an der ionenimplantierten Schicht delaminiert wurde, mit einem Rückgewinnungsverfahren, verwendet wird als der Silizium-Einkristall-Wafer mit einem Rückoberflächen-Oxidfilm, der dicker ist als der Frontoberflächen-Oxidfilm.
     
    6. Verfahren zur Herstellung eines SOI-Wafers nach Anspruch 5, wobei das Rückgewinnungsverfahren durchgeführt wird, ohne dass der Rückoberflächen-Oxidfilm des delaminierten Bond-Wafers entfernt wird.
     
    7. Verfahren zur Herstellung eines SOI-Wafers nach irgendeinem der Ansprüche 1 bis 6, wobei die Ionenimplantierung durchgeführt wird mittels einer Co-Implantation eines Wasserstoffions und eines Heliumions, sodass das Heliumion tiefer implantiert wird als das Wasserstoffion.
     


    Revendications

    1. Procédé de fabrication d'une plaquette de SOI, comprenant :

    l'implantation d'un ou de plusieurs ions de gaz choisis parmi un ion hydrogène et un ion de gaz rare dans une plaquette de liaison à partir d'une surface de la plaquette de liaison pour former une couche à ions implantés, la plaquette de liaison étant une plaquette de silicium monocristallin sur laquelle a été formé un film d'oxyde ;

    la liaison de la surface à partir de laquelle l'ion est implanté dans la plaquette de liaison et d'une surface d'une plaquette de base à travers le film d'oxyde, la plaquette de base étant une plaquette de silicium monocristallin ou une plaquette de silicium monocristallin sur laquelle a été formé un film isolant ; puis

    le délaminage de la plaquette de liaison au niveau de la couche à ions implantés par réalisation d'un traitement thermique de délaminage avec un four de traitement thermique pour former la plaquette de SOI, dans lequel après le traitement thermique de délaminage, la température du four de traitement thermique est abaissée à 250 °C ou moins à une vitesse de diminution de la température inférieure à 3,0 °C/min, puis la plaquette de SOI et la plaquette de liaison après délaminage sont retirées du four de traitement thermique.


     
    2. Procédé de fabrication d'une plaquette de SOI selon la revendication 1, dans lequel une plaquette de silicium monocristallin ayant un film d'oxyde de surface avant et un film d'oxyde de surface arrière est préparée en tant que plaquette de liaison pour former la couche à ions implantés afin d'implanter l'ion à travers le film d'oxyde de surface avant, le film d'oxyde de surface arrière étant plus épais que le film d'oxyde de surface avant.
     
    3. Procédé de fabrication d'une plaquette de SOI selon la revendication 2, dans lequel la plaquette de silicium monocristallin ayant le film d'oxyde de surface arrière plus épais que le film d'oxyde de surface avant, est fabriquée par formation d'un film d'oxyde thermique sur toutes les surfaces d'une plaquette de silicium monocristallin, puis retrait d'une partie du film d'oxyde thermique sur un côté de surface avant pour obtenir une plaquette de silicium monocristallin ayant le film d'oxyde thermique uniquement sur un côté de surface arrière de cette dernière, et oxydation thermique de la plaquette de silicium monocristallin ayant le film d'oxyde thermique uniquement sur le côté de surface arrière.
     
    4. Procédé de fabrication d'une plaquette de SOI selon la revendication 3, dans lequel avant que la plaquette de silicium monocristallin ayant le film d'oxyde thermique uniquement sur le côté de surface arrière ne soit oxydée thermiquement, le côté de surface avant sur lequel la partie du film d'oxyde thermique a été retirée est poli.
     
    5. Procédé de fabrication d'une plaquette de SOI selon l'une quelconque des revendications 2 à 4, dans lequel une plaquette fabriquée en soumettant la plaquette de liaison délaminée au niveau de la couche à ions implantés à un processus de récupération est utilisée comme plaquette de silicium monocristallin ayant le film d'oxyde de surface arrière plus épais que le film d'oxyde de surface avant.
     
    6. Procédé de fabrication d'une plaquette de SOI selon la revendication 5, dans lequel le processus de récupération est effectué sans retirer le film d'oxyde de surface arrière de la plaquette de liaison délaminée.
     
    7. Procédé de fabrication d'une plaquette de SOI selon l'une quelconque des revendications 1 à 6, dans lequel l'implantation d'ions est réalisée par une co-implantation d'un ion hydrogène et d'un ion hélium de telle sorte que l'ion hélium est implanté plus profondément que l'ion hydrogène.
     




    Drawing

















    Cited references

    REFERENCES CITED IN THE DESCRIPTION



    This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.

    Patent documents cited in the description