(19)
(11)EP 3 309 831 B1

(12)EUROPEAN PATENT SPECIFICATION

(45)Mention of the grant of the patent:
04.11.2020 Bulletin 2020/45

(21)Application number: 16841934.9

(22)Date of filing:  31.08.2016
(51)International Patent Classification (IPC): 
H01L 23/50(2006.01)
H01L 23/498(2006.01)
H01L 25/18(2006.01)
(86)International application number:
PCT/JP2016/075577
(87)International publication number:
WO 2017/038904 (09.03.2017 Gazette  2017/10)

(54)

IMAGE DISPLAY SYSTEM COMPRISING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE

BILDDARSTELLUNGSSYSTEM UMFASSEND HALBLEITERVORRICHTUNG UND HALBLEITERMODUL

SYSTÈME D'AFFICHAGE D'IMAGES COMPRENANT DISPOSITIF À SEMI-CONDUCTEUR ET MODULE À SEMI-CONDUCTEUR


(84)Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

(30)Priority: 31.08.2015 JP 2015170408

(43)Date of publication of application:
18.04.2018 Bulletin 2018/16

(73)Proprietor: Aisin Aw Co., Ltd.
Anjo-shi, Aichi 444-1192 (JP)

(72)Inventor:
  • NARUSE Takanobu
    Anjo-shi Aichi 444-1192 (JP)

(74)Representative: Cabinet Beau de Loménie 
158, rue de l'Université
75340 Paris Cedex 07
75340 Paris Cedex 07 (FR)


(56)References cited: : 
WO-A1-2015/079551
JP-A- 2015 099 890
US-A1- 2008 151 484
JP-A- 2012 156 291
JP-A- 2015 111 360
US-A1- 2012 187 564
  
      
    Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


    Description

    TECHNICAL FIELD



    [0001] The present invention relates to an image display system, comprising a semiconductor device including a circuit board having a plurality of wiring layers and through holes and a semiconductor module, and semiconductor modules.

    BACKGROUND ART



    [0002] Semiconductor modules such as a system LSI (also called a system on a chip (SOC)) that is a large scale integration circuit (LSI) having integrated on a single semiconductor element a plurality of circuit blocks (mega cells) having specific functions and a multichip module (MCM) that is a module of a plurality of semiconductor elements having specific functions have been put into practical use. Japanese Patent Application Publication No. 2011-96268 (JP 2011-96268 A) (Patent Document 1) discloses a technique that implements ease of wiring design on a motherboard and a module substrate of a semiconductor module when configuring a circuit board (motherboard) having such a semiconductor module mounted thereon. Patent Document 1 discloses optimization of power supply to a memory that is mounted on a semiconductor module (multichip module), etc. (Patent Document 1: FIG 8, [0045] to [0047], etc.).

    [0003] Such multichip modules have a processor such as a microcomputer mounted thereon in addition to the memory. Mega cells and input and output terminals in a system LSI are usually arranged close to each other so that the wiring distance on a semiconductor element is short. FIG. 9 schematically shows an example of arrangement of the input and output terminals in the system LSI. In the case where two image output terminals are provided like "VO1, VO2" in FIG. 9, these two image output terminals are placed close to each other. However, there are some cases where these two image output terminals need be extended in different directions, depending on the position where a device using image output signals is placed. With recent improvement in image quality, image signals have been increasingly becoming fast. In order to appropriately obtain signals while dealing with high-speed signals, the number of layers in a circuit board such as a motherboard having a plurality of wiring layers or the area of the circuit board need be increased in some cases. Long wiring increases radiation noise, which may affect other circuits. Moreover, the wiring is subjected to external noise, which may reduce reliability of signals. Accordingly, it is preferable that a semiconductor module and a semiconductor device having a semiconductor module mounted thereon be designed in view of the environment in which the semiconductor module and the semiconductor device are to be used.

    Related Art Documents


    Patent Documents



    [0004] Patent Document 1: Japanese Patent Application Publication No. 2011-96268 (JP 2011-96268 A)

    [0005] US 2012/187564 discloses a semiconductor device and semiconductor device package. The disclosed semiconductor device and package is suitable to be used in a communication system like an image display system. A device comprising a semiconductor module comprising a semiconductor element and corresponding connections of said module on a main substrate via connection terminals is described. The document further discloses the arrangement of two groups of output connection terminals on opposite sides of the module.

    [0006] US 2008/151484 discloses a system in package.

    SUMMARY OF THE INVENTION


    Problem to be Solved by the Invention



    [0007] In view of the above circumstances, it is desired to provide a semiconductor device having mounted thereon a semiconductor module in which input and output terminals adapted for an environment in which the semiconductor module is to be used are arranged and such a semiconductor module.

    Means for Solving the Problem



    [0008] In one aspect, an image display system, comprising a semiconductor device according to claim 1 is provided.

    [0009] In one aspect, in a semiconductor module including a rectangular plate-like support substrate that supports and fixes at least one semiconductor element on an upper surface of the support substrate, and a plurality of connection terminals that are arranged planarly along a lower surface of the support substrate and that are electrically connected to the semiconductor element, the connection terminals include a first module terminal group and a second module terminal group which are terminal groups having one of an image output function and a communication interface function, and the first module terminal group is located on a module first side that is one side of the support substrate, and the second module terminal group is located on a module second side that is an opposite side from the module first side.

    [0010] With this configuration, the plurality of types of terminal groups having the image output function (or the plurality of types of terminal groups having the communication interface function) in the semiconductor module are arranged according to the positions where circuits (including terminals such as a connector) corresponding to each function are located on the main substrate on which the semiconductor module is mounted. Accordingly, when the semiconductor module is mounted on the main substrate, connection can be made by using the wiring patterns formed in the surface wiring layer. As a result, the number of wiring patterns to be formed in an inner layer of the main substrate can be reduced, which can restrain an increase in the number of layers of the main substrate. In the semiconductor module itself as well, terminals are arranged in view of a circuit substrate on which the semiconductor module is to be mounted, whereby the semiconductor module can be mounted on the circuit substrate with improved mount efficiency. With the above configuration, a semiconductor device having mounted thereon a semiconductor module in which input and output terminals adapted for the environment in which the semiconductor module is to be used are arranged and such a semiconductor module can be provided.

    [0011] Further features and advantages of the semiconductor device and the semiconductor module will become apparent from the following description of embodiments of the semiconductor module which will be described with reference to the accompanying drawings

    BRIEF DESCRIPTION OF THE DRAWINGS



    [0012] 

    [FIG. 1] FIG. 1 is a schematic view showing the relationship between a semiconductor module and peripheral devices.

    [FIG. 2] FIG. 2 is a schematic section showing the structure of the semiconductor module.

    [FIG. 3] FIG. 3 is a schematic perspective view showing general terminal arrangement of the semiconductor module.

    [FIG. 4] FIG. 4 is an illustration schematically showing an example of allocation of terminals according to the functions of the semiconductor module.

    [FIG. 5] FIG. 5 is an illustration schematically showing the relationship between a semiconductor element and the terminals of the semiconductor module.

    [FIG. 6] FIG. 6 is an illustration schematically showing another example of allocation of terminals according to the functions of the semiconductor module.

    [FIG. 7] FIG. 7 is an illustration schematically showing still another example of allocation of terminals according to the functions of the semiconductor module.

    [FIG. 8] FIG. 8 is a functional block diagram showing an example of a system LSI.

    [FIG. 9] FIG. 9 is an illustration showing an example of typical allocation of terminals according to the functions of the system LSI.

    [FIG. 10] FIG 10 is a schematic section showing the structure of a semiconductor module (SOC).

    [FIG. 11] FIG. 11 is a schematic section showing the structure of a semiconductor module (MCM).

    [FIG. 12] FIG. 12 is a schematic section showing the structure of a semiconductor module (SIP).

    [FIG. 13] FIG. 13 is a schematic section showing the structure of a semiconductor device including the SOC.

    [FIG. 14] FIG. 14 is a schematic section showing the structure of a semiconductor device including the MCM.

    [FIG. 15] FIG. 15 is a schematic section showing the structure of a semiconductor device including the SIP.

    [FIG. 16] FIG. 16 is an illustration showing an example of how terminal arrangement is changed on a support substrate.

    [FIG. 17] FIG. 17 is a perspective view showing an example of terminal arrangement in a semiconductor module.

    [FIG. 18] FIG. 18 is a perspective view of a navigation unit.

    [FIG. 19] FIG. 19 is a perspective view of a body unit of the navigation unit.

    [FIG. 20] FIG. 20 is a perspective view of the body unit of the navigation unit as viewed in a different direction.

    [FIG. 21] FIG. 21 is a view showing the layout of a main substrate that is mounted on the navigation unit and signal flows.

    [FIG. 22] FIG 22 is a perspective view of a multimedia unit.

    [FIG. 23] FIG. 23 is an exploded perspective view of the multimedia unit.

    [FIG. 24] FIG. 24 is a rear view of the navigation unit.

    [FIG. 25] FIG. 25 is a view showing the layout of a main substrate that is mounted on the navigation unit and signal flows


    MODES FOR CARRYING OUT THE INVENTION



    [0013] Embodiments of a semiconductor module including a single semiconductor element or a plurality of semiconductor elements and having a plurality of functions integrated therein, and a semiconductor device including the semiconductor module will be described with reference to the accompanying drawings. As shown in FIG. 1, a semiconductor device 1 includes a circuit board (main substrate 3) having a plurality of layers (30a, 30b, 30c, 30z) with wiring layers located in the surface layers (30a, 30z) and the inner layers (30b, 30c), and a semiconductor module 5 mounted on the main substrate 3. For example, the semiconductor module 5, together with other circuit components, not shown, is mounted on the main substrate 3 and serves as a core for an electronic control unit (ECU) as the semiconductor device 1. In the present embodiment, the ECU is a control device for an in-vehicle information terminal. As shown in FIG 1, the semiconductor device 1 is connected to a front-seat monitor device 71 mounted on a console etc. of a front seat, a rear-seat monitor device 72 mounted on the rear seat side, a hard disk device 73 having a map database for a navigation system etc. stored therein, a digital versatile disk (DVD) player 74, a rear camera 76, etc., and controls these devices.

    [0014] For example, as shown in FIGS. 2 and 10 to 12, the semiconductor module 5 includes at least one semiconductor element 51 and a support substrate 21 that supports and fixes the semiconductor element 51 on its upper surface 21a. A plurality of terminals 10 (connection terminals) electrically connected to the semiconductor element 51 are arranged planarly on a lower surface 21b of the support substrate 21 so as to project from the lower surface 21b.

    [0015] FIG. 2 schematically shows a general structure of the semiconductor module 5 (system LSI (system on a chip (SOC) 5C)) including a single semiconductor element 51 (semiconductor die 51d). FIG. 10 schematically shows the structure of the semiconductor module 5 (system LSI 5C) that is a single package with a plurality of semiconductor elements 51 (semiconductor dies 51d) enclosed therein. The semiconductor dies 51d are supported and fixed on the upper surface 21a of the support substrate 21 (package substrate). Reference character "51C" represents the semiconductor elements 51 in the system LSI 5C. Even in the case where the semiconductor module 5 includes a single semiconductor element 51 (semiconductor die 51d), a system LSI 5C may be configured as a large scale integration circuit (LSI) having integrated on a single semiconductor element 51 (semiconductor die 51d) a plurality of circuit blocks (mega cells) having specific functions.

    [0016] FIG. 11 shows an example in which the semiconductor module 5 is configured as a hybrid IC called a multichip module 5M (MCM). The multichip module 5M is configured as a module having mounted on a single support substrate 21 (module substrate) a plurality of semiconductor elements 51 (such as semiconductor chips shown by reference character "51M") having specific functions. FIG. 11 shows an example in which a processor 51b such as a microcomputer or a digital signal processor (DSP) and a peripheral chip such as a memory 51q are mounted as a plurality of semiconductor elements 51 (51M) having specific functions on the support substrate 21. FIG. 12 shows an example in which the semiconductor module 5 is configured as a hybrid IC called a system in a package (SIP) 5P. For example, the semiconductor module 5 as the SIP 5P is configured as a hybrid IC that is a single package having integrated therein a plurality of semiconductor elements 51 (such as semiconductor chips shown by reference character "51P") having specific functions.

    [0017] The semiconductor element 51 has terminal arrangement according to an internal cell structure etc. However, when the semiconductor module 5 is configured by using the semiconductor element 51, the terminal arrangement can be changed on the support substrate 21. That is, arrangement of terminals 10 of the semiconductor module 5 can be set on the support substrate 21 so as to achieve the terminal arrangement suitable for being mounted on the main substrate 3. Mounting and connecting a plurality of semiconductor elements 51 on the support substrate 21 can eliminate terminals that are connected only between the semiconductor elements 51 from the terminals 10 of the semiconductor module 5. Since the total number of terminals 10 is reduced, the terminals 10 can be arranged more appropriately. For example, the multichip module 5M shown in FIG. 11 includes the processor 51b and the memory 51q. In many cases, the processor 51b has terminals that are connected to the memory 51q. The number of terminals that are connected to the memory 51q is large because the terminals include those for bus signals of an address bus, a data bus, etc. Connecting the processor 51b and the memory 51q on the support substrate 21 can eliminate such terminals for bus signals from the terminals 10 of the semiconductor module 5.

    [0018] A semiconductor vendor's webpage <http://japan.renesas.com/applications/automotive/cis/cis_highend/rcar_h2/index.jsp> [searched on August 25, 2015] discloses an example of an SOC for an in-vehicle information terminal (SOC 500). FIG. 8 is a block diagram showing the functional configuration of this SOC for an in-vehicle information terminal (SOC 500), reprinted in a simplified form from the webpage. As shown in the figure, this SOC includes a plurality of (three) functional blocks for image output (Display Out). The SOC 500 further includes a plurality of (for a total of four) functional blocks of a high-speed communication interface such as Universal Serial Bus (USB) (USB 2.0 Host, USB 3.0 Host).

    [0019] The mega cells and input and output terminals in the system LSI are usually arranged close to each other so that the wiring distance on the semiconductor element is short. FIG. 9 schematically shows an example of arrangement of the input and output terminals in the system LSI. As shown in FIG. 9, in the case where two image output terminals (VO1, VO2) are provided, these two output terminals are placed close to each other. Similarly, in the case where two input and output terminals of the high-speed communication interface (FT1, FT2) are provided, the two input and output terminals are also arranged close to each other.

    [0020] Referring to the block diagram of FIG. 8, in, e.g., in-vehicle applications, the image output terminals are connected to a front-seat monitor device (Front Monitor) mounted on a console etc. of a front seat and a rear-seat monitor device (Rear Monitor) mounted on the rear seat side. An electronic control unit (ECU) on which the SOC 500 is mounted is often arranged in a middle part of the vehicle, e.g., between the front seat and the rear seat. As shown in FIG. 9, in the case where the two image output terminals are disposed at a single location, the wiring distance between one of the front-seat monitor device and the rear-seat monitor device and the SOC 500 may be long. Due to long wiring to one of the monitor devices on a wiring board of the ECU, the wiring board of the ECU may be increased in size. The long wiring increases radiation noise, which may affect other circuits. Moreover, the wiring is subjected to external noise, which may reduce reliability of signals. Accordingly, it is preferable that such a semiconductor module as the SOC 500 be designed in view of the environment in which the semiconductor module is to be used.

    [0021] FIGS. 13 to 15 show examples of the configuration of the semiconductor device 1 having the semiconductor module 5 shown in FIGS. 10 to 12 mounted on the main substrate 3. FIG. 13 schematically shows an example of the semiconductor device 1 (1C) having surface-mounted on the main substrate 3 the system LSI 5C serving as the semiconductor module 5. FIG. 14 schematically shows an example of the semiconductor device 1 (1M) having surface-mounted on the main substrate 3 the multichip module 5M serving as the semiconductor module 5. FIG. 15 schematically shows an example of the semiconductor device 1 (IP) having surface-mounted on the main substrate 3 the SIP 5P serving as the semiconductor module 5.

    [0022] As shown in FIG. 2, the present embodiment shows an example in which the semiconductor module 5 includes a single semiconductor element 51. The semiconductor element 51 is a system SLI (also referred to as a system on a chip (SOC)) having integrated on a single semiconductor element a plurality of circuit blocks (mega cells) having specific functions. The semiconductor module 5 includes the support substrate 21, bonding wires 25, electrode patterns 26, and a mold portion 22. The semiconductor element 51 is mounted on the upper surface 21a (mount surface) that is one surface of the support substrate 21. The electrode patterns 26 corresponding to each electrode pad (not shown) formed on the semiconductor element 51 are formed on the upper surface 21a. The electrode pads and the electrode patterns 26 are connected by the bonding wires 25. The electrode patterns 26 are electrically connected via through holes 27 to the lower surface 21b (terminal surface) that is located on the opposite side from the upper surface 21a. Spherical bumps that serve as the terminals 10 (connection terminals) of the semiconductor module 5 are formed on the lower surface 21b so as to be electrically connected to the electrode patterns 26.

    [0023] The semiconductor element 51 and the bonding wires 25 are molded with, e.g., a resin material. In the semiconductor module 5 shown in FIG. 2, the support substrate 21 and the mold portion 22 correspond to a package 2 that accommodates the semiconductor element 51. As described above, the package 2 has the terminals 10, namely ball-shaped terminals (spherical bumps), formed on its lower surface 2r so as to project from the lower surface 2r. A ball grid array (BGA) semiconductor module 5 is thus formed. The semiconductor modules 5 (5C, 5M, 5P) shown in FIGS. 10 to 12 are also BGA semiconductor modules 5.

    [0024] FIG. 3 is a schematic perspective view of the lower surface 21b (the terminal surface, the lower surface 2r of the package 2) of the semiconductor module 5 as viewed from the upper surface 21a (the mount surface of the support substrate 21) side. In FIG. 3, dashed circles show the terminals 10. The number of terminals 10, the size of the terminals 10, the intervals therebetween, etc. are schematically shown in FIG. 3. In the present embodiment, the terminals 10 include an inner peripheral terminal group 15 arranged in a rectangular pattern in the central part of the package 2, and an outer peripheral terminal group 17 arranged in a rectangular ring (in this example, in three rectangular rings) along the outer peripheral part of the package 2. The inner peripheral terminal group 15 is mainly comprised of those terminals 10 which are connected to power supply electrode pads of the semiconductor element 51.

    [0025] The inner peripheral terminal group 15 has terminals 10 in its central part as well and has no space in the center. In the inner peripheral terminal group 15 consisting of 36 terminals 10 in FIG. 3, however, the four terminals 10 located in the central part, the outermost twenty terminals 10, and the twelve terminals 10 located between the four terminals 10 in the central part and the outermost twenty terminals 10 are arranged in rectangular rings (in three rectangular rings). Accordingly, even though the terminals 10 are closely arranged like the inner peripheral terminal group 15 shown in FIG 3, it can be said that the terminals 10 are arranged in rectangular rings.

    [0026] The inner peripheral terminal group 15 is located substantially immediately under the semiconductor element 51 (at a position where the inner peripheral terminal group 15 at least partially overlaps the semiconductor element 51 as viewed in the direction perpendicular to the surface of the support substrate 21 (the direction perpendicular to the support substrate). The direction perpendicular to the surface of the main substrate 3 (the direction perpendicular to the main substrate) with the semiconductor module 5 being mounted on the main substrate 3 is substantially synonymous with the direction perpendicular to the support substrate, if component tolerance and mount variation are ignored. Accordingly, the direction perpendicular to the main substrate and the direction perpendicular to the support substrate are regarded as the same direction in the specification and the drawings unless otherwise specified.

    [0027] Since the inner peripheral terminal group 15 is located substantially immediately under the semiconductor element 51 and the power supply terminals are included in the inner peripheral terminal group 15, electric power can be supplied to the semiconductor element 51 with the minimum influence of electrical resistance and inductance. In the case where the semiconductor module 5 has a plurality of semiconductor elements 51 as shown in FIGS. 10 to 12, the inner peripheral terminal group 15 is placed immediately under the semiconductor element 51 (target semiconductor element) to which electric power is to be supplied through the inner peripheral terminal group 15. The terminals 10 of the outer peripheral terminal group 17 are signal terminals that are connected to the in-vehicle information terminal (a monitor device, a camera, a disk device, etc.).

    [0028] As shown in FIG. 1, the semiconductor module 5 mounted on the semiconductor device 1 is connected to the front-seat monitor device 71, the rear-seat monitor device 72, the hard disk device 73, the DVD player 74, the rear camera 76, etc. In the present embodiment, the front-seat monitor device 71 is connected to a first image output terminal group 31 (VO1) that will be described later with reference to FIG. 4 etc. through a first surface wiring pattern 311 and a first substrate terminal group 301 which will be described later. The rear-seat monitor device 72 is connected to a second image output terminal group 32 (VO2) through a second surface wiring pattern 312 and a second substrate terminal group 302 which will be described later. The hard disk device 73 is connected to a first high-speed communication interface (IF) terminal group 33 (FT1), and the DVD player 74 is connected to a second high-speed communication interface (IF) terminal group 34 (FT2) through the first surface wiring pattern 311 and the first substrate terminal group 301. The rear camera 76 is connected to a video input terminal group 39 (VI).

    [0029] In the case where the two image output terminal groups, namely the first image output terminal group 31 (VO1) and the second image output terminal group 32 (VO2), are disposed at a single location as shown in FIG. 9, the wiring distance between one of the front-seat monitor device 71 and the rear-seat monitor device 72 and the semiconductor module 5 may be long. Similarly, in the case where the two high-speed communication interface terminal groups, namely the first high-speed communication interface terminal group 33 (FT1) and the second high-speed communication interface terminal 34 (FT2), are disposed at a single location as shown in FIG. 9, the wiring distance between one of the hard disk device 73 and the DVD player 74 and the semiconductor module 5 may be long. Due to the need for long wiring to one of the two devices on the main substrate 3 of the semiconductor device 1, the main substrate 3 of the semiconductor device 1 may be increased in size. The long wiring increases radiation noise, which may affect other circuits. Moreover, the wiring is subjected to external noise, which may reduce reliability of signals.

    [0030] As a solution to this, in the present embodiment, as shown in FIG. 4, the first image output terminal group 31 (VO1) is located on a module first side 2a of the support substrate 21, and the second image output terminal group 32 (VO2) is located on a module second side 2c that is the opposite side from the module first side 2a. That is, as shown in FIGS. 1 and 4, the first image output terminal group 31 (VO1) is located on the front-seat monitor device 71 side, and the second image output terminal group 32 (VO2) is located on the rear-seat monitor device 72 side. This arrangement can achieve appropriate wiring distances between both the front-seat monitor device 71 and the rear-seat monitor device 72 and the semiconductor module 5. Examples of allocation of the terminals 10 in FIG. 4 and the subsequent figures are similarly shown by perspective views of the semiconductor module 5 as viewed from the upper surface 21a (the mount surface of the support substrate 21) side.

    [0031] The first image output terminal group 31 (VO1) and the second image output terminal group 32 (VO2) are terminal groups complying with, e.g., the High-Definition Multimedia Interface (HDMI) (registered trademark) standard or the Low Voltage Differential Signaling (LVDS) standard. The first image output terminal group 31 (VO1) and the second image output terminal group 32 (VO2) may comply with the same standard or different standards.

    [0032] Moreover, in the present embodiment, as shown in FIG. 4, the first high-speed communication interface terminal group 33 (FT1) is located on the module first side 2a, and the second high-speed communication interface terminal group 34 (FT2) is located on the module second side 2c that is the opposite side from the module first side 2a. That is, as shown in FIGS. 1 and 4, the first high-speed communication interface terminal group 33 (FT1) is located on the hard disk device 73 side, and the second high-speed communication interface terminal group 34 (FT2) is located on the DVD player 74 side. This arrangement can achieve appropriate wiring distances between both the hard disk device 73 and the DVD player 74 and the semiconductor module 5.

    [0033] The first high-speed communication interface terminal group 33 (FT1) and the second high-speed communication interface terminal group 34 (FT2) are terminal groups complying with, e.g., a standard such as Serial AT Attachment (SATA), Peripheral Component Interconnect Express (PCIe), Universal Serial Bus (USB) 2.0, or USB 3.0. Like the image output terminal groups, the first high-speed communication interface terminal group 33 (FT1) and the second high-speed communication interface terminal group 34 (FT2) may comply with the same standard or different standards.

    [0034] In the present embodiment, the video input terminal group 39 (VI) is also located on the module second side 2c, which can achieve an appropriate wiring distance between the rear camera 76 disposed in the rear of the vehicle and the semiconductor module 5. In FIG. 4, a card interface (IF) terminal group 36 (CRD) is a terminal group that is connected to a reader/writer of a memory card such as an SD memory card or a multimedia card (MMC). In recent years, such a memory card reader/writer is sometimes mounted on the console of the front seat. Accordingly, in the present embodiment, the card interface terminal group 36 (CRD) is located on the module first side 2a.

    [0035] A wireless communication interface (IF) terminal group 38 (WLT) is a terminal group that is connected to a communication device (a router etc.) adapted to WiFi or Ethernet (registered trademark) Audio/Video Bridging (AVB). In view of the transmission and reception environment, it is preferable that the communication device be placed near the windshield. In the present embodiment, the wireless communication interface terminal group 38 (WLT) is located on the module first side 2a.

    [0036] Other terminal groups, for example, a medium to low-speed communication interface (IF) terminal group 37 (SMT) and an audio interface (IF) terminal group 41 (AU), are located at appropriate positions in view of wiring to devices to which these terminal groups are to be connected, although the priority for these terminal groups is lower than that for the above terminals.

    [0037] In the semiconductor element 51, a signal processing unit that performs signal processing implementing a function corresponding to the first image output terminal group 31 (VO1) and a signal processing unit that performs signal processing implementing a function corresponding to the second image output terminal group 32 (VO2) have many common circuit configurations. Similarly, in the semiconductor element 51, a signal processing unit that performs signal processing implementing a function corresponding to the first high-speed communication interface terminal group 33 (FT1) and a signal processing unit that performs signal processing implementing a function corresponding to the second high-speed communication interface terminal group 34 (FT2) have many common circuit configurations. It is therefore preferable that the signal processing units having the same function (similar functions) and a power unit (power supply unit) that supplies electric power to the signal processing units be located close to each other in the semiconductor element 51.

    [0038] FIG. 5 schematically shows the relationship between signal processing units (53, 54, 55, 56) and power units (57, 58) for the image output terminal groups (31, 32) and the high-speed communication interface terminal groups (33, 34) and the terminal groups (31, 32, 33, 34). The first image output processing unit 53 (B-VO1) is a signal processing unit that performs signal processing implementing a function corresponding to the first image output terminal group 31 (VO1), and the second image output processing unit 54 (B-VO2) is a signal processing unit that performs signal processing implementing a function corresponding to the second image output terminal group 32 (VO2). The first high-speed communication processing unit 55 (B-FT1) is a signal processing unit that performs signal processing implementing a function corresponding to the first high-speed communication interface terminal group 33 (FT1), and the second high-speed communication processing unit 56 (B-FT2) is a signal processing unit that performs signal processing implementing a function corresponding to the second high-speed communication interface terminal group 34 (FT2). The image output power unit 57 (PW-VO) is a power supply unit that supplies common operating power to the first image output processing unit 53 (B-VO1) and the second image output processing unit 54 (B-VO2), and the high-speed communication power unit 58 (PW-FT) is a power supply unit that supplies common operating power to the first high-speed communication processing unit 55 (B-FT1) and the second high-speed communication processing unit 56 (B-FT2).

    [0039] The first image output processing unit 53 (B-VO1), the second image output processing unit 54 (B-VO2), and the image output power unit 57 (PW-VO) are located close to each other in a continuous region in the semiconductor element 51. Similarly, the first high-speed communication processing unit 55 (B-FT1), the second high-speed communication processing unit 56 (B-FT2), and the high-speed communication power unit 58 (PW-FT) are also located close to each other in a continuous region in the semiconductor element 51.

    [0040] The first image output processing unit 53 (B-VO1) is electrically connected to a first image output electrode group 81 (electrode pad group) (E-VO1) on the semiconductor element 51, and the first image output electrode group 81 (E-VO1) and the electrode patterns 26 on the back side of the first image output terminal group 31 (VO1) are electrically connected by, e.g., the bonding wires 25 in the package 2. The second image output processing unit 54 (B-VO2) is electrically connected to a second image output electrode group 82 (electrode pad group) (E-VO2) on the semiconductor element 51, and the second image output electrode group 82 (E-VO2) and the electrode patterns 26 on the back side of the second image output terminal group 32 (VO2) are electrically connected by, e.g., the bonding wires 25 in the package 2. In the present embodiment, the second image output processing unit 54 (B-VO2) and the second image output electrode group 82 (E-VO2) are located close to each other, but the first image output processing unit 53 (B-VO1) and the first image output electrode group 81 (E-VO1) are separated from each other. Accordingly, the first image output processing unit 53 (B-VO1) and the first image output electrode group 81 (E-VO1) are electrically connected through the inside of a circuit with other functions which is formed in the central part of the semiconductor element 51.

    [0041] Similarly, the first high-speed communication processing unit 55 (B-FT1) is electrically connected to a first high-speed communication electrode group 83 (electrode pad group) (E-FT1) on the semiconductor element 51, and the first high-speed communication electrode group 83 (E-FT1) and the electrode patterns 26 on the back side of the first high-speed communication interface terminal group 33 (FT1) are electrically connected by, e.g., the bonding wires 25 in the package 2. The second high-speed communication processing unit 56 (B-FT2) is electrically connected to a second high-speed communication electrode group 84 (electrode pad group) (E-FT2) on the semiconductor element 51, and the second high-speed communication electrode group 84 (E-FT2) and the electrode patterns 26 on the back side of the second high-speed communication interface terminal group 34 (FT2) are electrically connected by, e.g., the bonding wires 25 in the package 2. In the present embodiment, the second high-speed communication processing unit 56 (B-FT2) and the second high-speed communication electrode group 84 (E-FT2) are located close to each other, but the first high-speed communication processing unit 55 (B-FT1) and the first high-speed communication electrode group 83 (E-VO1) are separated from each other. Accordingly, the first high-speed communication processing unit 55 (B-FT1) and the first high-speed communication electrode group 83 (E-FT1) are electrically connected through the inside of a circuit with other functions, which is formed in the central part of the semiconductor element 51.

    [0042] As described above with reference to FIG. 2, the semiconductor module 5 has the semiconductor element 51 mounted on the mount surface (upper surface 21a) of the support substrate 21 and has the terminals 10 formed on the lower surface 21b that is located on the opposite side from the upper surface 21a. That is, the semiconductor element 51 and the terminals 10 are connected via wiring (including the through holes 27) formed in the support substrate 21. FIG. 5 shows an example in which the electrode pad groups are located in separate regions in the semiconductor element 51 and each electrode pad group and each terminal group (electrode patterns 26) which are located close to each other are connected by the bonding wires 25. However, even if each electrode pad group and each terminal group are not located close to each other, the terminal groups may be located in different regions (on the opposite sides) by using wiring on the support substrate 21.

    [0043] For example, in FIG. 5, the first image output electrode group 81 (E-VO1) located on the opposite side from the side on which the second image output electrode group 82 (E-VO2) is located may be located adjacent to the second image output electrode group 82 (electrode pad group). In this case, the first image output electrode group 81 (E-VO1) and the electrode patterns 26 formed on the upper surface 21a of the support substrate 21 are connected by the bonding wires 25 at a position near the first image output electrode group 81 (E-VO1). These electrode patterns 26 are formed at a position that is not located on the same side as the first image output terminal group 31 (VO1). Wiring patterns extending in the support substrate 21 (the upper surface 21a or an inner wiring layer) are formed between these electrode patterns 26 and the back surface of the first image output terminal group 31 (VO1).

    [0044] In each example, common operating power is supplied from the common power supply unit to the signal processing units having the same function (similar functions). This configuration restrains an increase in circuit scale of the semiconductor element 51 because the terminals 10 are arranged in separate regions.

    [0045] As described above, the semiconductor module 5 has a single rectangular package 2 having a plurality of terminals 10, and a first module terminal group 11 and a second module terminal group 12 which are terminal groups each having one of an image output function and a communication interface function. In the above description, the first image output terminal group 31 (VO1) and the first high-speed communication interface terminal group 33 (FT1) correspond to the first module terminal group 11. In the above description, the second image output terminal group 32 (VO2) and the second high-speed communication interface terminal group 34 (FT2) correspond to the second module terminal group 12. As described above, the first module terminal group 11 (31, 33) is located on the module first side 2a, and the second module terminal group 12 (32, 34) is located on the module second side 2c that is the opposite side from the module first side 2a.

    [0046] The above description shows an example in which both the terminal groups having the image output function and the terminal groups having the communication interface function include the first module terminal group 11 and the second module terminal group 12. However, the semiconductor module 5 need only have a plurality of terminal groups having one of these functions. That is, the semiconductor module 5 may have the first module terminal group 11 and the second module terminal group 12 as terminal groups having the image output function, or may have the first module terminal group 11 and the second module terminal group 12 as terminal groups having the communication interface function.

    [0047] The semiconductor module 5 further includes a first signal processing unit 61 that performs signal processing implementing a function corresponding to the first module terminal group 11, a second signal processing unit 62 that performs signal processing implementing a function corresponding to the second module terminal group 12, and a power supply unit 63 that supplies common operating power to the first signal processing unit 61 and the second signal processing unit 62. In the above description, the first image output processing unit 53 (B-VO1) and the first high-speed communication processing unit 55 (B-FT1) correspond to the first signal processing unit 61, and the second image output processing unit 54 (B-VO2) and the second high-speed communication processing unit 56 (B-FT2) correspond to the second signal processing unit 62. The image output power unit 57 (PW-VO) and the high-speed communication power unit 58 (PW-FT) correspond to the power supply unit 63.

    [0048] The above description shows an example in which the semiconductor module 5 has the first module terminal group 11 and the second module terminal group 12 as terminal groups having the same function (similar functions). However, the number of terminal groups is not limited to two, and three or more terminal groups may be provided. FIG. 6 shows an example in which the semiconductor module 5 has a third module terminal group 13 in addition to the first module terminal group 11 and the second module terminal group 12. The third module terminal group 13 is a terminal group having one of the image output function and the communication interface function and is a terminal group having the same function as (similar function to) the first module terminal group 11 and the second module terminal group 12. In view of arrangement of peripheral devices that are connected to the semiconductor module 5 and the semiconductor module 5, it is preferable that the third module terminal group 13 be located on a module third side ("2b" or "2d") different from the module first side 2a and the module second side 2c. Since the terminal groups having the same function (similar functions) are distributed on three of the four sides of the rectangular support substrate 21, flexibility in arrangement of the peripheral devices that are connected to the semiconductor module 5 and the semiconductor module 5 is improved. Moreover, efficiency of wiring between the semiconductor module 5 and each peripheral device is also improved.

    [0049] FIG. 6 shows an example in which the semiconductor module 5 has a third high-speed communication interface (IF) terminal group 35 (FT3) as the third module terminal group 13 having a high-speed communication interface function. In FIG 6, the third high-speed communication interface terminal group 35 is located on the side shown by reference character "2d," and the side "2d" is the module third side. It should be understood that the third high-speed communication interface terminal group 35 (FT3) may be located on the side shown by reference character "2b." In this case, the side "2b" is the module third side.

    [0050] In the examples described above with reference to FIGS. 4, 6, etc., the first module terminal group 11 is placed so that the terminals thereof are located next to each other along the module first side 2a, and the second module terminal group 12 is placed so that the terminals thereof are located next to each other along the module second side 2c. By placing the terminal groups so that the terminals are located next to each other along the opposite sides in this manner, efficient wiring can be implemented in the case where devices to which the terminal groups are connected are placed with the semiconductor module 5 interposed therebetween. However, the first module terminal group 11 need only be located relatively close to the module first side 2a, and the second module terminal group 12 need only be located relatively close to the module second side 2c. Such arrangement is effective in improving wiring efficiency.

    [0051] That is, like the first high-speed communication interface terminal group 33 (FT1) in FIG. 7, even when a terminal group is placed along the side "2d" between the module first side 2a and the module second side 2c so that the terminals thereof are located next to each other in the direction perpendicular to the module first side 2a, the terminal group need only be located close to the module first side 2a relative to the second high-speed communication interface terminal group 34 (FT2). Similarly, like second high-speed communication interface terminal group 34 (FT2) in FIG. 7, even when a terminal group is placed along the side "2d" between the module second side 2c and the module first side 2a so that the terminals thereof are located next to each other in the direction perpendicular to the module second side 2c, the terminal group need only be located close to the module second side 2c relative to the first high-speed communication interface terminal group 33 (FT1). It is more preferable that, as shown in FIG. 7, at least a part of the terminals 10 of the first high-speed communication interface terminal group 33 (FT1) be located along the module first side 2a. Similarly, it is more preferable that at least a part of the terminals 10 of the second high-speed communication interface terminal group 34 (FT2) be located along the module second side 2c.

    [0052] As described above, the semiconductor element 51 has the terminal arrangement according to the semiconductor element 51. However, the terminal arrangement can be changed on the support substrate 21. That is, the arrangement of the terminals 10 of the semiconductor module 5 may be set on the support substrate 21 so as to achieve the terminal arrangement suitable for being mounted on the main substrate 3. By connecting the plurality of semiconductor elements 51 on the support substrate 21, the terminals that are connected only between the semiconductor elements 51 can be eliminated from the terminals 10 of the semiconductor module 5. Since the total number of terminals 10 is reduced, the terminals 10 can be arranged more appropriately. FIG. 16 shows the relationship between the terminal arrangement of the processor 51b (semiconductor chip) and the terminal arrangement of the multichip module 5M in the case where the processor 51b and the memory 51q are mounted as in the multichip module 5M shown in FIG. 11.

    [0053] In FIG. 16, each terminal group (a plurality of element terminals) of the processor 51b is as follows. MEM1 and MEM2 represent terminal groups that are connected to the memory 51q, VO1, VO2, VO3, and VO4 represent image output terminal groups, FT1, FT2, FT3, and FT4 represent high-speed communication interface terminal groups, VI represents a video input terminal group. In the processor 51b, the four types of image output terminal groups are located on the same side of a chip, and the four types of high-speed communication interface terminals are also located on the same side of the chip.

    [0054] VO1, VO2, VO3, VO4, FT1, FT2, FT3, and FT4 correspond to a first element terminal group and a second element terminal group which are terminal groups (a plurality of element terminals) having one of the image output function and the communication interface function. Specifically, in the case where the first element terminal group and the second element terminal group are terminal groups having the image output function, the first element terminal group corresponds to one to three of VO1, VO2, VO3, and VO4, and the second element terminal group corresponds to one or three of VO1, VO2, VO3, and VO4 which do not correspond to the first element terminal group. Similarly, in the case where the first element terminal group and the second element terminal group are terminal groups having the communication interface function, the first element terminal group corresponds one to three of FT1, FT2, FT3, and FT4, and the second element terminal group corresponds to one or three of FT1, FT2, FT3, and FT4 which do not correspond to the first element terminal group.

    [0055] The first element terminal group and the second element terminal group are located on the same side of a package. Specifically, in the case where the first element terminal group and the second element terminal group are terminal groups having the image output function, all of the terminal groups VO1, VO2, VO3, VO4 having the image output function are located on the side shown by reference character "50b." In the case where the first element terminal group and the second element terminal group are terminal groups having the communication interface function, all of the terminal groups FT1, FT2, FT3, FT4 having the communication interface function are located on the side shown by reference character "50d."

    [0056] As described above, the semiconductor module 5 is a multichip module 5M having at least the processor 51b (semiconductor chip) mounted on the support substrate 21. In the multichip module 5M, the plurality of element terminals and the plurality of terminals 10 (connection terminals) have been rearranged on the support substrate 21. FIG 16 shows an example in which the plurality of element terminals and the plurality of terminals 10 (connection terminals) have been rearranged so that at least the first element terminal group (VO1 of the processor 51b) is connected to the first module terminal group (the first image output terminal group 31 (VO1)) and the second element terminal group (VO2, VO3, and VO4 of the processor 51b) is connected to the second module terminal group (the second image output terminal group 32 (32a, 32b, 32c) (VO2)). In the processor 51b, all of the terminal groups VO1, VO2, VO3, VO4 having the image output function are located on the side shown by reference character "50b." In the multichip module 5M, however, VO1 is located on the module first side 2a, and VO2, VO3, and VO3 are located on the module second side 2c that is the opposite side from the module first side 2a. The terminal groups having the high-speed communication interface function are also distributed on different sides of the semiconductor module, but not on the opposite sides of the semiconductor module.

    [0057] As described above, in the semiconductor module 5, the four types of image output terminal groups are distributed on different sides of the chip, and the four types of high-speed communication interface terminal groups are also distributed on different sides of the chip. Since MEM1 and MEM2 of the processor 51b are connected to the memory 51q on the support substrate 21 of the semiconductor module 5, MEM1 and MEM2 can be eliminated from the terminal groups of the semiconductor module 5. Flexibility in terminal arrangement in the semiconductor module 5 is thus improved. FIG. 17 schematically shows terminal arrangement corresponding to the semiconductor module 5 of FIG. 16. FIG. 17 shows an example of terminal arrangement by a perspective view of the lower surface of the semiconductor module 5 as viewed from the upper surface (the upper surface 21a of the support substrate 21) side.

    [0058] FIGS. 18 to 21 show a navigation unit 70 (image display unit) on which the semiconductor device 1 is mounted. The navigation unit 70 is what is called a unit equipped with a display, which includes the front-seat monitor device 71, and is accommodated in, e.g., a middle part (console) of a dashboard of a vehicle. The front-seat monitor device 71 corresponds to the first display device that is mounted on the dashboard of the vehicle, and is mounted so that a display surface thereof faces toward the rear R in the longitudinal direction FR of the vehicle. That is, the navigation unit 70 is accommodated in the middle part of the dashboard located closer to the front F than an occupant in a passenger compartment, and is mounted so that the occupant can see the front-seat monitor device 71. The navigation unit 70 includes a display unit 70a having the front-seat monitor device 71 and a card slot 701, and a body unit 70b that accommodates the semiconductor device 1 shown in FIG. 21. The display unit 70a and the body unit 70b are configured with different housings and are mechanically coupled with metal fittings etc. The display unit 70a and the body unit 70b are electrically connected via a display connector 702 that will be described later. When the navigation unit 70 is mounted on the dashboard, the display unit 70a is located closer to the rear R than the body unit 70b.

    [0059] As shown in FIG. 19, the display connector 702 that connects the display unit 70a and the semiconductor device 1 is provided in the body unit 70b so as to project beyond the body unit 70b. A connector group 700 that electrically connects the semiconductor device 1 and other devices is also provided in the body unit 70b so as to project beyond the body unit 70b. Examples of other devices include the rear-seat monitor device 72, a sub-display that is mounted on a meter panel of a vehicle, a center display that is mounted on a dashboard and displays operational information of an in-vehicle device such as an air conditioner, an outside temperature, or an audio device, the rear camera 76, and an in-vehicle communication device using a mobile phone network. The sub-display, the center display, the rear-seat monitor device 72, etc. correspond to the second display device.

    [0060] FIG. 21 schematically shows the main substrate 3 on which the semiconductor module 5 is mounted. Thick solid arrows and thick dashed arrows in FIG. 21 schematically show the direction of wiring from the semiconductor module 5 to the substrate terminal groups (301, 302) of the main substrate 3. The surface wiring patterns (311, 312) are formed in the surface wiring layer 30a of the main substrate 3 so as to extend substantially along these arrows.

    [0061] As shown in FIG. 21, terminals are provided on a substrate first side 3a of the main substrate 3 which is located on the rear R side in the longitudinal direction FR of the vehicle and a substrate second side 3c of the main substrate 3 which is located on the front F side in the longitudinal direction FR of the vehicle. That is, the main substrate 3 has terminal groups on the substrate first side 3a and the substrate second side 3c which are the opposite sides in the longitudinal direction FR. As described above, the display unit 70a is located closer to the rear R than the body unit 70b when the navigation unit 70 is mounted on the dashboard. Accordingly, the display connector 702 that transmits signals to and from the display unit 70a is placed on the substrate first side 3a that is located on the rear R side when the navigation unit 70 is mounted on the dashboard. The connector group 700 (703, 704, 706, etc.) is placed on the substrate second side 3c. The display connector 702 corresponds to the first substrate terminal group 301 and transmits image output signals, communication interface signals of PCIe, USB, etc. to the front-seat monitor device 71. Terminals corresponding to an image output (Al) to the front-seat monitor device 71 and communication interfaces (A2, A3) such as PCIe and USB are provided on the side of the semiconductor module 5 which faces the substrate first side 3a (the display connector 702 side) of the main substrate 3 when the semiconductor module 5 is mounted on the main substrate 3.

    [0062] Terminal groups corresponding to image outputs (C1, C2) to a meter display, a center display, the rear-seat monitor device 72, etc. and a communication interface (C4) complying with the LVDS standard are provided on the side of the semiconductor module 5 which faces a different side from the substrate first side 3a, namely in this example, on the side of the semiconductor module 5 which faces the substrate second side 3c (the connector group 700 side) of the main substrate 3, i.e., the opposite side from the substrate first side 3a. As described above, these terminal groups are connected to devices different from the navigation unit 70 via the connectors (703, 704, 706). The connector group 700 corresponds to the second substrate terminal group 302. A terminal group corresponding to an interface (C5) with an LTE module for mobile phone communication is provided on the side of the semiconductor module 5 which is located closer to the substrate second side 3c than to the substrate first side 3a so that the terminals thereof are arranged along the substrate third side 3b.

    [0063] As described above, the first module terminal group 11 and the second module terminal group 12 are module terminal groups having the image output function. The first substrate terminal group 301 and the second substrate terminal group 302 are substrate terminal groups that are connected to the image display device. The main substrate 3 is provided in the navigation unit 70 (image display unit) including the front-seat monitor device 71 (first display device). The first substrate terminal group 301 is connected to the front-seat monitor device 71 (first display device) in the navigation unit 70 (image display unit). The second substrate terminal group 302 is connected to the connector group 700 (external output terminal) provided in the navigation unit 70 (image display unit). The second substrate terminal group 302 is connected to the image display device (second display device such as the meter display, the center display, or the rear-seat monitor device 72) provided independently of the navigation unit 70 (image display unit) via the connector group 700 (external output terminals).

    [0064] FIGS. 22 to 25 show a multimedia unit 80 (image display unit) on which the semiconductor device 1 is mounted. The multimedia unit 80 is accommodated in, e.g., the lower part of a vehicle seat or the lower part of a trunk room (cargo room). The multimedia unit 80 includes a navigation unit 810 and an audio unit 820. The semiconductor device 1 shown in FIG. 25 is accommodated in the navigation unit 810. As shown in FIG. 24, the navigation unit 810 includes a connector group 800.

    [0065] The semiconductor device 1 in the navigation unit 810 and the audio unit 820 are connected by a connection connector 802. As shown in FIG. 23, the connection connector 802 of the audio unit 820 is shown by reference character "802b." As shown in FIG. 25, the connection connector 802 of the navigation unit 810 (the semiconductor device 1) is shown by reference character "802a." As shown in FIG. 24, the audio unit 820 includes a display connector 801a (including also 801b and 801c). The display connector 801a transmits image output signals to the front-seat monitor device 71, and the connectors 801b, 801c transmit communication interface signals of PCIe, USB, etc. to the front-seat monitor device 71.

    [0066] Like FIG. 21, FIG. 25 schematically shows the main substrate 3 on which the semiconductor module 5 is mounted. Thick solid arrows and thick dashed arrows in FIG. 25 also schematically show the direction of wiring from the semiconductor module 5 to the substrate terminal groups (301, 302) of the main substrate 3. The surface wiring patterns (311, 312) are formed in the surface wiring layer 30a of the main substrate 3 so as to extend substantially along these arrows.

    [0067] As shown in FIG. 25, terminals corresponding to the image output (Al) to the front-seat monitor device 71 and the communication interfaces (A2, A3, A4) such as PCIe and USB are provided on the side of the semiconductor module 5 which faces the substrate first side 3a (the connection connector 802 side) of the main substrate 3 when the semiconductor module 5 is mounted on the main substrate 3. In the present embodiment, these signals are transmitted through the connection connector 802 to a sub-substrate 821 (another substrate) accommodated in the audio unit 820, and are transmitted to the front-seat monitor device 71 through the display connector 801a (and 801b, 801c) mounted on the sub-substrate 821. Of the connection connector 802, the connector "802a" in the main substrate 3 corresponds to the first substrate terminal group 301.

    [0068] Terminal groups corresponding to image outputs (C1, C2, C3) to a meter display, a center display, etc. and a communication interface (C4) complying with the LVDS standard are provided on the side of the semiconductor module 5 which faces a different side from the substrate first side 3a, namely in this example, on the side of the semiconductor module 5 which faces the substrate second side 3c (the connector group 800 side) of the main substrate 3, i.e., the opposite side from the substrate first side 3a. These terminal groups are connected to devices different from the multimedia unit 80 via the connectors (803, 804, 805, 806). The connector group 800 corresponds to the second substrate terminal group 302. A terminal group corresponding to the interface (C5) with the LTE module for mobile phone communication which is mounted on the main substrate 3 is provided on the side of the semiconductor module 5 which faces the substrate second side 3c.

    [0069] As described above, the first module terminal group 11 and the second module terminal group 12 are module terminal groups having the image output function. The first substrate terminal group 301 and the second substrate terminal group 302 are substrate terminal groups that are connected to the image display device. The main substrate 3 is provided in the multimedia unit 80 (image display unit). One of the first substrate terminal group 301 and the second substrate terminal group 302 (in the above example, the first substrate terminal group 301) is connected to the front-seat monitor device 71 (first display device) provided independently of the multimedia unit 80 (image display unit) via the display connectors (first external output terminal: 801a, 801b, 801c) provided in the multimedia unit 80 (image display unit). The other of the first substrate terminal group 301 and the second substrate terminal group 302 (in the above example, the second substrate terminal group 302) is connected to an image display device (second display device such as the meter display, the center display, or the rear-seat monitor device 72) provided independently of both the multimedia unit 80 (image display unit) and the front-seat monitor device 71 (first display device) via the connector group 800 (second external output terminals) provided in the multimedia unit 80 (image display unit). The multimedia unit 80 (image display unit) includes at least one substrate (sub-substrate 821) different from the main substrate 3. One of the first substrate terminal group 301 and the second substrate terminal group 302 (in the above example, the first substrate terminal group 301) is connected to the image display device (in the above example, the front-seat monitor device 71 (first display device) via this different substrate (sub-substrate 821).

    [0070] Unlike the examples shown in FIGS. 22 to 25, one (first substrate terminal group 301) of the first substrate terminal group 301 and the second substrate terminal group 302 may be connected to the front-seat monitor device 71 (first display unit) via the connector group 800 (second external output terminals) provided in the multimedia unit 80 (image display unit). In this case, the other (second substrate terminal group 302) of the first substrate terminal group 301 and the second substrate terminal group 302 may be connected to an image display device (second display device such as the meter display, the center display, or the rear-seat monitor device 72) provided independently of both the multimedia unit 80 (image display unit) and the front-seat monitor device 71 (first display device) via the display connectors 801a, 801b, 801c (first external output terminals) provided in the multimedia unit 80 (image display unit).

    [Summary of Embodiment]



    [0071] A brief summary of the image display system, the semiconductor device (1) and the semiconductor module (5) described above will be provided below.

    [0072] In one aspect, a semiconductor device (1) includes: a semiconductor module (5) including a rectangular plate-like support substrate (21) that supports and fixes at least one semiconductor element (51) on an upper surface (21a) of the support substrate (21), and a plurality of connection terminals (10) that are arranged planarly along a lower surface (21b) of the support substrate (21) and that are electrically connected to the semiconductor element (51); and a main substrate (3) that has a plurality of wiring layers (30a, 30b, 30c, 30z) and that has the semiconductor module (5) surface-mounted thereon via the plurality of connection terminals (10). The plurality of connection terminals (10) are arranged in a plurality of rectangular rings along each side of the support substrate (21), and include a first module terminal group (11) and a second module terminal group (12) which are terminal groups having one of an image output function and a communication interface function. The first module terminal group (11) is located on a module first side (2a) that is one side of the support substrate (21). The second module terminal group (12) is located on a module second side (2c) that is an opposite side from the module first side (2a). The main substrate (3) includes a first substrate terminal group (301) and a second substrate terminal group (302) which are connected to one of an image display device (71, 72) and a communication device (73, 74). The first substrate terminal group (301) is located on a substrate first side (3a) that is one side of the main substrate (3). The second substrate terminal group (302) is located on a substrate second side (3c) that is an opposite side from the substrate first side (3a). The semiconductor module (5) is surface-mounted on a surface wiring layer (30a) of the main substrate (3) so that the module first side (2a) is located closer to the substrate first side (3a) than the module second side (2c) and the module second side (2c) is located closer to the substrate second side (3c) than the module first side (2a). The first module terminal group (11) and the first substrate terminal group (301) are connected by a first surface wiring pattern (311) formed in the surface wiring layer (30a). The second module terminal group (12) and the second substrate terminal group (302) are connected by a second surface wiring pattern (312) formed in the surface wiring layer (30a).

    [0073] In one aspect, in a semiconductor module (5) including a rectangular plate-like support substrate that supports and fixes at least one semiconductor element on an upper surface of the support substrate, and a plurality of connection terminals that are arranged planarly along a lower surface of the support substrate and that are electrically connected to the semiconductor element, the connection terminals (10) include a first module terminal group (11) and a second module terminal group (12) which are terminal groups having one of an image output function and a communication interface function, and the first module terminal group (11) is located on a module first side (2a) that is one side of the support substrate (21), and the second module terminal group (12) is located on a module second side (2c) that is an opposite side from the module first side (2a).

    [0074] With this configuration, the plurality of types of terminal groups having the image output function (or the plurality of types of terminal groups having the communication interface function) in the semiconductor module (5) are arranged according to the positions where circuits (including terminals such as a connector) corresponding to each function are located on the main substrate (3) on which the semiconductor module (5) is mounted. Accordingly, when the semiconductor module (5) is mounted on the main substrate (3), connection can be made by using the wiring patterns (the first surface wiring pattern (311), the second surface wiring pattern (312)) formed in the surface wiring layer (30a). As a result, the number of wiring patterns to be formed in an inner layer of the main substrate (3) can be reduced, which can restrain an increase in the number of layers of the main substrate (3). In the semiconductor module (5) itself as well, terminals are arranged in view of a circuit substrate on which the semiconductor module (5) is to be mounted, whereby the semiconductor module (5) can be mounted on the circuit substrate with improved mount efficiency. With the above configuration, it is possible to provide a semiconductor device having mounted thereon a semiconductor module, in which input and output terminals adapted for the environment in which the semiconductor module is to be used are arranged, and such a semiconductor module.

    [0075] In one aspect, the semiconductor element (51) is a semiconductor chip (51b) that is a package having at least one semiconductor die enclosed therein, the semiconductor chip (51b) have a plurality of element terminals that are electrically connected to the support substrate (21), the plurality of element terminals include a first element terminal group (VO1 (FT1)) and a second element terminal group (VO2 (FT2)) which are terminal groups having one of the image output function and the communication interface function, the first element terminal group (VO1 (FT1)) and the second element terminal group (VO2 (FT2)) be located on a same side (50b (50d)) of the package, and the semiconductor module (5) be a multichip module (5M) in which the plurality of element terminals and the plurality of connection terminals (10) have been rearranged on the support substrate (21) so that at least the semiconductor chip (51b) is mounted on the support substrate (21), at least the first element terminal group (VO1 (FT1)) is connected to the first module terminal group (31 (33)), and the second element terminal group (VO2 (FT2)) is connected to the second module terminal group (32 (34)).

    [0076] Terminal arrangement in a semiconductor chip (51M) is changed on the support substrate (21), whereby the semiconductor module (5) with appropriate terminal arrangement can be implemented.

    [0077] In one preferred aspect, the first module terminal group (11) and the second module terminal group (12) are module terminal groups having the image output function, the first substrate terminal group (301) and the second substrate terminal group (302) are substrate terminal groups that are connected to the image display device, the main substrate (3) is provided in an image display unit (70) having a first display device (71) as the image display device, the first substrate terminal group (301) is connected to the first display device (71) in the image display unit (70), and the second substrate terminal group (302) is connected to an external output terminal (700) provided in the image display unit (70) and is connected via the external output terminal (700) to a second display device that is the image display device provided independently of the image display unit (70).

    [0078] With this configuration, an image display unit (70) equipped with a display, which is accommodated in a middle part (console) of a dashboard, can be appropriately configured in, e.g., a vehicle.

    [0079] In one preferred aspect, the first module terminal group (11) and the second module terminal group (12) are module terminal groups having the image output function, the first substrate terminal group (301) and the second substrate terminal group (302) are substrate terminal groups that are connected to the image display device, the main substrate (3) is provided in an image display unit (80), one of the first substrate terminal group (301) and the second substrate terminal group (302) is connected via a first external output terminal (801) provided in the image display unit (80) to a first display device (71) that is the image display device provided independently of the image display unit (80), the other of the first substrate terminal group (301) and the second substrate terminal group (302) is connected via a second external output terminal (800) provided in the image display unit (80) to a second display device that is the image display device provided independently of the image display unit (80) and the first display device (71), and the image display unit (80) includes at least one substrate (821) different from the main substrate (3), and one of the first substrate terminal group (301) and the second substrate terminal group (302) is connected to the image display device via the different substrate (821).

    [0080] With this configuration, an image display unit (80) with a separate display can be appropriately configured in, e.g., a vehicle.

    [0081] It is preferable that the first display device (71) be a display that is mounted on a dashboard of a vehicle, and the second display device be a sub-display that is mounted on a meter panel of the vehicle or a center display that is mounted on the dashboard and displays operational information of an in-vehicle device.

    [0082] With this configuration, a single image display unit (70, 80) can be appropriately connected to a plurality of display devices in, e.g., a vehicle, whereby an image display system can be configured efficiently.

    [0083] In one aspect, it is preferable that the semiconductor module (5) further include a third module terminal group (13) that is a terminal group having one of the image output function and the communication interface function and that is a terminal group having a same function as the first module terminal group (11) and the second module terminal group (12), and the third module terminal group (13) be located on a module third side (2d) of the support substrate (21) which is different from the first side (2a) and the second side (2c).

    [0084] With this configuration, the terminal groups having the same function (similar functions) are distributed on three of the four sides of the rectangular support substrate (21). This improves flexibility in arrangement of peripheral devices that are connected to the semiconductor module (5) and the semiconductor module (5) and also improves efficiency of wiring between the semiconductor module (5) and each peripheral device.

    Description of the Reference Numerals



    [0085] 

    1: Semiconductor Device

    2a: Module First Side

    2c: Module Second Side

    2b, 2d: Module Third Side

    3: Main Substrate

    3a: Substrate First Side

    3c: Substrate Second Side

    5: Semiconductor Module

    5M: Multichip Module

    10: Terminal (Connection Terminal)

    11: First Module Terminal Group

    12: Second Module Terminal Group

    13: Third Module Terminal Group

    21: Support Substrate

    21a: Upper Surface

    21b: Lower Surface

    30a: Surface Wiring Layer

    31: First Image Output Terminal Group (First Module Terminal Group)

    32: Second Image Output Terminal Group (Second Module Terminal Group)

    33: First High-Speed Communication Interface Terminal Group (First Module Terminal Group)

    34: Second High-Speed Communication Interface Terminal Group (Second Module Terminal Group)

    35: Third High-Speed Communication Interface Terminal Group (Third Module Terminal Group)

    51: Semiconductor Device

    70: Navigation Unit (Image Display Unit)

    71: Front-Seat Monitor Device (Image Display Device, First Display Unit)

    80: Multimedia Unit (Image Display Unit)

    301: First external output terminal

    302: Second external output terminal

    311: First Surface Wiring Pattern

    312: Second Surface Wiring Pattern

    821: Sub-Substrate




    Claims

    1. An image display system, comprising:

    a semiconductor device (1), comprising:

    a semiconductor module (5) including a rectangular plate-like support substrate (21) that supports and fixes at least one semiconductor element (51) on an upper surface (21a) of the support substrate (21), and a plurality of connection terminals (10) that are arranged planarly along a lower surface (21b) of the support substrate (21) and that are electrically connected to the semiconductor element (51); and

    a main substrate (3) that has a plurality of wiring layers (30a) and that has the semiconductor module (5) surface-mounted thereon via the plurality of connection terminals (10), wherein

    the plurality of connection terminals (10) are arranged in a plurality of rectangular rings along each side of the support substrate (21), and include a first module terminal group (11) and a second module terminal group (12) which are terminal groups configured for image output or which are terminal groups configured as communication interface,

    the first module terminal group (11) is located on a first side (2a) of the support substrate (21),

    the second module terminal group (12) is located on a second side (2c) of the support substrate (21) that is opposite the first side (2a),

    the main substrate (3) includes a first substrate external output terminal group (301) and a second substrate external output terminal group (302) which are connected to a first display device (71) and a second display device (72) respectively,

    the first substrate external output terminal group (301) is located on a first side (3a) of the main substrate (3),

    the second substrate external output terminal group (302) is located on a second side (3c) of the main substrate (3) that is opposite the first side (3a),

    the semiconductor module (5) is surface-mounted on a surface wiring layer (30a) of the main substrate (3) so that the module first side (2a) is located closer to the substrate first side (3a) than the module second side (2c) and the module second side (2c) is located closer to the substrate second side (3c) than the module first side (2a), and

    the first module terminal group (11) and the first substrate external output terminal group (301) are connected by a first surface wiring pattern (311) formed in the surface wiring layer (30a), and the second module terminal group (12) and the second substrate external output terminal group (302) are connected by a second surface wiring pattern (312) formed in the surface wiring layer (30a), wherein

    the semiconductor element (51) is a semiconductor chip (51b) that is a rectangular package having at least one semiconductor die (51d) enclosed therein,

    the semiconductor chip (51b) has a plurality of element terminals that are electrically connected to the support substrate (21),

    the plurality of element terminals include a first element terminal group (VO1) and a second element terminal group (VO2) which are terminals, configured for image output or as communication interface,

    the first element terminal group (VO1) and the second element terminal group (VO2) are located on a same side of the package, and

    the semiconductor module (5) is a multichip module (51M) wherein at least the semiconductor chip (51b) is mounted on the support substrate (21), and wherein the plurality of element terminals and the plurality of connection terminals (10) are arranged on the support substrate (21), such that at least the first element terminal group (VO1) is connected to the first module terminal group (11), and the second element terminal group (VO2) is connected to the second module terminal group (12).


     
    2. The image display system according to claim 1, wherein
    the first module terminal group (11) and the second module terminal group (12) are module terminal groups configured for image output, having the image output function (31, 32),
    the first substrate external output terminal group (301) and the second substrate external output terminal group (302) are substrate terminal groups (301, 302) that are connected to the image display devices (71, 72),
    the main substrate (3) is provided in an image display unit (70) having a first display device (71),
    the first substrate external output terminal group (301) is connected to the first display device (71) in the image display unit (70), and
    the second substrate external output terminal group (302) is connected to an external output terminal (801; 802) provided in the image display unit (70) and is connected via the external output terminal (801; 802) to a second display device (72) provided independently of the image display unit (70).
     
    3. The image display system according to claim 1, wherein
    the first module terminal group (11) and the second module terminal group (12) are module terminal groups (11, 12) configured for image output, having the image output function (31, 32),
    the first substrate external output terminal group (301) and the second substrate external output terminal group (302) are substrate terminal groups (301, 302) that are connected to the image display devices (71, 72),
    the main substrate (3) is provided in an image display unit (80),
    one of the first substrate external output terminal group (301) and the second substrate external output terminal group (302) is connected via a first external output terminal (801) provided in the image display unit to a first display device (71) that is the image display device provided independently of the image display unit (80),
    the other of the first substrate external output terminal group (301) and the second substrate external output terminal group (302) is connected via a second external output terminal (802) provided in the image display unit (80) to a second display device (72) that is the image display device provided independently of the image display unit (80) and the first display device (71), and
    the image display unit (80) includes at least one substrate (821) different from the main substrate (3), and one of the first substrate external output terminal group (301) and the second substrate external output terminal group (302) is connected to the first image display device (71) via the different substrate (821).
     
    4. The image display system according to claim 2 or 3, wherein
    the first display device (71) is mounted on a dashboard of a vehicle, and
    the second display device (72) is a sub-display that is mounted on a meter panel of the vehicle or a center display that is mounted on the dashboard and displays operational information of an in-vehicle device.
     
    5. The image display system according to any one of claims 1 to 4, wherein
    the semiconductor module (5) further includes a third module terminal group (13) that is a terminal group configured to provide one of the image output function and the communication interface function and that is a terminal group having a same function as the first module terminal group (11) and the second module terminal group (12), and
    the third module terminal group (13) is located on a third side (2b, 2d) of the support substrate (21) which is different from the first side (2a) and the second side (2c).
     


    Ansprüche

    1. Bildanzeigesystem umfassend:

    eine Halbleitervorrichtung (1), umfassend:

    ein Halbleitermodul (5) mit einem rechteckigen plattenartigen Trägersubstrat (21), das mindestens ein Halbleiterbauelement (51) auf einer oberen Oberfläche (21a) des Trägersubstrats (21) trägt und fixiert, und einer Mehrzahl von Verbindungsanschlüssen (10), die planar entlang einer unteren Oberfläche (21b) des Trägersubstrats (21) angeordnet sind und die elektrisch mit dem Halbleiterbauelement (51) verbunden sind, und

    ein Hauptsubstrat (3), das eine Mehrzahl von Verdrahtungsschichten (30a) aufweist und auf dem das Halbleitermodul (5) über die Mehrzahl von Verbindungsanschlüssen (10) oberflächenmontiert ist, wobei

    die Mehrzahl von Verbindungsanschlüssen (10) in einer Mehrzahl von rechteckigen Ringen entlang jeder Seite des Trägersubstrats (21) angeordnet sind und eine erste Modulanschlussgruppe (11) und eine zweite Modulanschlussgruppe (12) umfassen, die Anschlussgruppen sind, die zur Bildausgabe konfiguriert sind, oder die Anschlussgruppen sind, die als Kommunikationsschnittstellet konfiguriert sind,

    die erste Modulanschlussgruppe (11) sich auf einer ersten Seite (2a) des Trägersubstrats (21) befindet,

    die zweite Modulanschlussgruppe (12) sich auf einer zweiten Seite (2c) des Trägersubstrats (21) befindet, die der ersten Modulseite (2a) gegenüberliegt,

    das Hauptsubstrat (3) eine erste Substrataußenausgabeanschlussgruppe (301) und eine zweite Substrataußenausgabeanschlussgruppe (302) aufweist, die mit einer ersten Anzeigevorrichtung (71) bzw. einer zweiten Anzeigevorrichtung (72) verbunden sind,

    die erste Substrataußenausgabeanschlussgruppe (301) sich auf einer ersten Seite (3a) des Hauptsubstrats (3) befindet,

    die zweite Substrataußenausgabeanschlussgruppe (302) sich auf einer zweiten Seite (3c) des Hauptsubstrats (3) befindet, die der ersten Seite (3a) des Hauptsubstrats (3) gegenüberliegt,

    das Halbleitermodul (5) auf einer Oberflächenverdrahtungsschicht (30a) des Hauptsubstrats (3) oberflächenmontiert ist, so dass die erste Seite (2a) des Moduls näher an der ersten Seite (3a) des Substrats liegt als die zweite Seite (2c) des Moduls und die zweite Seite (2c) des Moduls näher an der zweiten Seite (3c) des Substrats liegt als die erste Seite (2a) des Moduls, und

    die erste Modulanschlussgruppe (11) und die Substrataußenausgabeanschlussgruppe (301) durch ein erstes Oberflächenverdrahtungsmuster (311) verbunden sind, das in der Oberflächenverdrahtungsschicht (30a) ausgebildet ist, und die zweite Modulanschlussgruppe (12) und die zweite Substrataußenausgabeanschlussgruppe (302) durch ein zweites Oberflächenverdrahtungsmuster (312) verbunden sind, das in der Oberflächenverdrahtungsschicht (30a) ausgebildet ist, wobei

    das Halbleiterbauelement (51) ein Halbleiterchip (51b) ist, der eine rechteckige Einheit mit mindestens einem darin eingeschlossenen Halbleiterchip (51d) ist,

    der Halbleiterchip (51b) eine Mehrzahl von Bauelementanschlüssen aufweist, die elektrisch mit dem Trägersubstrat (21) verbunden sind,

    die Mehrzahl von Bauelementanschlüssen eine erste Bauelementanschlussgruppe (VO1) und eine zweite Bauelementanschlussgruppe (VO2) umfassen, die Anschlüsse sind, die zur Bildausgabefunktion oder als Kommunikationsschnittstelle konfiguriert sind,

    die erste Bauelementanschlussgruppe (VO1) und die zweite Bauelementanschlussgruppe (VO2) sich auf derselben Seite der Einheit befinden, und

    das Halbleitermodul (5) ein Multichipmodul (51M) ist, wobei zumindest der Halbleiterchip (51b) auf dem Trägersubstrat (21) montiert ist und wobei die Mehrzahl von Bauelementanschlüssen und die Mehrzahl von Verbindungsanschlüssen (10) auf dem Trägersubstrat (21) so angeordnet sind, dass zumindest die erste Bauelementanschlussgruppe (VO1) mit der ersten Modulanschlussgruppe (11) verbunden ist und die zweite Bauelementanschlussgruppe (VO2) mit der zweiten Modulanschlussgruppe (12) verbunden ist.


     
    2. Bildanzeigesystem (1) nach Anspruch 1, wobei
    die erste Modulanschlussgruppe (11) und die zweite Modulanschlussgruppe (12) Modulanschlussgruppen sind, die zur Bildausgabe konfiguriert sind und die Bildausgabefunktion (31, 32) haben,
    die erste Substrataußenausgabeanschlussgruppe (301) und die zweite Substrataußenausgabeanschlussgruppe (302) Substratanschlussgruppen (301, 302) sind, die mit den Bildanzeigevorrichtungen (71, 72) verbunden sind,
    das Hauptsubstrat (3) in einer Bildanzeigeeinheit (70) mit einer ersten Anzeigevorrichtung (71) vorgesehen ist,
    die erste Substrataußenausgabeanschlussgruppe (301) mit der ersten Anzeigevorrichtung (71) in der Bildanzeigeeinheit (70) verbunden ist und
    die zweite Substrataußenausgabeanschlussgruppe (302) mit einem Substrataußenausgabeanschluss (801; 802) verbunden ist, der in der Bildanzeigeeinheit (70) vorgesehen ist, und über den Substrataußenausgabeanschluss (801; 802) mit einer zweiten Anzeigevorrichtung (72) verbunden ist, die unabhängig von der Bildanzeigeeinheit (70) vorgesehen ist.
     
    3. Bildanzeigesystem nach Anspruch 1, wobei
    die erste Modulanschlussgruppe (11) und die zweite Modulanschlussgruppe (12) Modulanschlussgruppen (11, 12) sind, die zur Bildausgabe konfiguriert sind und die Bildausgabefunktion (31, 32) haben,

    die erste Substrataußenausgabeanschlussgruppe (301) und die zweite Substrataußenausgabeanschlussgruppe (302) Substratanschlussgruppen (301, 302) sind, die mit den Bildanzeigevorrichtungen (71, 72) verbunden sind,

    das Hauptsubstrat (3) in einer Bildanzeigeeinheit (80) vorgesehen ist,

    eine von der ersten Substrataußenausgabeanschlussgruppe (301) und der zweitem Substrataußenausgabeanschlussgruppe (302) über einen ersten Substrataußenausgabeanschluss (801), der in der Bildanzeigeeinheit vorgesehen ist, mit einer ersten Anzeigevorrichtung (71) verbunden ist, die die unabhängig von der Bildanzeigeeinheit (80) vorgesehene Bildanzeigevorrichtung ist,

    die andere von der ersten Substrataußenausgabeanschlussgruppe (301) und der zweiten Substrataußenausgabeanschlussgruppe (302) über einen zweiten Substrataußenausgabeanschluss (802), der in der Bildanzeigeeinheit (80) vorgesehen ist, mit einer zweiten Anzeigevorrichtung (72) verbunden ist, die die Bildanzeigevorrichtung ist, die unabhängig von der Bildanzeigeeinheit (80) und der ersten Anzeigevorrichtung (71) vorgesehen ist, und

    die Bildanzeigeeinheit (80) mindestens ein Substrat (821) aufweist, das sich von dem Hauptsubstrat (3) unterscheidet, wobei eine von der ersten Substrataußenausgabeanschlussgruppe (301) und der zweiten Substrataußenausgabeanschlussgruppe (302) über das sich unterscheidende Substrat (821) mit der ersten Bildanzeigevorrichtung (71) verbunden ist.


     
    4. Bildanzeigesystem nach Anspruch 2 oder 3, wobei
    die erste Anzeigevorrichtung (71) auf einem Armaturenbrett eines Fahrzeugs montiert ist und
    die zweite Anzeigevorrichtung (72) eine Unteranzeige ist, die an einer Anzeigetafel des Fahrzeugs oder eine Mittelanzeige angebracht ist, die am Armaturenbrett angebracht ist und Betriebsinformationen einer fahrzeugeigenen Vorrichtung anzeigt.
     
    5. Bildanzeigesystem nach einem der Ansprüche 1 bis 4, wobei
    das Halbleitermodul (5) ferner eine dritte Modulanschlussgruppe (13) aufweist, die eine Anschlussgruppe ist, die dazu konfiguriert ist, eine von der Bildausgabefunktion und der Kommunikationsschnittstellenfunktion bereitzustellen, und die eine Anschlussgruppe ist, die die gleiche Funktion wie die erste Modulanschlussgruppe (11) und die zweite Modulanschlussgruppe (12) hat, und
    die dritte Modulanschlussgruppe (13) auf einer dritten Seite (2b, 2d) des Trägersubstrats (21) angeordnet ist, die sich von der ersten Seite (2a) und der zweiten Seite (2c) unterscheidet.
     


    Revendications

    1. Système d'affichage d'images, comprenant :

    un dispositif à semi-conducteur (1), comprenant :

    un module à semi-conducteur (5) comportant un substrat de support (21) rectangulaire en forme de plaque qui supporte et fixe au moins un élément semi-conducteur (51) sur une surface supérieure (21a) du substrat de support (21), et une pluralité de bornes de connexion (10) qui sont agencées de manière plane le long d'une surface inférieure (21b) du substrat de support (21) et qui sont électriquement connectées à l'élément semi-conducteur (51) ; et

    un substrat principal (3) qui a une pluralité de couches de câblage (30a) et sur lequel le module à semi-conducteur (5) est monté en surface via la pluralité de bornes de connexion (10), dans lequel

    la pluralité de bornes de connexion (10) sont agencées en une pluralité d'anneaux rectangulaires le long de chaque côté du substrat de support (21), et comportent un premier groupe de bornes de module (11) et un deuxième groupe de bornes de module (12) qui sont des groupes de bornes configurés pour la sortie d'images ou qui sont des groupes de bornes configurés comme une interface de communication,

    le premier groupe de bornes de module (11) est situé sur un premier côté (2a) du substrat de support (21),

    le deuxième groupe de bornes de module (12) est situé sur un deuxième côté (2c) du substrat de support (21) qui est opposé au premier côté (2a),

    le substrat principal (3) comporte un premier groupe de bornes de sortie externes de substrat (301) et un deuxième groupe de bornes de sortie externes de substrat (302) qui sont connectées à un premier dispositif d'affichage (71) et à un deuxième dispositif d'affichage (72), respectivement,

    le premier groupe de bornes de sortie externes de substrat (301) est situé sur un premier côté (3a) du substrat principal (3),

    le deuxième groupe de bornes de sortie externes de substrat (302) est situé sur un deuxième côté (3c) du substrat principal (3) qui est opposé au premier côté (3a),

    le module à semi-conducteur (5) est monté en surface sur une couche de câblage de surface (30a) du substrat principal (3), de sorte que le premier côté de module (2a) soit situé plus près du premier côté de substrat (3a) que le deuxième côté de module (2c), et que le deuxième côté de module (2c) soit situé plus près du deuxième côté (3c) de substrat que le premier côté de module (2a), et

    le premier groupe de bornes de module (11) et le premier groupe de bornes de sortie externes de substrat (301) sont connectés par un premier motif de câblage de surface (311) formé dans la couche de câblage de surface (30a), et le deuxième groupe de bornes de module (12) et le deuxième groupe de bornes de sortie externes de substrat (302) sont connectés par un deuxième motif de câblage de surface (312) formé dans la couche de câblage de surface (30a), dans lequel

    l'élément semi-conducteur (51) est une puce semi-conductrice (51b) qui est un boîtier rectangulaire dans lequel est contenu au moins un dé semi-conducteur (51d),

    la puce semi-conductrice (51b) a une pluralité de bornes d'élément qui sont électriquement connectées au substrat de support (21),

    la pluralité de bornes d'élément comportent un premier groupe de bornes d'élément (VO1) et un deuxième groupe de bornes d'élément (VO2) qui sont des bornes configurées pour la sortie d'images ou comme une interface de communication,

    le premier groupe de bornes d'élément (VO1) et le deuxième groupe de bornes d'élément (VO2) sont situés sur un même côté du boîtier, et

    le module à semi-conducteur (5) est un module à puces multiples (51M) dans lequel au moins la puce semi-conductrice (51b) est montée sur le substrat de support (21), et dans lequel

    la pluralité de bornes d'élément et la pluralité de bornes de connexion (10) sont agencées sur le substrat de support (21), de sorte qu'au moins le premier groupe de bornes d'élément (VO1) soit connecté au premier groupe de bornes de module (11), et que le deuxième groupe de bornes d'élément (VO2) soit connecté au deuxième groupe de bornes de module (12).


     
    2. Système d'affichage d'images selon la revendication 1, dans lequel
    le premier groupe de bornes de module (11) et le deuxième groupe de bornes de module (12) sont des groupes de bornes de modules configurés pour la sortie d'images ayant la fonction de sortie d'images (31, 32),
    le premier groupe de bornes de sortie externes de substrat (301) et le deuxième groupe de bornes de sortie externes de substrat (302) sont des groupes de bornes de substrat (301, 302) qui sont connectés aux dispositifs d'affichages d'images (71,72),
    le substrat principal (3) est prévu dans une unité d'affichage d'image (70) ayant un premier dispositif d'affichage (71),
    le premier groupe de bornes de sortie externes de substrat (301) est connecté au premier dispositif d'affichage (71) dans l'unité d'affichage d'image (70), et
    le deuxième groupe de bornes de sortie externes de substrat (302) est connecté à une borne de sortie externe (801 ; 802) prévue dans l'unité d'affichage d'image (70) et est connecté via la borne de sortie externe (801 ; 802) à un deuxième dispositif d'affichage (72) prévu indépendamment de l'unité d'affichage d'image (70).
     
    3. Système d'affichage d'images selon la revendication 1, dans lequel
    le premier groupe de bornes de module (11) et le deuxième groupe de bornes de module (12) sont des groupes de bornes de modules (11, 12) configurés pour la sortie d'images ayant la fonction de sortie d'images (31, 32),
    le premier groupe de bornes de sortie externes de substrat (301) et le deuxième groupe de bornes de sortie externes de substrat (302) sont des groupes de bornes de substrat (301, 302) qui sont connectés aux dispositifs d'affichages d'images (71,72),
    le substrat principal (3) est prévu dans une unité d'affichage d'image (80),
    l'un parmi le premier groupe de bornes de sortie externes de substrat (301) et le deuxième groupe de bornes de sortie externes de substrat (302) est connecté via une première borne de sortie externe (801) prévue dans l'unité d'affichage d'image à un premier dispositif d'affichage (71) qui est le dispositif d'affichage d'image prévu indépendamment de l'unité d'affichage d'image (80),
    l'autre parmi le premier groupe de bornes de sortie externes de substrat (301) et le deuxième groupe de bornes de sortie externes de substrat (302) est connecté via une deuxième borne de sortie externe (802) prévue dans l'unité d'affichage (80) d'image à un deuxième dispositif d'affichage (72) qui est le dispositif d'affichage d'image prévu indépendamment de l'unité d'affichage d'image (80) et du premier dispositif d'affichage (71), et
    l'unité d'affichage d'image (80) comporte au moins un substrat (821) différent du substrat principal (3), et l'un parmi le premier groupe de bornes de sortie externes de substrat (301) et le deuxième groupe de bornes de sortie externes de substrat (302) est connecté au premier dispositif d'affichage d'image (71) via le substrat différent (821).
     
    4. Système d'affichage d'images selon la revendication 2 ou 3, dans lequel
    le premier dispositif d'affichage (71) est monté sur un tableau de bord d'un véhicule, et le deuxième dispositif d'affichage (72) est un sous-affichage qui est monté sur un panneau de compteur du véhicule ou un affichage central qui est monté sur le tableau de bord et affiche des informations de fonctionnement d'un dispositif embarqué.
     
    5. Système d'affichage d'images selon l'une quelconque des revendications 1 à 4, dans lequel
    le module à semi-conducteur (5) comporte en outre un troisième groupe de bornes de module (13) qui est un groupe de bornes configuré pour fournir l'une parmi la fonction de sortie d'images et la fonction d'interface de communication et qui est un groupe de bornes ayant une même fonction que le premier groupe de bornes de module (11) et le deuxième groupe de bornes de module (12), et
    le troisième groupe de bornes de module (13) est situé sur un troisième côté (2b, 2d) du substrat de support (21) qui est différent du premier côté (2a) et du deuxième côté (2c).
     




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    Cited references

    REFERENCES CITED IN THE DESCRIPTION



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    Patent documents cited in the description