(19)
(11)EP 3 329 768 B1

(12)EUROPEAN PATENT SPECIFICATION

(45)Mention of the grant of the patent:
04.12.2019 Bulletin 2019/49

(21)Application number: 17180645.8

(22)Date of filing:  11.07.2017
(51)International Patent Classification (IPC): 
A01K 15/00(2006.01)
H04B 17/10(2015.01)
H04B 1/04(2006.01)

(54)

APPARATUS, SYSTEMS AND METHODS FOR GENERATING VOLTAGE EXCITATION WAVEFORMS

VORRICHTUNG, SYSTEME UND VERFAHREN ZUR ERZEUGUNG VON SPANNUNGSERREGUNGSWELLENFORMEN

APPAREIL, SYSTÈMES ET PROCÉDÉS DE GÉNÉRATION DE FORMES D'ONDES D'EXCITATION DE TENSION


(84)Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

(30)Priority: 14.07.2016 US 201615210498

(43)Date of publication of application:
06.06.2018 Bulletin 2018/23

(73)Proprietor: Radio Systems Corporation
Knoxville, TN 37932 (US)

(72)Inventors:
  • McFarland, Scott
    Knoxville, TN 37932 (US)
  • Griffith, Keith
    Knoxville, TN 37932 (US)

(74)Representative: Mewburn Ellis LLP 
City Tower 40 Basinghall Street
London EC2V 5DE
London EC2V 5DE (GB)


(56)References cited: : 
US-A1- 2008 017 133
US-B1- 6 427 079
US-A1- 2008 168 949
  
      
    Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


    Description

    BACKGROUND



    [0001] Apparatus, systems and methods are described herein for providing certain properties in transmit waveforms for use by a companion receiver in determining direction of approach relative to a transmitting source.

    [0002] Examples of the prior art can be found in US2008/168949, US2008/017133 and US-A-6427079.

    BRIEF DESCRIPTION OF DRAWINGS



    [0003] 

    Figure 1 shows the components of a transmit circuit, under an embodiment.

    Figure 2 shows the components of a receive circuit, under an embodiment.

    Figure 3 shows time varying magnetic flux density generated by a current in a long wire, under an embodiment.

    Figure 4 shows time varying magnetic flux density generated by a current in a multi-turn air core loop, under an embodiment.

    Figure 5 shows time varying magnetic flux density generated by a current in a multi-turn ferrite core loop, under an embodiment.

    Figure 6 shows a loop antenna, under an embodiment.

    Figures 7A-7C demonstrates excitation characteristics for a dominantly inductive wire load, under an embodiment.

    Figures 8A-8C demonstrates excitation characteristics for a dominantly inductive wire load, under an embodiment.

    Figures 9A-9C demonstrate excitation characteristics for a for a dominantly resistive long wire load, under an embodiment.

    Figures 10A-10C demonstrate excitation characteristics for a for a dominantly resistive long wire load, under an embodiment.

    Figure 11 shows reference current IL(t) resulting from the discrete time function IL(nΔt), under an embodiment..

    Figure 12 shows phasor Φ(nΔt) rotating about a unit circle, under an embodiment.

    Figure 13 shows the frequency content of a desired current provided by a discrete time function, under an embodiment.

    Figure 14 shows a first carrier component of a desired current, under an embodiment.

    Figure 15 shows a second carrier component of a desired current, under an embodiment.

    Figure 16 shows a two carrier approximation of a desired current, under an embodiment.

    Figure 17 shows voltage amplitudes Vout and VC as a function of time(seconds), under an embodiment.

    Figure 18 shows a transmit circuit, under an embodiment.

    Figure 19 shows a voltage step waveform, under an embodiment.

    Figure 20 shows a voltage signal resulting from a voltage step waveform, under an embodiment.

    Figure 21 shows a graph of an impedance vector, under an embodiment.

    Figure 22 shows a voltage signal generated by the transmit circuit, under an embodiment.

    Figure 23 shows a graph of an impedance vector, under an embodiment.

    Figure 24 shows a graph of an impedance vector, under an embodiment.

    Figure 25 shows a graph of an impedance vector, under an embodiment.


    DETAILED DESCRIPTION



    [0004] An electronic animal containment system is described with direction-of-approach determination, or direction-sensitive capabilities. The direction-sensitive animal containment system generally contains a transmitter unit connected to a wire loop bounding a containment area and a receiver unit carried by the animal. The transmit unit provides certain properties in transmit waveforms for use by a companion receiver in determining direction of approach relative to the wire loop bounding the containment area.

    [0005] Multiple embodiments of an electronic animal containment system provide varying methods for generating the required current in the wire loop. Under one embodiment, a containment signal generator may convert an uneven duty cycle square wave into an asymmetric triangle wave. Under another embodiment, a containment signal generator includes a discrete triangle wave generator allowing the adjustment of the rising and falling slopes. Under this embodiment, the discrete triangle wave generator directly drives the output current drivers and provides two amplitude levels for the triangle waveform.

    [0006] Under either embodiment, the circuit parameters, Ltotal and Rtotal determine the generating signal required to produce the desired current by the equation:

    A companion receiver is responsive to:

    where

    /dt is the rate of change of the magnetic flux density; /dt is dependent upon dI(t)/dt

    KRx = -nA ∗ uc-Rx

    n=number of turns in the receive core

    A=area of the receive core (m2)

    uc-Rx=geometry dependent relative permeability of the receive core



    [0007] Under one embodiment of an electronic animal containment system, a containment signal generator produces an uneven duty cycle square wave. A long wire load (or perimeter boundary wire) connected to the transmitter may result in an asymmetric triangle current flowing through the wire. This is true when the load is predominantly inductive under an embodiment, hence:



    Under this specific condition, an uneven duty cycle square wave will produce the desired asymmetry in the wire current.

    [0008] Under another embodiment, a containment signal generator includes a discrete triangle wave generator allowing the adjustment of the rising and falling slopes. The discrete triangle wave generator directly drives the output current drivers and provides two amplitude levels for the triangle waveform. However, the desired asymmetry is produced only when the load is predominantly resistive under an embodiment, hence:



    Under this specific condition a discrete triangle wave generator with adjustable rising and falling slopes produce the desired asymmetry.

    Magnetic Field Relationships between the Transmitter and Receiver


    System Model



    [0009] Figure 1 shows the components of a transmit circuit 100. Figure 1 shows a signal generator 102 connected to an amplifier 120. The amplifier is connected to transmit components comprising resistor Rseries 104, which is in series with inductor LLoop 106, which is in series with resistor RLoop 108, which is in series with resistor Rsense 110. The transmit components are indicated in bold as shown in Figure 1. Current IL(t) 112 flows through the transmit components. The amplifier 120 may be any amplifier topology with sufficient power output capability to produce Vout(t) and IL(t)for the given load. Note that Vout(t) is given by the following equation:



    [0010] Figure 1 also shows analog-to-digital convertors 114 and 116 respectively connected to the transmit loop at points 118 and 120. An analog-to-digital converter (ADC) is a device that converts a continuous physical quantity (in this case, IL(t) produces a voltage across Rsense) to a digital number that represents the quantity's amplitude. The conversion involves quantization of the input, so it necessarily introduces a small amount of error. Furthermore, instead of continuously performing the conversion, an ADC does the conversion periodically, sampling the input. The result is a sequence of digital values that have been converted from a continuous-time and continuous-amplitude analog signal to a discrete-time and discrete-amplitude digital signal. The summation component 120 of the transmit circuit combines the voltage amplitude at point 118 and point 120 to approximate the voltage drop across Rsense, i.e. VC(t) 124.

    [0011] Figure 2 shows the components of a receive circuit 200. Figure 2 shows interference 202 and time varying magnetic flux density,

    204 presented to the receive components. Vsensor(t) 206 is the voltage rendered by the receive R-L-C circuit. The receive components include inductor LS 208 and resistor RS 210 in series. The receive components are in parallel with resistor RL 212 and capacitor CRES 214 which are in series with each other. The parallel circuit components are also in series with capacitor C 216. Points 220 and 222 represent respective inputs for Z Amplifier 230, Y Amplifier 240, and X Amplifier 250. VZReceive(t) 260 represents the output voltage of the Z Amplifier. VYReceive(t) 270 represents the output voltage of the Y Amplifier. VXReceive(t) 280 represents the output voltage of the X Amplifier. Typically, the inductors, Ls, associated with each amplifier circuit (X, Y, and Z) are oriented orthogonal to one another. Note that for the sake of simplicity, the systems and methods described below refer to a single amplifier of a receiver. VRx sensor(t) indicates the amplifier input voltage under an embodiment. VReceive(t) represents amplifier output voltage.

    Magnetic Field Relationships



    [0012] Figure 3 shows the time varying magnetic flux density generated by a current in a long wire. Figure 3 shows an inductor LL 302 in series with a resistor RL 304 which reflect the circuit model for a long wire under an embodiment. Figure 3 shows current IL 306. The point x 308 represents the distance to the wire in meters. The point X 310 shows the magnetic flux density travelling into the page. The time varying magnetic flux density is governed by the following equations:

    I(t) = loop current (amps)

    x = distance to point (meters)

    The time varying flux density at point x is specifically given by



    [0013] Figure 4 shows time varying magnetic flux density generated by a current in a multi-turn air core loop. Figure 4 shows the direction of the time varying magnetic flux density 402. The multi-turn air core loop 404 comprises n turns, nL. Current IL enters the page at points 408 and exits the page at points 406. The coil 404, i.e. each loop turn, comprises a radius rL 410. The time varying magnetic flux density at a point x along the coil axis shown is governed by the following equations:



    IL(t) = loop current (amps)

    nL = number of turns
    The time varying flux density at point x along the coil axis is specifically given by



    [0014] Figure 5 shows time varying magnetic flux density 502 generated by a current in a multi-turn ferrite core loop 504. The ferrite core loop comprises n turns, nL 506. The coil 504, i.e. each loop turn, comprises a radius rL 508. Figure 5 shows the direction of the time varying magnetic flux density 502 and direction of current IC 510. The time varying magnetic flux density at a point x along the coil axis is governed by the following equations:



    IL(t) = loop current (amps)

    uc-Tx = 10 to 100 (typical relative permeability

    of the ferrite transmitter core geometry and material)

    nL = number of turns

    The time varying flux density at point x along the coil axis is specifically given by


    Receiver Output Voltage



    [0015] Receive sensor output voltage results from proximity to a time varying magnetic flux density. Figure 6 show an "n" turn 602 loop antenna 604 with area "A" 608. Note that the area A represents the area of one loop antenna turn. The upwardly directed arrows represent time varying magnetic flux density 610. The parameter α 620 represents the angle between horizontal line 622 and the loop antenna. The receive sensor output voltage is given by







    Note that N is a geometry dependent demagnetizing factor, and ur is the relative permeability of the receive core. A small N results in uc-Rx that approaches ur.

    [0016] This particular receiver sensor output voltage, VRx Sensor(t) is given by:



    where,

    KRx = -nA ∗ u(C-Rx)(constant receive terms)

    n = number of turns in the receive core

    A = area of the receive core (m2)

    UC-Rx = geometry dependent relative

    permeability of the receive core



    [0017] As shown above, the sensor output is proportional to dβ(t)/dt. However, dβ(t)/dt is dependent on the source of the time varying magnetic field (i.e. long wire, air coil, ferrite coil, etc.)

    For a long wire:



    [0018] 



    where,

    x = distance to wire or loop (m)

    KTx-long wire = u0/2πx


    For multi-turn air core loop:



    [0019] 



    where,

    nL = number of turns

    rL = radius of the mult - turn transmit coil loop


    For a multi-turn ferrite core loop:



    [0020] 



    where



    The receive sensor plus amplifier output voltage, VReceive(t), can be generalized as



    where,

    Gainamp(FC) = the amplifier gain at the frequency of interest

    KRx = -n ∗ A ∗ UC-Rx (constant receive terms)

    n = number of turns in the receive core

    A = area of the receive core (m2)

    UC-Rx = geometry dependent relative permeability of the receive core

    KTx(#) is dependent on the source of the time varying magnetic field

    Therefore, an observable asymmetric property in dIL(t)/dt, is preserved in VReceive(t). The asymmetry may be exploited by the companion receiver to indicate the direction of approach.

    [0021] The desired transmit current contains an asymmetry in dIL(t)/dt that permits a receiver to determine direction of approach. The dIL(t)/dt asymmetry is observed as a difference between the positive and negative time duration and/or a difference in the positive and negative peak values at the output of the receiver sensor and amplifier chain.

    [0022] Figure 7 and Figure 8 demonstrate excitation characteristics for a dominantly inductive wire load. Figures 7A-7C show an example of square wave excitation under an embodiment. Figure 7A shows load voltage V(t) of a transmitter as a function of time (seconds). Figure 7B displays the corresponding load current. In particular, Figure 7B shows the filtered load current IL as a function of time (seconds). Figure 7C shows the filtered rate of change in load current dIL(t)/dt as a function of time (seconds). Figures 8A-8C shows an example of triangle wave excitation under an embodiment. Figure 8A shows the load voltage V(t) of a transmitter as a function of time (seconds). Figure 8B displays the corresponding load current. In particular, Figure 8B shows the filtered load current IL as a function of time (seconds). Figure 8C shows the filtered rate of change in load current dIL(t)/dt as a function of time (seconds). Note from Figure 7 and Figure 8 that for dominantly inductive long wire loads, the desired asymmetry in dIL(t)/dt occurs for square wave excitation.

    [0023] Figure 9 and Figure 10 demonstrate excitation characteristics for a dominantly resistive long wire load. Figures 9A-9C show an example of square wave excitation under an embodiment. Figure 9A shows load voltage V(t) of a transmitter as a function of time (seconds). Figure 9B displays the corresponding load current. In particular, Figure 9B shows the filtered load current IL as a function of time (seconds). Figure 9C shows the filtered rate of change in load current dIL(t)/dt as a function of time (seconds). Figures 10A-10C show an example of triangle wave excitation under an embodiment. Figure 10A shows the load voltage V(t) of a transmitter as a function of time (seconds). Figure 10B displays the corresponding load current. In particular, Figure 10B shows the filtered load current IL as a function of time (seconds). Figure 10C shows the filtered rate of change in load current dIL(t)/dt as a function of time (seconds). Note from Figure 9 and Figure 10 that for dominantly resistive long wire loads, the desired asymmetry in dIL(t)/dt occurs for asymmetric triangle wave excitation.

    System, Method, and Apparatus for Constructing Voltage Excitation Waveform


    Discrete Time Function



    [0024] Under one embodiment, a discrete time function, IL(nΔt) is created which describes the desired load current asymmetry. Under an embodiment, the desired asymmetry is a triangle current waveform with different positive and negative slopes. Figure 11 shows reference current IL(t) resulting from the discrete time function IL(nΔt) as further described below.

    [0025] OOK (On Off Keying) or amplitude modulation (amplitude shift keying) is used to modulate (or impart data onto) the discrete time function IL(nΔt) as further described below. The modulation function is referred to as modulation(nΔt) and resolves to either one or zero under an embodiment.

    [0026] Rotating phasor values, expressed as Φ(nΔt) = ωnΔt (modulo 2π), are used to generate the discrete time function IL(nΔt) as further described below.

    [0027] The discrete time function IL(nΔt) comprises a desired asymmetry of 30%. Symmetry test thresholds for Φ(nΔt) are as follows:

    s1 = 0.942478 radians

    s2 = 5.340708 radians

    Using these test thresholds, the region of positive slope comprises 30% of 2π radians.

    [0028] Figure 12 shows phasor Φ(nΔt) rotating about a unit circle with a frequency, f. Note that angular frequency ω (rads/sec) = 2πf. Figure 12 shows symmetry test threshold s1 = 0.942478 and s2 = 5.340708. Figure 12 displays a region of positive slope 1210 and a region of negative slope 1220 that result in the desired asymmetry.

    [0029] The desired positive slope m1 of IL(nΔt) comprises change in amplitude / change in Φ (nΔt). The desired positive slope of IL(nΔt) is m1 = 2 / (2 s1). The desired negative slope m2 of IL(nΔt) comprises change in amplitude / change in Φ(nΔt). The desired negative slope of IL(nΔt) is m2 = -2 / (2π - 2 s1).

    [0030] The discrete time function, IL(nΔt) is given by the following logic:

    Figure 13 shows the frequency content of the desired current provided by the discrete time function, IL(nΔt), when f = 20,000 Hz. Figure 13 provides the results of Discrete Fourier Transform analysis. The figure shows a first harmonic at a frequency of 20,000Hz and with relative amplitude 53db. The figure shows a second harmonic at a frequency of 40,000Hz and with relative amplitude of 43db. The figure shows a third harmonic at a frequency of 60,000Hz and with relative amplitude of 30db. The relative harmonic relationships of the desired IL(nΔt) are:
    Harmonic:Relative Amplitude:Relative Phase (rads):
    1st 1 0
    2nd 0.3060 0
    3rd 0.0819 0
    Practical limitations of the DFT algorithm permit showing only the first three harmonics. In practice, the harmonics continue indefinitely.

    Approximate Current Using First and Second Harmonics



    [0031] The desired current may then be approximated using only the first and second harmonics. Figure 14 shows a first carrier IFc(nΔt) component of the desired current using the first relative amplitude of the first harmonic. Figure 15 shows a second carrier I2FC(nΔt) component of the desired current using the relative amplitude of the second harmonic. Again note that the relative amplitude of the first and second harmonics are 1.00 and 0.3060 respectively. Therefore, a two carrier approximation to IL(nΔt) (shown in Figure 16) is given by

    where,

    f = 20,000Hz

    ω = 2πf



    [0032] The sample rate, 1/Δt, is left to the discretion of the system designer but should be high enough (i.e. => 8x the fundamental frequency) to achieve the desired precision. The sampling rate used in this example is 160,000 Hz, i.e. 8f. With only two terms, the operations required to realize the approximation are easy to perform in a low cost commercial microprocessor using either batch or real time processing algorithms.

    Iterative, Adaptive, Feedback Control Algorithm


    Derive an Estimate of the Loop Inductance (LLoop) and Loop Resistance (RLoop)



    [0033] Under one embodiment, an estimate of the loop inductance (LLoop) and loop resistance (RLoop) are derived. Reference is made to the transmit circuit shown in Figure 1. The transmit circuit of Figure 1 is excited with a reference step and the response VC(t) is analyzed. Figure 17 shows voltage amplitudes Vout [∼2V] and VC [∼.75V] as a function of time(seconds).





    [0034] For a long wire circuit employed under the embodiment described herein, the Rseries is in the range of 90 - 180 ohms and Rsense is 30 ohms.

    [0035] Averaging multiple measurements yields a good approximation of RLoop under an embodiment. The transmit loop time constant may be used to approximate the value of LLoop. The transmit loop time constant may be expressed as TC = L/R. In one time constant TC = L/ R), VC(t) reaches 63.2% of its final value. Under an embodiment, the elapsed time, Δt1, is recorded when VC(t) reaches 63.2% of its final value. In two time constants, VC(t) reaches 86.5% of its final value. Under an embodiment, the elapsed time, Δt2, is recorded when VC(t) reaches 86.5% of its final value. LLoop is calculated as follows:



    where RCircuit = Rseries + Rsense + RLoop. Averaging multiple measurements yields a good approximation of LLoop.

    [0036] The measurement interval can be long (as compared to the interval between data transmissions) and left to the discretion of the system designer. In general, changes in the loop parameters (other than an open circuit) do not occur suddenly. Open circuits can be detected by observing VC(t) during all other active periods.

    Scale the Approximation AIL(nΔt) and Calculate First Iteration of VGen (nΔt).



    [0037] A working animal containment system requires a minimum receive signal at a distance x from the transmit loop. Under an embodiment, the necessary amplitude of the two carrier approximation, AIL(nΔt) is calculated.





    where,

    Gainsenor+amp(FC, 2FC) = sensor plus amplifier gain at the frequency or band of interest.

    KRx = -nAUC-Rx

    KTx(#) = is dependent on the distance, x, and the source type1

    Δ = the discrete time differentiation operator

    1 It is either KTx-long wire, KTx-coil air, or KTx-coil ferrite.
    Under the embodiment described below,

    VReceive-required ∼ 18.6 mVRMS

    Gainsensor+amp (FC, 2FC) ∼ 2550

    n ∼ 950

    A∼ 1.164e - 5 square meters

    u(c-Rx) ∼ 5.523

    The sensor plus amplifier needs to be responsive from FC to 2FC. A relatively flat response is ideal, but other response characteristics (gain and phase) may be compensated for by digital signal processing in the receiver's microprocessor.

    [0038] Under an embodiment, solve for the load current scaling factor, KI:



    The resulting loop current is therefore, AIL(nΔt) = KI * (sin(ωnΔt) + 0.3060 * sin(2ωnΔt)). Under an embodiment, VGen(nΔt) is calculated using Kirchhoff's law, i.e. by

    Under one embodiment the first iteration of the signal generator voltage waveform, VGen(nΔt), may be employed as the generator signal for system operation. One may stop here if there is high confidence the estimated loop parameters adequately reflect the circuit operating conditions for achieving the desired amplitude and asymmetry.

    Observe VC(nΔt) for the Desired Characteristics in the Transmit Loop Current AIL (nΔt)



    [0039] Under an embodiment, one may observe VC(nΔt) for the desired characteristics in the transmit loop current AIL(nΔt). Figure 18 shows the same transmit circuit as displayed in Figure 1 with additional elements to model the receiver signal processing using VC(nΔt). As seen in Figure 18, the VC(nΔt) signal outputs to a digital component 130 that approximates the Receiver (Rx) Sensor Response. The digital approximation is sufficiently modeled as a single pole high pass filter (fcorner = 2525 Hz) followed by a single pole low pass filter (fcorner = 38870 Hz) and a gain of 2550. As seen in Figure 18, the digital approximation component 130 outputs to the Receiver (Rx) Detection Component/Algorithm 132. The receiver detection component/algorithm generates the weighted and time shifted sum of two bandpass filter outputs. One centered at the fundamental carrier frequency and one centered at 2x the fundamental carrier frequency. A relative time shift between the two filter outputs is required to match the difference in group delay through each bandpass filter. The receiver detection algorithm (also referred to as the feedback detection algorithm) estimates the root means square, VRx-RMS 134 (at the required distance measured in Analog-to-Digital-Converter counts) and Rx Asymmetry Value 136 (ratio of the aggregate negative to positive signal peaks) of the receive signal.

    [0040] Under one embodiment, an adaptive feedback algorithm seeks a solution to satisfy both the minimum receive signal, VReceive(nΔt), and the desired receive asymmetry. In this illustrative example, the desired receive asymmetry will be the ratio of the aggregate positive and aggregate negative peaks of VReceive(nΔt).

    [0041] The two frequency transmit current, AIL(nΔt), can be derived from the observed VC(nΔt) and RSense.





    [0042] The illustrative example that follows is for a long wire (approximately 2500 ft. of 16AWG wire, at an operating frequency of 25000 Hz), where:

    where, x = 3 meters.

    [0043] The receive sensor plus amplifier output voltage, VReceive(t), can be generalized as



    where,

    Gainamp(FC) = the amplifier gain at the frequency of interest

    KRx = -nAUC-Rx (constant receive terms)

    n = number of turns in the receive core

    A = area of the receive core (m2)

    UC-Rx = geometry dependent relative permeability of the receive core

    KTx(#) is dependent on the source of the time varying magnetic field

    First, the load parameters are estimated by the previously described analysis of VC(nΔt) when applying a step waveform. Figure 19 shows a step waveform VGEN(nΔt) reaching voltage of approximately .44 volts. Figure 20 shows the corresponding signal VC(t) reaching a voltage of approximately 1.4 volts.

    RLOOP and RCIRCUIT values are then estimated as follows.

    RLoop estimate = 17.568 Ω

    LLoop estimate = 0.001382 H

    RCircuit = RSeries + RSense + RLoop estimate = 195.393

    LCircuit = LLoop estimate = 0.001382 H

    Under one embodiment, an iterative examination of VGEN(nΔt) begins with feedback algorithm goals as follows.



    [0044] Rx Asymmetry Ratio (ratio of the aggregatenegative to positive signal peaks) = 1.692 +/- 8.55% The signal generator transmit provides the initial VGen-0 (NΔt) signal to a transmit circuit comprising starting point circuit parameters of an iterative adaptive feedback algorithm. The starting point circuit parameters, Z(0), under an embodiment are:

    RCircuit = 195.393 Ω

    LLoop = 0.001382 H

    Figure 21 shows the initial impedance vector Z(0).
    Figure 22 shows VGen-0(nΔt) = KI ∗ (RCircuitAIL(nΔt) + LLoopΔAIL(nΔt)/Δt)).
    The feedback detection algorithm (see Figure 18) produces the following receive model output results for VGen-0(nΔt):

    VRx-RMS estimate = 8.571

    Rx Asymmetry estimate = 1.519

    The receive signal RMS is not within the acceptable range under an embodiment. When the RMS is not within limits, a scalar gain adjustment is needed. The feedback algorithm will scale the circuit impedance vector accordingly. The scalar gain adjustment is described as follows: Scalar gain adjustment:



    for this example:



    Under an embodiment, the previously iterated circuit parameters are now:

    RCircuit = 173.690 Ω

    LLoop = 0.001229 H

    Figure 23 shows a graph of the impedance vector Z(1).

    [0045] The VGen-1(nΔt) signal is then applied to the transmit circuit, where VGen-1(nΔt) = KI ∗ (RCircuitAIL(nΔt) + LLoopΔAIL(nΔt)/Δt)).
    The feedback detection algorithm produces the following receive model output results for
    VGen-1 (nΔt):

    VRx-RMS estimate = 7.546

    Rx Asymmetry estimate = 1.532

    The receive signal asymmetry is not within the acceptable range under an embodiment. When no gain adjustment is required and the asymmetry is not within limits, an impedance vector rotation is needed. The first rotation in an iteration sequence is assumed to be positive. The feedback algorithm will rotate the circuit impedance vector accordingly.

    [0046] The Z(1) impedance vector has an angle of 48.01 degrees. There is no correlation between the asymmetry error and the proper rotation direction. Our first rotation is assumed to be positive and we rotate one-sixth (1/6) of the degrees between our current angle and 90 degrees. Hence we rotate Z(1) by 7 degrees. The new impedance vector shall have the same magnitude but at an angle of 55.01 degrees.



    therefore;

    Note that there is nothing sacred about rotating 1/6 of the degrees between the current angle and the hard boundary (0 or 90 degrees). It is a compromise between the number of iterations required to achieve a suitable end result, and the precision of the end result.

    [0047] Under an embodiment, the previously iterated circuit parameters are now:

    RCircuit = 148.884 Ω

    LLoop = 0.001354 H

    Figure 24 shows a graph of the impedance vector Z(2).

    [0048] The VGen-2(nΔt) signal is then applied to the transmit circuit, where VGen-2(nΔt) = KI ∗ (RCircuitAIL(nΔt) + LLoop * ΔAIL(nΔt)/Δt)).
    The feedback detection algorithm produces the following receive model output results for VGen-2(nΔt):

    VRx-RMS estimate = 7.546

    Rx Asymmetry estimate = 1.532

    The receive signal asymmetry is not within the acceptable range under an embodiment. When no gain adjustment is required and the asymmetry is not within limits, an impedance vector rotation is needed. Positive rotation did not improve the asymmetry. Therefore, a negative rotation is used. The feedback algorithm will rotate the circuit impedance vector accordingly.

    [0049] The Z(2) impedance vector has an angle of 55.01 degrees. Our first rotation was assumed to be positive. It did not improve the asymmetry result, therefore we must rotate in the negative direction. Rotate one-sixth (1/6) of the degrees between our current angle and 0 degrees. Hence we rotate Z(2) by 9.71 degrees. The new impedance vector shall have the same magnitude but at an angle of 45.84 degrees.



    therefore;



    [0050] Under an embodiment, the previously iterated circuit parameters are now:

    RCircuit = 180.872 Ω

    LLoop = 0.001186 H

    Figure 25 shows a graph of the impedance vector Z(3).

    [0051] The VGen-3(nΔt) signal is then applied to the transmit circuit, where VGen-3(nΔt) = KI ∗ (RCircuitAIL(nΔt) + LLoopΔAIL(nΔt)/Δt)).
    The feedback detection algorithm produces the following receive model output results for VGen-3(nΔt):

    VRx-RMS estimate = 7.7092

    Rx Asymmetry estimate = 1.582

    The receive signal RMS and asymmetry are within acceptable ranges. The adaptive feedback algorithm is complete under an embodiment. The correct circuit parameters for normal operation are:

    RCircuit = 180.872 Ω

    LLoop = 0.001186 H

    Also notice that the circuit impedance vector for the 3rd and final iteration is neither predominantly inductive or resistive. Therefore, the required VGen-3(nΔt) is neither an "uneven duty cycle square wave" nor a "triangle wave with adjustable slopes".

    [0052] A method is described herein that comprises describing a load current with a discrete time function. The method includes using a first frequency and a second frequency to provide an approximation of the described load current, wherein a transform applied to the discrete time function identifies the first frequency and the second frequency. The method includes estimating a loop inductance and a loop resistance of a wire loop by exciting a transmit circuit with a voltage reference step waveform, wherein the transmit circuit includes the wire loop. The method includes scaling the approximated load current to a level sufficient to generate a minimum receive voltage signal in a receiver at a first distance between the wire loop and the receiver. The method includes generating a first voltage signal using the scaled load current, the estimated loop inductance, and the estimated loop resistance. The method includes exciting the transmit circuit with the first voltage signal.

    [0053] The estimating the loop inductance and the loop resistance includes under an embodiment monitoring the transmit circuit's current in response to the voltage reference step waveform.

    [0054] The monitoring the transmit circuit's current includes under an embodiment capturing current amplitude as a function of time in response to the voltage reference step waveform.

    [0055] The transform comprises a Discrete Fourier Transform under an embodiment.

    [0056] The first frequency comprises a first harmonic frequency of the described load current under an embodiment.

    [0057] The second frequency comprises a second harmonic frequency of the described load current under an embodiment.

    [0058] The method comprises under an embodiment generating a first carrier component of the approximated load current using the first harmonic frequency, wherein the first carrier component has a weight of one.

    [0059] The method comprises under an embodiment generating a second carrier component of the approximated load current using the second harmonic frequency, wherein an amplitude of the second carrier component is weighted relative to an amplitude of the first carrier component.

    [0060] The transform applied to the discrete time function used to describe the load current identifies under an embodiment the relative weight of the second carrier component.

    [0061] The providing the approximation of the described load current includes summing the first carrier component and the second carrier component under an embodiment.

    [0062] The approximated load current comprises a discrete time function under an embodiment.

    [0063] The first voltage signal comprises a discrete time function under an embodiment.

    [0064] An input to the discrete time function used to describe the load current comprises a rotating phasor under an embodiment.

    [0065] The phasor value periodically rotates between 0 and 2π radians under an embodiment.

    [0066] The discrete time function used to describe the load current has a first slope when the phasor value is within a first range under an embodiment.

    [0067] The first slope is positive under an embodiment.

    [0068] The discrete time function used to describe the load current has a second slope when the phasor value is within a second range under an embodiment.

    [0069] The second slope is negative under an embodiment.

    [0070] The first range comprises approximately thirty percent of 2π radians under an embodiment.

    [0071] The absolute value of the first slope is greater than the absolute value of the second slope under an embodiment.

    [0072] The method comprises under an embodiment reading a voltage signal at a location in the transmit circuit, wherein the voltage signal is representative of a corresponding transmit current in the transmit circuit.

    [0073] The method comprises under an embodiment processing the voltage signal to estimate the receive voltage signal.

    [0074] The estimating includes under an embodiment determining a root mean square (RMS) of the estimated receive voltage signal.

    [0075] The estimating includes under an embodiment determining an asymmetry of the estimated receive voltage signal.

    [0076] The asymmetry comprises under an embodiment a ratio of the aggregate positive and aggregate negative peaks of the estimated receive voltage signal.

    [0077] The method comprises establishing a target RMS value under an embodiment.

    [0078] A target RMS range comprises under an embodiment he target RMS value plus or minus a percentage.

    [0079] The method of an embodiment comprises establishing a target asymmetry value.

    [0080] A target asymmetry range comprises under an embodiment the target asymmetry value plus or minus a percentage.

    [0081] The method under an embodiment comprises iteratively adjusting an impedance vector of the transmit circuit until the RMS and the asymmetry of estimated receive voltage signal fall within the corresponding target RMS and asymmetry ranges, wherein the impedance vector initially comprises the loop resistance and the loop inductance.

    [0082] The adjusting comprises under an embodiment scaling the impedance vector when the RMS falls outside the target RMS range.

    [0083] The adjusting comprises under an embodiment rotating a phase angle of the impedance vector when the asymmetry falls outside the target asymmetry range.

    [0084] The rotating the phase angle comprising under an embodiment a negative rotation.

    [0085] The rotating the phase angle comprises under an embodiment a positive rotation.

    [0086] The described load current comprises an asymmetry under an embodiment.

    [0087] The receiver exploits under an embodiment the asymmetry to determine the receiver's direction of approach to the wire loop carrying the described load current.

    [0088] Computer networks suitable for use with the embodiments described herein include local area networks (LAN), wide area networks (WAN), Internet, or other connection services and network variations such as the world wide web, the public internet, a private internet, a private computer network, a public network, a mobile network, a cellular network, a value-added network, and the like. Computing devices coupled or connected to the network may be any microprocessor controlled device that permits access to the network, including terminal devices, such as personal computers, workstations, servers, mini computers, main-frame computers, laptop computers, mobile computers, palm top computers, hand held computers, mobile phones, TV set-top boxes, or combinations thereof. The computer network may include one or more LANs, WANs, Internets, and computers. The computers may serve as servers, clients, or a combination thereof.

    [0089] The apparatus, systems and methods for generating voltage excitation waveforms can be a component of a single system, multiple systems, and/or geographically separate systems. The apparatus, systems and methods for generating voltage excitation waveforms can also be a subcomponent or subsystem of a single system, multiple systems, and/or geographically separate systems. The components of the apparatus, systems and methods for generating voltage excitation waveforms can be coupled to one or more other components (not shown) of a host system or a system coupled to the host system.

    [0090] One or more components of the apparatus, systems and methods for generating voltage excitation waveforms and/or a corresponding interface, system or application to which the apparatus, systems and methods for generating voltage excitation waveforms is coupled or connected includes and/or runs under and/or in association with a processing system. The processing system includes any collection of processor-based devices or computing devices operating together, or components of processing systems or devices, as is known in the art. For example, the processing system can include one or more of a portable computer, portable communication device operating in a communication network, and/or a network server. The portable computer can be any of a number and/or combination of devices selected from among personal computers, personal digital assistants, portable computing devices, and portable communication devices, but is not so limited. The processing system can include components within a larger computer system.

    [0091] The processing system of an embodiment includes at least one processor and at least one memory device or subsystem. The processing system can also include or be coupled to at least one database. The term "processor" as generally used herein refers to any logic processing unit, such as one or more central processing units (CPUs), digital signal processors (DSPs), application-specific integrated circuits (ASIC), etc. The processor and memory can be monolithically integrated onto a single chip, distributed among a number of chips or components, and/or provided by some combination of algorithms. The methods described herein can be implemented in one or more of software algorithm(s), programs, firmware, hardware, components, circuitry, in any combination.

    [0092] The components of any system that include the apparatus, systems and methods for generating voltage excitation waveforms can be located together or in separate locations. Communication paths couple the components and include any medium for communicating or transferring files among the components. The communication paths include wireless connections, wired connections, and hybrid wireless/wired connections. The communication paths also include couplings or connections to networks including local area networks (LANs), metropolitan area networks (MANs), wide area networks (WANs), proprietary networks, interoffice or backend networks, and the Internet. Furthermore, the communication paths include removable fixed mediums like floppy disks, hard disk drives, and CD-ROM disks, as well as flash RAM, Universal Serial Bus (USB) connections, RS-232 connections, telephone lines, buses, and electronic mail messages.

    [0093] Aspects of the apparatus, systems and methods for generating voltage excitation waveforms and corresponding systems and methods described herein may be implemented as functionality programmed into any of a variety of circuitry, including programmable logic devices (PLDs), such as field programmable gate arrays (FPGAs), programmable array logic (PAL) devices, electrically programmable logic and memory devices and standard cell-based devices, as well as application specific integrated circuits (ASICs). Some other possibilities for implementing aspects of the apparatus, systems and methods for generating voltage excitation waveforms and corresponding systems and methods include: microcontrollers with memory (such as electronically erasable programmable read only memory (EEPROM)), embedded microprocessors, firmware, software, etc. Furthermore, aspects of the apparatus, systems and methods for generating voltage excitation waveforms and corresponding systems and methods may be embodied in microprocessors having software-based circuit emulation, discrete logic (sequential and combinatorial), custom devices, fuzzy (neural) logic, quantum devices, and hybrids of any of the above device types. Of course the underlying device technologies may be provided in a variety of component types, e.g., metal-oxide semiconductor field-effect transistor (MOSFET) technologies like complementary metal-oxide semiconductor (CMOS), bipolar technologies like emitter-coupled logic (ECL), polymer technologies (e.g., silicon-conjugated polymer and metal-conjugated polymer-metal structures), mixed analog and digital, etc.

    [0094] It should be noted that any system, method, and/or other components disclosed herein may be described using computer aided design tools and expressed (or represented), as data and/or instructions embodied in various computer-readable media, in terms of their behavioral, register transfer, logic component, transistor, layout geometries, and/or other characteristics. Computer-readable media in which such formatted data and/or instructions may be embodied include, but are not limited to, non-volatile storage media in various forms (e.g., optical, magnetic or semiconductor storage media) and carrier waves that may be used to transfer such formatted data and/or instructions through wireless, optical, or wired signaling media or any combination thereof. Examples of transfers of such formatted data and/or instructions by carrier waves include, but are not limited to, transfers (uploads, downloads, e-mail, etc.) over the Internet and/or other computer networks via one or more data transfer protocols (e.g., HTTP, FTP, SMTP, etc.). When received within a computer system via one or more computer-readable media, such data and/or instruction-based expressions of the above described components may be processed by a processing entity (e.g., one or more processors) within the computer system in conjunction with execution of one or more other computer programs.

    [0095] Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise," "comprising," and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is to say, in a sense of "including, but not limited to." Words using the singular or plural number also include the plural or singular number respectively. Additionally, the words "herein," "hereunder," "above," "below," and words of similar import, when used in this application, refer to this application as a whole and not to any particular portions of this application. When the word "or" is used in reference to a list of two or more items, that word covers all of the following interpretations of the word: any of the items in the list, all of the items in the list and any combination of the items in the list.

    [0096] The above description of embodiments of the apparatus, systems and methods for generating voltage excitation waveforms is not intended to be exhaustive or to limit the systems and methods to the precise forms disclosed. While specific embodiments of, and examples for, the apparatus, systems and methods for generating voltage excitation waveforms and corresponding systems and methods are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the systems and methods, as those skilled in the relevant art will recognize. The teachings of the apparatus, systems and methods for generating voltage excitation waveforms and corresponding systems and methods provided herein can be applied to other systems and methods, not only for the systems and methods described above.

    [0097] The elements and acts of the various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the apparatus, systems and methods for generating voltage excitation waveforms and corresponding systems and methods in light of the above detailed description.


    Claims

    1. A method comprising,
    describing a load current with a discrete time function;
    using a first frequency and a second frequency to provide an approximation of the described load current, wherein a transform applied to the discrete time function identifies the first frequency and the second frequency;
    estimating a loop inductance and a loop resistance of a wire loop by exciting a transmit circuit with a voltage reference step waveform, wherein the transmit circuit includes the wire loop;
    scaling the approximated load current to a level sufficient to generate a minimum receive voltage signal in a receiver at a first distance between the wire loop and the receiver;
    generating a first voltage signal using the scaled load current, the estimated loop inductance, and the estimated loop resistance;
    exciting the transmit circuit with the first voltage signal.
     
    2. The method of claim 1, wherein the estimating the loop inductance and the loop resistance includes monitoring the transmit circuit's current in response to the voltage reference step waveform.
     
    3. The method of claim 2, wherein the monitoring the transmit circuit's current includes capturing current amplitude as a function of time in response to the voltage reference step waveform.
     
    4. The method of claim 1, wherein the transform comprises a Discrete Fourier Transform.
     
    5. The method of claim 1, wherein the first frequency comprises a first harmonic frequency of the described load current.
     
    6. The method of claim 5, wherein the second frequency comprises a second harmonic frequency of the described load current.
     
    7. The method of claim 6, comprising generating a first carrier component of the approximated load current using the first harmonic frequency, wherein the first carrier component has a weight of one.
     
    8. The method of claim 7, comprising generating a second carrier component of the approximated load current using the second harmonic frequency, wherein an amplitude of the second carrier component is weighted relative to an amplitude of the first carrier component.
     
    9. The method of claim 8, wherein the transform applied to the discrete time function used to describe the load current identifies the relative weight of the second carrier component.
     
    10. The method of claim 8, wherein the providing the approximation of the described load current includes summing the first carrier component and the second carrier component.
     
    11. The method of claim 1, wherein the approximated load current comprises a discrete time function.
     
    12. The method of claim 1, wherein the first voltage signal comprises a discrete time function.
     
    13. The method of claim 1, wherein an input to the discrete time function used to describe the load current comprises a rotating phasor.
     
    14. The method of claim 13, wherein the phasor value periodically rotates between 0 and 2π radians.
     
    15. The method of claim 14, wherein the discrete time function used to describe the load current has a first slope when the phasor value is within a first range.
     
    16. The method of claim 15, wherein the first slope is positive.
     
    17. The method of claim 15, wherein the discrete time function used to describe the load current has a second slope when the phasor value is within a second range.
     
    18. The method of claim 17, wherein the second slope is negative.
     
    19. The method of claim 15, wherein the first range comprises approximately thirty percent of 2π radians.
     
    20. The method of claim 1, comprising reading a voltage signal at a location in the transmit circuit, wherein the voltage signal is representative of a corresponding transmit current in the transmit circuit.
     
    21. The method of claim 20, comprising processing the voltage signal to estimate the receive voltage signal.
     
    22. The method of claim 21, the estimating including determining a root mean square (RMS) of the estimated receive voltage signal.
     
    23. The method of claim 22, the estimating including determining an asymmetry of the estimated receive voltage signal.
     
    24. The method of claim 23, wherein the asymmetry comprises a ratio of the aggregate positive and aggregate negative peaks of the estimated receive voltage signal.
     
    25. The method of claim 23, comprising establishing a target RMS value.
     
    26. The method of claim 25, wherein a target RMS range comprises the target RMS value plus or minus a percentage.
     
    27. The method of claim 26, comprising establishing a target asymmetry value.
     
    28. The method of claim 27, wherein a target asymmetry range comprises the target asymmetry value plus or minus a percentage.
     
    29. The method of claim 28, comprising iteratively adjusting an impedance vector of the transmit circuit until the RMS and the asymmetry of estimated receive voltage signal fall within the corresponding target RMS and asymmetry ranges, wherein the impedance vector initially comprises the loop resistance and the loop inductance.
     
    30. The method of claim 29, the adjusting comprising scaling the impedance vector when the RMS falls outside the target RMS range.
     
    31. The method of claim 29, the adjusting comprising rotating a phase angle of the impedance vector when the asymmetry falls outside the target asymmetry range.
     
    32. The method of claim 1, wherein the described load current comprises an asymmetry.
     
    33. The method of claim 32, wherein the receiver exploits the asymmetry to determine the receiver's direction of approach to the wire loop carrying the described load current.
     


    Ansprüche

    1. Verfahren, das Folgendes umfasst:

    Beschreiben eines Laststroms mit einer diskreten Zeitfunktion;

    Verwenden einer ersten Frequenz und einer zweiten Frequenz, um eine Annäherung des beschriebenen Laststroms bereitzustellen, wobei eine Transformation, die auf die diskrete Zeitfunktion angewendet wird, die erste Frequenz und die zweite Frequenz identifiziert;

    Schätzen einer Schleifeninduktivität und eines Schleifenwiderstands einer Drahtschleife durch Anregen einer Übertragungsschaltung mit einer Spannungsreferenzstufenwellenform, wobei die Übertragungsschaltung die Drahtschleife beinhaltet;

    Skalieren des angenäherten Laststroms auf eine Höhe, die ausreicht, um ein minimales Empfangsspannungssignal in einem Empfänger in einem ersten Abstand zwischen der Drahtschleife und dem Empfänger zu erzeugen;

    Erzeugen eines ersten Spannungssignals unter Verwendung des skalierten Laststroms, der geschätzten Schleifeninduktivität und des geschätzten Schleifenwiderstands;

    Anregen der Übertragungsschaltung mit dem ersten Spannungssignal.


     
    2. Verfahren nach Anspruch 1, wobei das Schätzen der Schleifeninduktivität und des Schleifenwiderstands das Überwachen des Stroms der Übertragungsschaltung als Reaktion auf die Spannungsreferenzstufenwellenform umfasst.
     
    3. Verfahren nach Anspruch 2, wobei das Überwachen des Stroms der Übertragungsschaltung das Erfassen der Stromamplitude als Zeitfunktion als Reaktion auf die Spannungsreferenzstufenwellenform umfasst.
     
    4. Verfahren nach Anspruch 1, wobei die Transformation eine diskrete FourierTransformation umfasst.
     
    5. Verfahren nach Anspruch 1, wobei die erste Frequenz eine erste Oberwellenfrequenz des beschriebenen Ladestroms umfasst.
     
    6. Verfahren nach Anspruch 5, wobei die zweite Frequenz eine zweite Oberwellenfrequenz des beschriebenen Laststroms umfasst.
     
    7. Verfahren nach Anspruch 6, umfassend das Erzeugen einer ersten Trägerkomponente des angenäherten Laststroms unter Verwendung der ersten Oberwellenfrequenz, wobei die erste Trägerkomponente eine Gewichtung von eins aufweist.
     
    8. Verfahren nach Anspruch 7, umfassend das Erzeugen einer zweiten Trägerkomponente des angenäherten Laststroms unter Verwendung der zweiten Oberwellenfrequenz, wobei eine Amplitude der zweiten Trägerkomponente im Vergleich zu einer Amplitude der ersten Trägerkomponente gewichtet wird.
     
    9. Verfahren nach Anspruch 8, wobei die Transformation, die auf die diskrete Zeitfunktion angewendet wird, die verwendet wird, um den Laststrom zu beschreiben, die relative Gewichtung der zweiten Trägerkomponente identifiziert.
     
    10. Verfahren nach Anspruch 8, wobei das Bereitstellen der Annäherung des beschriebenen Laststroms das Summieren der ersten Trägerkomponente und der zweiten Trägerkomponente umfasst.
     
    11. Verfahren nach Anspruch 1, wobei der angenäherte Laststrom eine diskrete Zeitfunktion umfasst.
     
    12. Verfahren nach Anspruch 1, wobei das erste Spannungssignal eine diskrete Zeitfunktion umfasst.
     
    13. Verfahren nach Anspruch 1, wobei eine Eingabe zur diskreten Zeitfunktion, die verwendet wird, um den Laststrom zu beschreiben, einen Drehzeiger umfasst.
     
    14. Verfahren nach Anspruch 13, wobei der Drehzeigerwert periodisch zwischen 0 und 2π Radiant rotiert.
     
    15. Verfahren nach Anspruch 14, wobei die diskrete Zeitfunktion, die verwendet wird, um den Laststrom zu beschreiben, einen ersten Anstieg aufweist, wenn der Drehzeigerwert innerhalb eines ersten Bereichs liegt.
     
    16. Verfahren nach Anspruch 15, wobei der erste Anstieg positiv ist.
     
    17. Verfahren nach Anspruch 15, wobei die diskrete Zeitfunktion, die verwendet wird, um den Laststrom zu beschreiben, einen zweiten Anstieg aufweist, wenn der Drehzeigerwert innerhalb eines zweiten Bereichs liegt.
     
    18. Verfahren nach Anspruch 17, wobei der zweite Anstieg negativ ist.
     
    19. Verfahren nach Anspruch 15, wobei der erste Bereich etwa 30 % von 2π Radiant umfasst.
     
    20. Verfahren nach Anspruch 1, umfassend das Auslesen eines Spannungssignals an einer Position in der Übertragungsschaltung, wobei das Spannungssignal einen entsprechenden Übertragungsstrom in der Übertragungsschaltung darstellt.
     
    21. Verfahren nach Anspruch 20, umfassend das Verarbeiten des Spannungssignals, um das Empfangsspannungssignal zu schätzen.
     
    22. Verfahren nach Anspruch 21, wobei das Schätzen das Bestimmen eines Effektivwerts (RMS) des geschätzten Empfangsspannungssignals umfasst.
     
    23. Verfahren nach Anspruch 22, wobei das Schätzen das Bestimmen einer Asymmetrie des geschätzten Empfangsspannungssignals umfasst.
     
    24. Verfahren nach Anspruch 23, wobei die Asymmetrie ein Verhältnis der gesammelten positiven und gesammelten negativen Peaks des geschätzten Empfangsspannungssignals umfasst.
     
    25. Verfahren nach Anspruch 23, umfassend das Erstellen eines RMS-Zielwerts.
     
    26. Verfahren nach Anspruch 25, wobei ein RMS-Zielbereich den RMS-Zielwert plus oder minus eines Prozentsatzes umfasst.
     
    27. Verfahren nach Anspruch 26, umfassend das Erstellen eines Asymmetrie-Zielwerts.
     
    28. Verfahren nach Anspruch 27, wobei ein Asymmetrie-Zielbereich den Asymmetrie-Zielwert plus oder minus eines Prozentsatzes umfasst.
     
    29. Verfahren nach Anspruch 28, umfassend das wiederholte Anpassen eines Impedanzvektors der Übertragungsschaltung, bis der RMS und die Asymmetrie des geschätzten Empfangsspannungssignals innerhalb des entsprechenden RMS- und Asymmetrie-Zielbereichs fallen, wobei der Impedanzvektor zu Anfang den Schleifenwiderstand und die Schleifeninduktivität umfasst.
     
    30. Verfahren nach Anspruch 29, wobei das Anpassen das Skalieren des Impedanzvektors umfasst, wenn der RMS außerhalb des RMS-Zielbereichs liegt.
     
    31. Verfahren nach Anspruch 29, wobei das Anpassen das Rotieren eines Phasenwinkels des Impedanzvektors umfasst, wenn die Asymmetrie außerhalb des Asymmetrie-Zielbereichs liegt.
     
    32. Verfahren nach Anspruch 1, wobei der beschriebene Laststrom eine Asymmetrie umfasst.
     
    33. Verfahren nach Anspruch 32, wobei der Empfänger die Asymmetrie nutzt, um die Annäherungsrichtung des Empfängers zur Drahtschleife, die den beschriebenen Laststrom trägt, zu bestimmen.
     


    Revendications

    1. Procédé comprenant les étapes ci-dessous consistant à :

    décrire un courant de charge avec une fonction temporelle discrète ;

    utiliser une première fréquence et une seconde fréquence en vue de fournir une approximation du courant de charge décrit, dans lequel une transformée appliquée à la fonction temporelle discrète identifie la première fréquence et la seconde fréquence ;

    estimer une inductance de boucle et une résistance de boucle d'une boucle de fil en excitant un circuit d'émission avec une forme d'onde de pas de référence de tension, dans lequel le circuit d'émission comprend la boucle de fil ;

    mettre à l'échelle le courant de charge approximé à un niveau suffisant pour générer un signal de tension de réception minimale dans un récepteur à une première distance entre la boucle de fil et le récepteur ;

    générer un premier signal de tension en utilisant le courant de charge mis à l'échelle, l'inductance de boucle estimée et la résistance de boucle estimée ;

    exciter le circuit d'émission avec le premier signal de tension.


     
    2. Procédé selon la revendication 1, dans lequel l'étape d'estimation de l'inductance de boucle et de la résistance de boucle inclut l'étape consistant à surveiller le courant du circuit d'émission en réponse à la forme d'onde de pas de référence de tension.
     
    3. Procédé selon la revendication 2, dans lequel l'étape de surveillance du courant du circuit d'émission inclut l'étape consistant à capturer une amplitude de courant en fonction du temps en réponse à la forme d'onde de pas de référence de tension.
     
    4. Procédé selon la revendication 1, dans lequel la transformée comprend une transformée de Fourier discrète.
     
    5. Procédé selon la revendication 1, dans lequel la première fréquence comprend une première fréquence harmonique du courant de charge décrit.
     
    6. Procédé selon la revendication 5, dans lequel la seconde fréquence comprend une seconde fréquence harmonique du courant de charge décrit.
     
    7. Procédé selon la revendication 6, comprenant l'étape consistant à générer une première composante porteuse du courant de charge approximé en utilisant la première fréquence harmonique, dans lequel la première composante porteuse présente un poids de « 1 ».
     
    8. Procédé selon la revendication 7, comprenant l'étape consistant à générer une seconde composante porteuse du courant de charge approximé en utilisant la seconde fréquence harmonique, dans lequel une amplitude de la seconde composante porteuse est pondérée par rapport à une amplitude de la première composante porteuse.
     
    9. Procédé selon la revendication 8, dans lequel la transformée appliquée à la fonction temporelle discrète utilisée pour décrire le courant de charge identifie le poids relatif de la seconde composante porteuse.
     
    10. Procédé selon la revendication 8, dans lequel l'étape de fourniture de l'approximation du courant de charge décrit comprend l'étape consistant à sommer la première composante porteuse et la seconde composante porteuse.
     
    11. Procédé selon la revendication 1, dans lequel le courant de charge approximé comprend une fonction temporelle discrète.
     
    12. Procédé selon la revendication 1, dans lequel le premier signal de tension comprend une fonction temporelle discrète.
     
    13. Procédé selon la revendication 1, dans lequel une entrée appliquée à la fonction temporelle discrète utilisée pour décrire le courant de charge comprend un vecteur tournant en rotation.
     
    14. Procédé selon la revendication 13, dans lequel la valeur de vecteur tournant tourne périodiquement entre 0 et 2π radians.
     
    15. Procédé selon la revendication 14, dans lequel la fonction temporelle discrète utilisée pour décrire le courant de charge présente une première pente lorsque la valeur de vecteur tournant se situe dans une première plage.
     
    16. Procédé selon la revendication 15, dans lequel la première pente est positive.
     
    17. Procédé selon la revendication 15, dans lequel la fonction temporelle discrète utilisée pour décrire le courant de charge présente une seconde pente lorsque la valeur de vecteur tournant se situe dans une seconde plage.
     
    18. Procédé selon la revendication 17, dans lequel la seconde pente est négative.
     
    19. Procédé selon la revendication 15, dans lequel la première plage comprend approximativement trente pour cent de 2π radians.
     
    20. Procédé selon la revendication 1, comprenant l'étape consistant à lire un signal de tension à un emplacement dans le circuit d'émission, dans lequel le signal de tension est représentatif d'un courant d'émission correspondant dans le circuit d'émission.
     
    21. Procédé selon la revendication 20, comprenant l'étape consistant à traiter le signal de tension en vue d'estimer le signal de tension de réception.
     
    22. Procédé selon la revendication 21, dans lequel l'étape d'estimation inclut l'étape consistant à déterminer une moyenne quadratique (RMS) du signal de tension de réception estimé.
     
    23. Procédé selon la revendication 22, dans lequel l'étape d'estimation inclut l'étape consistant à déterminer une asymétrie du signal de tension de réception estimé.
     
    24. Procédé selon la revendication 23, dans lequel l'asymétrie comprend un rapport des pics positifs agrégés et négatifs agrégés du signal de tension de réception estimé.
     
    25. Procédé selon la revendication 23, comprenant l'étape consistant à établir une valeur de moyenne RMS cible, autrement dit une valeur efficace cible.
     
    26. Procédé selon la revendication 25, dans lequel une plage de moyenne RMS cible comprend la valeur de moyenne RMS cible plus ou moins un pourcentage.
     
    27. Procédé selon la revendication 26, comprenant l'étape consistant à établir une valeur d'asymétrie cible.
     
    28. Procédé selon la revendication 27, dans lequel une plage d'asymétrie cible comprend la valeur d'asymétrie cible plus ou moins un pourcentage.
     
    29. Procédé selon la revendication 28, comprenant l'étape consistant à ajuster de manière itérative un vecteur d'impédance du circuit d'émission jusqu'à ce que la moyenne RMS et l'asymétrie du signal de tension de réception estimé se situent dans les plages de moyenne RMS et d'asymétrie cibles correspondantes, dans lequel le vecteur d'impédance comprend initialement la résistance de boucle et l'inductance de boucle.
     
    30. Procédé selon la revendication 29, dans lequel l'étape d'ajustement comprend l'étape consistant à mettre à l'échelle le vecteur d'impédance lorsque la moyenne RMS se situe en dehors de la plage de moyenne RMS cible.
     
    31. Procédé selon la revendication 29, dans lequel l'étape d'ajustement comprend l'étape consistant à faire tourner un angle de phase du vecteur d'impédance lorsque l'asymétrie se situe en dehors de la plage d'asymétrie cible.
     
    32. Procédé selon la revendication 1, dans lequel le courant de charge décrit comprend une asymétrie.
     
    33. Procédé selon la revendication 32, dans lequel le récepteur exploite l'asymétrie en vue de déterminer la direction d'approche du récepteur au niveau de la boucle de fil portant le courant de charge décrit.
     




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    Cited references

    REFERENCES CITED IN THE DESCRIPTION



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    Patent documents cited in the description