(19)
(11)EP 3 451 804 B1

(12)EUROPEAN PATENT SPECIFICATION

(45)Mention of the grant of the patent:
01.04.2020 Bulletin 2020/14

(21)Application number: 17188147.7

(22)Date of filing:  28.08.2017
(51)International Patent Classification (IPC): 
H05K 3/28(2006.01)

(54)

POTTING METHOD

VERGUSSVERFAHREN

PROCÉDÉ D'ENROBAGE


(84)Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

(43)Date of publication of application:
06.03.2019 Bulletin 2019/10

(73)Proprietor: Goodrich Actuation Systems Limited
West Midlands B90 4SS (GB)

(72)Inventors:
  • ABRAHAM, David
    Weston on Tent, Derbyshire (GB)
  • WALLER, Stuart
    Gloucester, Gloucestershire GL2 0PH (GB)

(74)Representative: Dehns 
St. Bride's House 10 Salisbury Square
London EC4Y 8JD
London EC4Y 8JD (GB)


(56)References cited: : 
US-A- 6 127 038
US-A1- 2007 125 576
US-A1- 2006 220 260
US-A1- 2014 151 868
  
      
    Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


    Description

    TECHNICAL FIELD



    [0001] The present disclosure is concerned with methods of potting components such as pcbs, particularly pcb stacks, and is particularly useful for components used in extreme environments such as environments where the components can be subject to extreme temperatures, shock, vibration and/or extreme pressure.

    BACKGROUND



    [0002] It is known for e.g. electronic circuits and components to encase the circuits/components, also known as 'potting' to provide a protective casing around the circuit to protect the fragile electronics from damage. This is particularly important where the electronics are used in harsh environments where they may be subjected to extremes of temperature or pressure or to shocks or high vibrations. An example of such an environment is in the aerospace industry.

    [0003] Where a system requires several electronic circuits, it is often preferable to form the various circuits on printed circuit boards (pcbs) which are arranged in a stack of pcbs, to save space. In aircraft, for example, space for electronics may be at a premium.

    [0004] It is common practice for such stacks to be potted with a polymeric material to enhance the overall structural rigidity and to protect against shock, vibrations etc and also to act as a medium to dissipate heat generated from powered electric components. Depending on the volume of potting and the maximum/minimum exposure temperatures, expansion or contraction of the potting material can induce significant stresses which could result in damage to the circuit board or the interconnecting mechanical and electrical joints.

    [0005] Existing potting compounds have a high density and have a high rate of expansion when heated, and a high rate of contraction when cooled. At extreme temperatures, therefore, the potting can stress the circuit components and/or joints.

    [0006] Potting is known from US 2006/0220260 and US 6,127,038. US20070125576 describes a method for encapsulating a stack of circuit boards using one potting compound.

    [0007] The present disclosure is to a method of improving potting to avoid these problems.

    SUMMARY



    [0008] According to the present disclosure there is provided a method of potting as defined by the claims.

    [0009] The first potting compound is preferably less dense than the second and can be applied to areas of the circuit or pcb stack more prone to damage or more fragile e.g. to the areas of mechanical or electrical interconnecting joints. This compound is selected to apply less stress to these areas when heated or cooled. The first compound is usually a compound that has a lower rate of expansion and/or contraction when heated/cooled.

    [0010] The second compound can then be a conventional potting compound applied over the whole circuit to be encased including over the first compound. The second potting can be applied over a top surface of the circuit part of which has been potted in the first potting material or, indeed, over other surfaces.

    [0011] The method of this disclosure therefore offers a degree of design optimisation by using a hybrid of different potting compounds to allow specific regions to be potted with materials that, when cured, offer the necessary structural rigidity but provide vibration damping in the case of increased rigidity. Regions of structural potting can be controlled by pre-potting with materials that induce less stress, therefore reducing the overall stresses induced on the interconnecting mechanical and electrical bonding joints. This is achieved by having multiple potting and curing stages to enable the hybrid potting to be built up in layers.

    [0012] Preferred embodiments will now be described, by way of example only, with reference to the drawing.

    BRIEF DESCRIPTION OF THE DRAWINGS



    [0013] Figure 1 is a schematic view of how the potting method of this disclosure can be used.

    DETAILED DESCRIPTION



    [0014] Figure 1 shows an example pcb stack 100 to be potted. In the example, the stack comprises three pcbs 1,2,3 and interconnections 10, 11, 12, which may be wires, welds, bonds or other mechanical or electrical interconnections between, to and from the pcbs. Of course any other devices, components or circuitry units can be potted according to the method.

    [0015] In the example, there is a desire to reduce stresses on the lower two pcbs 1,2 and on the interconnections 10, 11, 12, whilst ensuring that the stack has the required rigidity.

    [0016] The potting method of this disclosure involves pre-potting selected regions of the stack 100 - here the lower two pcbs 1,2 and interconnections 10, 11, 12, using a first potting material 200 selected to provide some damping to these regions. The first potting material is preferably less dense than conventional potting material and may be e.g. a gel-type material. The potting of the selected regions is performed in a known manner and the first potting material is cured.

    [0017] The stack 100 is preferably provided in a housing 500 and the first potting material is, in examples such as that shown, poured or dispensed into the housing first to pot the selected parts of the unit. This is then cured. After curing, the housing is topped up with a second potting material. The second potting stage is performed by applying potting of the second, different potting material 300 over the top pcb 3 and over the first potting material 200 to provide a desired greater rigidity at the top of the unit which is more subject to impact etc. The second potting material is preferably denser than the first and may be e.g. a conventional silicone elastomer material. This is applied in any known manner and is cured.

    [0018] Figure 1 is just one example. The method of this disclosure allows any selected regions to be pre-potted. The stresses induced on the circuit will be accommodated by the first potting material rather than the stresses being applied directly to the selected regions e.g. individual pcbs or interconnections.

    [0019] Depending on the unit, and whether there is clearance in the housing 500, the second potting 300 could also extend around the sides and even the bottom of the unit in the housing.

    [0020] As an example, the inventor has experimented with Dow Corning™ EE3200 potting for the first potting material and Sylgard™ 1700 for the second potting material, but these are just two of many possible examples.

    [0021] The potting method of this disclosure can find application in a wide range of industries where potting of circuitry is necessary, and where vibration damping is desirable.


    Claims

    1. A method of potting a circuit unit (100) comprising a stack of two or more printed circuit boards (1, 2, 3) connected by interconnections; (10, 11, 12) the method comprising:

    performing a first potting stage by applying a first potting material (200) over selected regions of the circuit unit wherein the selected regions include one or more printed circuit boards of a lower part of the stack and/or one or more interconnections of a lower part of the stack; and characterized by performing a second potting stage by applying a second, different potting material (300) over the circuit unit and over the first potting material;

    wherein the first potting material has a lower density than the second potting material.


     
    2. The method of claim 1 further comprising curing the first potting material before the second potting stage and curing the second potting material after the second potting stage.
     
    3. The method of claim 1 or 2, wherein the first potting material is a gel-type material and the second potting material is an elastomer material.
     
    4. A potted circuit unit comprising:

    a circuit unit (100) comprising a stack of two or more printed circuit boards (1,2,3) connected by interconnections; (10, 11, 12) a first potting material (200) applied over selected regions of the circuit unit, wherein the selected regions include one or more printed circuit boards of a lower part of the stack and/or one or more interconnections of a lower part of the stack; and

    a second, different potting material (300) applied over the circuit unit and over the first potting material, (200) wherein the first potting material (200) has a lower density than the second potting material.


     
    5. The potted circuit unit of claim 4, wherein the first potting material is a gel-type material and the second potting material is an elastomer material.
     


    Ansprüche

    1. Vergussverfahren einer Schalteinheit (100), umfassend einen Stapel von zwei oder mehr Leiterplatten (1, 2, 3), die durch Verbindungen (10, 11, 12) verbunden sind, wobei das Verfahren Folgendes umfasst:

    Ausführen einer ersten Vergussstufe durch das Auftragen eines ersten Vergussmaterials (200) über ausgewählte Bereiche der Schalteinheit, wobei die ausgewählten Bereiche eine oder mehrere Leiterplatten eines unteren Teils des Stapels und/oder eine oder mehrere Verbindungen eines unteren Teils des Stapels einschließen; und gekennzeichnet durch das Ausführen einer zweiten Vergussstufe durch das Auftragen eines zweiten, anderen Vergussmaterials (300) über die Schalteinheit und über das erste Vergussmaterial;

    wobei das erste Vergussmaterial eine geringere Dichte aufweist als das zweite Vergussmaterial.


     
    2. Verfahren nach Anspruch 1, ferner umfassend das Aushärten des ersten Vergussmaterials vor der zweiten Vergussstufe und das Aushärten des zweiten Vergussmaterials nach der zweiten Vergussstufe.
     
    3. Verfahren nach Anspruch 1 oder 2, wobei das erste Vergussmaterial ein gelartiges Material ist und das zweite Vergussmaterial ein Elastomermaterial ist.
     
    4. Vergossene Schalteinheit, umfassend:

    eine Schalteinheit (100), umfassend einen Stapel von zwei oder mehr Leiterplatten (1, 2, 3), die durch Verbindungen (10, 11, 12) verbunden sind;

    ein erstes Vergussmaterial (200), das über ausgewählte Bereiche der Schalteinheit aufgetragen wird, wobei die ausgewählten Bereiche eine oder mehrere Leiterplatten eines unteren Teils des Stapels und/oder eine oder mehrere Verbindungen eines unteren Teils des Stapels einschließen; und

    ein zweites, anderes Vergussmaterial (300), das über die Schalteinheit und über das erste Vergussmaterial (200) aufgetragen wird, wobei das erste Vergussmaterial (200) eine geringere Dichte aufweist als das zweite Vergussmaterial.


     
    5. Vergossene Schalteinheit nach Anspruch 4, wobei das erste Vergussmaterial ein gelartiges Material ist und das zweite Vergussmaterial ein Elastomermaterial ist.
     


    Revendications

    1. Procédé d'enrobage d'une unité de circuit (100) comprenant un empilement de deux cartes de circuit imprimé ou plus (1, 2, 3) reliées par des interconnexions (10, 11, 12) ;
    le procédé comprenant :

    l'exécution d'une première étape d'enrobage en appliquant un premier matériau d'enrobage (200) sur des régions sélectionnées de l'unité de circuit, dans lequel les régions sélectionnées comportent une ou plusieurs cartes de circuit imprimé d'une partie inférieure de l'empilement et/ou une ou plusieurs interconnexions d'une partie inférieure de l'empilement ; et caractérisé par

    l'exécution d'une seconde étape d'enrobage en appliquant un second matériau d'enrobage différent (300) sur l'unité de circuit et sur le premier matériau d'enrobage ;

    dans lequel le premier matériau d'enrobage a une densité inférieure à celle du second matériau d'enrobage.


     
    2. Procédé selon la revendication 1, comprenant en outre le durcissement du premier matériau d'enrobage avant la seconde étape d'enrobage et le durcissement du second matériau d'enrobage après la seconde étape d'enrobage.
     
    3. Procédé selon la revendication 1 ou 2, dans lequel le premier matériau d'enrobage est un matériau de type gel et le second matériau d'enrobage est un matériau élastomère.
     
    4. Unité de circuit enrobée comprenant :

    une unité de circuit (100) comprenant un empilement de deux cartes de circuit imprimé ou plus (1, 2, 3) reliées par des interconnexions (10, 11, 12) ;

    un premier matériau d'enrobage (200) appliqué sur des régions sélectionnées de l'unité de circuit, dans laquelle les régions sélectionnées comportent une ou plusieurs cartes de circuit imprimé d'une partie inférieure de l'empilement et/ou une ou plusieurs interconnexions d'une partie inférieure de l'empilement ; et

    un second matériau d'enrobage différent (300) appliqué sur l'unité de circuit et sur le premier matériau d'enrobage (200),

    dans laquelle le premier matériau d'enrobage (200) a une densité inférieure à celle du second matériau d'enrobage.


     
    5. Unité de circuit enrobée selon la revendication 4, dans laquelle le premier matériau d'enrobage est un matériau de type gel et le second matériau d'enrobage est un matériau élastomère.
     




    Drawing








    Cited references

    REFERENCES CITED IN THE DESCRIPTION



    This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.

    Patent documents cited in the description