(19)
(11)EP 3 522 232 A3

(12)EUROPEAN PATENT APPLICATION

(88)Date of publication A3:
14.08.2019 Bulletin 2019/33

(43)Date of publication A2:
07.08.2019 Bulletin 2019/32

(21)Application number: 18195984.2

(22)Date of filing:  21.09.2018
(51)Int. Cl.: 
H01L 29/78  (2006.01)
H01L 21/82  (2006.01)
H01L 27/088  (2006.01)
H01L 21/336  (2006.01)
H01L 21/8234  (2006.01)
(84)Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated Extension States:
BA ME
Designated Validation States:
KH MA MD TN

(30)Priority: 20.10.2017 US 201762574772 P
05.09.2018 US 201816121730

(71)Applicant: MEDIATEK INC.
30078 Hsinchu (TW)

(72)Inventors:
  • WAN, Cheng-Tien
    Hsinchu 30078 (TW)
  • HUANG, Yao-Tsung
    Hsinchu 30078 (TW)
  • HUANG, Yun-San
    Hsinchu 30078 (TW)
  • LEE, Ming-Cheng
    Zhubei City, Hsinchu County 302 (TW)
  • HUANG, Wei-Che
    Zhudong Township, Hsinchu County 310 (TW)

(74)Representative: Krauns, Christian 
Wallinger Ricker Schlotter Tostmann Patent- und Rechtsanwälte Partnerschaft mbB Zweibrückenstraße 5-7
80331 München
80331 München (DE)

  


(54)SEMICONDUCTOR CHIP AND MANUFACTURING METHOD THEREOF


(57) A semiconductor chip includes a substrate and a transistor. The transistor is formed on the substrate and includes an insulation layer and a fin. The fin includes a base portion and a protrusion connected with the base portion, wherein the protrusion is projected with respect to an upper surface of the base portion and has a recess recessed with respect to the upper surface.