(19)

(11)

EP 3 965 170 A3

(12)	EUROPEAN PATENT APPLICATION

(88) Date of publication A3: 30.03.2022 Bulletin 2022/13 (43) Date of publication A2: 09.03.2022 Bulletin 2022/10 (21) Application number: 21195498.7 (22) Date of filing:  08.09.2021

(51) International Patent Classification (IPC):  H01L 31/105(2006.01) H01L 31/107(2006.01) (52) Cooperative Patent Classification (CPC): H01L 31/1075; H01L 31/105; H01L 31/107

(84) Designated Contracting States: AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR Designated Extension States: BA ME Designated Validation States: KH MA MD TN (30) Priority: 08.09.2020 US 202017014666 (71) Applicant: Argo AI, LLC Pittsburgh, PA 15222 (US)	(72) Inventors: PICCIONE, Brian Pittsburgh, 15222 (US) ITZLER, Mark Pittsburgh, 15222 (US) JIANG, Xudong Pittsburgh, 15222 (US) SLOMKOWSKI, Krystyna Pittsburgh, 15222 (US) HWANG, Harold Y. Pittsburgh, 15222 (US) HOSTETLER, John L. Pittsburgh, 15222 (US) (74) Representative: Fennell, Gareth Charles et al Kilburn & Strode LLP Lacon London 84 Theobalds Road London WC1X 8NL London WC1X 8NL (GB)

(54)	SYSTEMS, METHODS, AND DEVICES FOR REDUCING OPTICAL AND ELECTRICAL CROSSTALK IN PHOTODIODES

(57) Devices, systems, and methods are provided for reducing electrical and optical crosstalk in photodiodes. A photodiode may include a first layer with passive material, the passive material having no electric field. The photodiode may include a second layer with an absorbing material, the second layer above the first layer. The photodiode may include a diffused region with a buried p-n junction. The photodiode may include an active region with the buried p-n junction and having an electric field greater than zero. The photodiode may include a plateau structure based on etching through the second layer to the first layer, the etching performed at a distance of fifteen microns or less from the buried p-n junction.

Search report

Search report