Abstract  Description  Claims  Drawing  Search report  Cited references 

A Speed-Enhancing Dual-Trial Instantaneous Switching Architecture for SAR ADCs   [0004] 
A 1.7mW 11b 250MS/s 2x Interleaved Fully Dynamic Pipelined SAR ADC in 40nm Digital CMS   [0053] 
A 150MS/s 133µW 7b ADC in 90nm Digital CMOS Using a Comparator-based Asynchronous Binary Search Sub-ADC   [0054] 
An 8-bit 450-MS/s Single-Bit/Cycle SAR ADC in 65-nm CMOS   [0068] 
A 32mW 1.25GS/s 2b/step SAR ADC in 0.13µm CMOS   [0069]