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EP 0 352 805 B1 |
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EUROPEAN PATENT SPECIFICATION |
(45) |
Mention of the grant of the patent: |
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26.10.1994 Bulletin 1994/43 |
(22) |
Date of filing: 28.07.1989 |
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(51) |
International Patent Classification (IPC)5: H03H 7/34 |
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Distributed constant type delay line device and a manufacturing method thereof
Verzögerungsleitung mit verteilten Impedanzelementen und Verfahren zu dessen Herstellung
Ligne à retard à constantes distribuées et son procédé de fabrication
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(84) |
Designated Contracting States: |
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DE FR GB NL |
(30) |
Priority: |
28.07.1988 JP 186928/88
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Date of publication of application: |
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31.01.1990 Bulletin 1990/05 |
(73) |
Proprietor: FUJITSU LIMITED |
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Kawasaki-shi,
Kanagawa 211 (JP) |
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(72) |
Inventors: |
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- Ishizaka, Taeko
Tokyo 158 (JP)
- Kasai, Yoshihiko
Yokohama-shi
Kanagawa 247 (JP)
- Okamura, Hajime
Yokohama-shi
Kanagawa 241 (JP)
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(74) |
Representative: Lehn, Werner, Dipl.-Ing. et al |
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Hoffmann Eitle,
Patent- und Rechtsanwälte,
Postfach 81 04 20 81904 München 81904 München (DE) |
(56) |
References cited: :
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- MICROWAVE JOURNAL, vol. 18, no. 8, August 1975, pages 49-51, Dedham, US; G.R. TRAUT:
"Microwave stripline packaging with UMD's"
- IBM TECHNICAL DISCLOSURE BULLETIN, vol. 31, no. 1, June 1988, pages 98-100, Armonk,
US; "Delay line on ceramic"
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Note: Within nine months from the publication of the mention of the grant of the European
patent, any person may give notice to the European Patent Office of opposition to
the European patent
granted. Notice of opposition shall be filed in a written reasoned statement. It shall
not be deemed to
have been filed until the opposition fee has been paid. (Art. 99(1) European Patent
Convention).
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BACKGROUND OF THE INVENTION
[0001] The present invention generally relates to delay line devices and more particularly
to a distributed constant type delay line device and a manufacturing method thereof.
[0002] In digital processing systems such as telecommunication systems and computers in
which processing of digital signals is performed, a distributed constant type delay
line device is used for timing adjustment of the signals or adjustment of delay time
of the signal so that the digital signals passed through various components and wiring
patterns have a proper timing.
[0003] The distributed constant type delay line device is a device comprising a plate-like
base body carrying a delay path pattern on one side for delaying the signal passing
therethrough. When the delay time to be obtained by such a device exceeds about 2
nanoseconds, however, ordinary sized delay line device is not appropriate for the
purpose, as the device cannot produce such a large delay time. Thus, the delay line
device is constructed by assembling two base bodies respectively carrying delay line
patterns so that a long delay path is formed.
[0004] A distributed constant delay line known in the prior art is disclosed in IBM technical
disclosure bulletin, 31, june'88, no1, pages 98-100, wherein 2 substrates are sandwiched
together with a ground plane in between, an electrode pattern being printed on the
outer side of each substrate.
[0005] FIGS.1 and 2 show a prior art delay line device 10 using two base bodies. Referring
to the drawings, the device 10 comprises a first base body 14 printed with a conductor
pattern 12 which in turn comprises a pair of zigzag conductor patterns 12a and 12b
as shown in FIG.1 and a second base body 17 printed with another zigzag conductor
pattern 15. The conductor pattern 12a and the conductor pattern 12b are provided on
a front side of the first base body 14 and are formed symmetrically about a center
line (not shown) passing centrally through the body 14. On the other hand, the conductor
pattern 15 is a single pattern formed also symmetrically on a front side of the second
base body 17. Further, the base bodies 14 and 17 carry conductor layers 14a and 17a
on respective rear sides for ground connection and are assembled as a unitary body
by connecting the conductive layers as shown in FIG.3 by soldering or glueing using
a conductive adhesive.
[0006] As can be seen from FIGS.1 and 2, the base body 14 has a length L₁ and a width W₁
and the base body 17 has a length L₂ and a width W₂, in which the width W₁ is made
substantially larger than the width W₂. On the other hand, the length L₁ and the length
L₂ are made identical. In the delay line device 10 having such a construction, a pair
of connection pins 20 and 21 are provided on a bottom edge of the base body 14 and
are connected to respective first ends of the conductor patterns 12a and 12b. Further,
respective second ends of the conductor patterns 12a and 12b are connected to ends
of the conductor pattern 15 by jumpers 18 and 19 as shown in FIGS.1 and 2. Furthermore,
ground pins 22 and 23 are provided on the bottom edge of the base body 14 in contact
with the conductor layer 14a as shown in FIG.2. In order to avoid contact between
the conductor layer 14a and the pins 20 and 21, there is provided a cutout region
14b in the conductor layer 14a along the bottom edge of the body 14 for avoiding the
pins 20 and 21.
[0007] Thus, an input signal applied to the pin 20 is passed through the conductor 12a,
conductor 15 and the conductor 12b and reaches the pin 21 with a delay time proportional
to the distance of the delay path extending from the pin 20 to the pin 21.
[0008] In such a prior art delay line device, there is a problem in that the obtained delay
time is limited due to the limited size of the second base body 17 having the width
W₂ which is substantially reduced with respect to the width W₁ of the first base body
14. Such a difference in size of the base body is needed for securing region for connection
of the pins 20 - 23 at the bottom edge of the base body 14. When the second base body
17 is designed to have a same size as that of the base body 14, there would be no
place for providing the pins 20 and 21 for input and output of the signals and particularly
for the pins 22 and 23 for ground connection as the conductor layer 14a or 17a is
fully embedded in the base bodies. Thus, the conventional delay line device inevitably
has to be designed to use two different base bodies having different sizes which,
however, inevitably invites increase in size of the device when a large delay time
is needed. However, such an increase in the size of the device is undesirable from
the view point of reducing the size of the apparatus using the delay line device.
[0009] Further, such a prior art delay line device has a problem in manufacturing because
of the difference in the size of the base body 14 and the base body 17. Thus, when
the base body 14 and the base body 17 are obtained by cutting of a large board, one
has to provide two separate boards, one for the base body 14 and the other for the
base body 17, as the cutting of a single board into the body 14 and body 17 having
different sizes and shapes needs an extremely complex sawing operation. Associated
with the use of different base bodies 14 and 17, there is another problem in that
the conductor patterns 12 for the base body 14 and the conductor pattern 15 for the
base body 17 have to be provided separately. Such a separately performed patterning
increases the number of manufacturing steps and hence the cost of the device.
[0010] Further, the prior art delay line device has another problem in that two jumpers
18 and 19 have to be used for connecting the conductor pattern 12 to the conductor
pattern 15. Such a use of two jumpers increases the risk that the connection is failed
and thus reduces the reliability of the device. Needless to say, the manufacturing
step is increased by using two jumpers as compared to the case where no or single
jumper is used.
[0011] In the prior art delay line device, there is still another problem in that the conductor
layer 14a provided on the rear side of the base body 14 has to be patterned such that
the conductor layer 14a avoids the vicinity of the pins 20 and 21. Such patterning
of the conductor layer 14a obviously decreases the efficiency of production of the
device.
[0012] Furthermore, the prior art device carries both the pin 20 for inputting the signal
and the pin 21 for outputting the signal on the base body 14. In other words, there
is a forward path comprising the conductor pattern 12a and a left half of the conductor
pattern 15 for passing the input signal applied to the input terminal 20 towards the
interior of the device and a return path comprising a right half of the conductor
pattern 15 and the conductor patter 12a for passing the signal to the output terminal
21. Thus, it is inevitable that the conductor patterns 12 and 15 are turned a number
of times for a predetermined length of the delay path. When such a turn or bend is
made in the conductor pattern, there is an increase in the inductance which may cause
undesirable impedance change in combination with capacitance underneath the conductor
pattern.
SUMMARY OF THE INVENTION
[0013] The invention is as defined in the appended claims.
[0014] Accordingly, it is a general object of the present invention to provide a novel and
useful distributed constant type delay line device wherein the aforementioned problems
are eliminated.
[0015] Another and more specific object of the present invention is to provide a distributed
constant type delay line device in which the size of the device is reduced for a predetermined
delay time to be obtained by the device.
[0016] Another object of the present invention is to provide a distributed constant type
delay line device in which a manufacturing process thereof is substantially simplified.
[0017] Another object of the present invention is to provide a distributed constant type
delay line device in which reliability of the device is substantially improved.
[0018] Another object of the present invention is to provide a distributed constant type
delay line device comprising a first base body carrying a first delay path pattern
on a front side and a ground conductor layer on a rear side, and a second base body
having a substantially identical size and shape as those of the first base body and
carrying a second delay path pattern on a front side as well as a ground conductor
layer on a rear side, wherein said first and second base bodies are assembled as a
unitary body by contacting the respective ground conductor layers each other, each
of the base bodies has a same corner portion thereof cut out for exposing the conductor
layer on the other base body when assembled, and there is a ground pin connected to
the exposed ground conductor at each of such corners. According to the present invention,
the corner of the base body which is not provided with the delay path pattern is used
efficiently for connection to the ground pin and the length of the delay path can
be increased without increasing the size of the device by utilizing substantially
entire front side of the base bodies for the delay path pattern. Further, the manufacturing
process of the device is simplified as the both base bodies have substantially identical
size and shape and thus can be cut out from a large board by a simple process. The
manufacturing process is further simplified as the rear side of the base body is covered
by the ground conductor layer uniformly. In contrast, the prior art device has to
be provided with a cutout region in the ground conductor layer so as to avoid connection
pins. Further, the device of the present invention needs only one jumper for connecting
the first and second delay path patterns, as there is only one pattern on each of
the first and second base bodies which are connected at one point. Accordingly, failure
of the device caused by the failure of the jumper is substantially reduced. As the
base bodies to be assembled have substantially identical size and shape, the assembly
work of the device is greatly simplified. Further, the number of turns in the delay
path pattern is substantially reduced and associated therewith, impedance change in
the device is substantially reduced.
[0019] Other objects and further features of the present invention will become apparent
from the following detailed description when read in conjunction with attached drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0020]
FIG.1 is a perspective view showing a prior art distributed constant type delay line
device;
FIG.2 is a perspective view showing a rear side of the device of FIG.1;
FIG.3 is a side view showing the device of FIG.1;
FIG.4 is a distributed constant type delay line device according to a first embodiment
of the present invention;
FIG.5 is a side view showing the device of FIG.4;
FIG.6 is a perspective view showing a rear side of the device of FIG.4;
FIG.7 is a perspective view showing a first base body forming a part of the device
of FIG.4;
FIG.8 is a perspective view showing a second base body forming a part of the device
of FIG4;
FIG.9 is a plan view showing a large board on which a number of base bodies are defined
with respective delay path patterns printed thereon, in a state prior to cutting into
respective pieces;
FIG.10 is a plan view showing the board of FIG.9 in a state that the board is covered
with a conductor layer uniformly;
FIG.11 is a perspective view showing a second embodiment of the device of the present
invention; and
FIG.12 is a plan view similar to FIG.9 showing a large board on which a number of
base bodies forming the device of FIG.11 are defined with respective delay path patterns
printed thereon, in a state prior to cutting into respective pieces.
DETAILED DESCRIPTION
[0021] FIGS.4 through 6 show a distributed constant type delay line device 30 according
to an embodiment of the present invention. The device comprises a first base body
31 shown in detail in FIG.7 and a second base body 32 shown in detail in FIG.8. As
illustrated in FIG.7, the base body 31 comprises a rectangular ceramic chip 33 having
a length L₃ and a width W₃ in which a lower right corner thereof is removed according
to a quadrant of a circle as shown by a cutout part 34. The ceramic chip 33 carries
a zigzag delay path pattern 36 on its front side 35 and a uniform conductor layer
38 on its rear side 37 such that the rear side 37 is covered by the conductor layer
38 uniformly. Further, the ceramic chip 33 carries a pair of connection pad regions
39 and 40 in correspondence to both ends of the delay path pattern 36. It should be
noted that the connection pad 29 is provided in coincidence with a center line 42
passing through a long upper edge 41 as well as through a bottom edge 43 of the chip
33 while the connection pad 40 is provided so as to be offset by a distance e₁ from
the center line 42 as clearly illustrated in FIG.7.
[0022] The chip 33 carries an input/output pin 44 on the lower edge 43 such that the pin
44 is connected to the connection pad 39. Thus, the pin 44 projects downwards from
the lower edge 43. Further, the ceramic chip 33 carries a ground pin 45 on the lower
edge 43 at a corner opposite from the corner where the cutout part 34 is provided
with respect to the center line 42.
[0023] The second base body 32 has an exactly the same construction as shown in FIG.8 and
the description thereof will be omitted. In order to distinguish the parts in the
base body 32 from those corresponding parts in the base body 31, a suffix "a" will
be attached to the reference numeral. It should be noted that the ceramic chip 33a
has size and shape which are identical to those of the ceramic chip 33.
[0024] When assembling the device 30, the second base body 32 is turned around by 180 degrees
about its center line 42a as illustrated by an arrow 46 in FIG.5 and is combined together
with the first base body 31 such that the rear side 37 and the rear side 37a make
a uniform contact via the ground pattern layers 38 and 38a.
[0025] FIGS.4 and 6 show the front side and the rear side of the delay line device 30, respectively.
As illustrated in the drawing, the ground pin 45a is connected to the ground conductor
layer 38a at the lower right corner of the device 30. It should be noted that the
part of the conductor layer 38a is exposed by the cutout part 34 of the base body
31 (FIG.4). Similarly, the ground pin 45 on the base body 31 is connected to the ground
conductor layer 38 at the lower right corner of the device 30 exposed by the cutout
part 34a (FIG.6). Further, the pins 44 and 44a are disposed symmetrically with respect
to the center line 42 as illustrated in FIGS.4 and 6. Further, the delay path patterns
36 and 36a are connected to each other at the top edge 41 by a jumper 47 which connects
the connection pads 39 and 39a. Note that the pad 39 and the pad 39a are provided
exactly on the center line 42 and therefore corresponds each other when the delay
line device is assembled. Thus, the delay path pattern 36 and the delay path pattern
36a are connected in series by the jumper 47 and the signal applied to the pin 44
is passed through a delay path having an overall length equal to a sum of the length
of pattern 36 and the pattern 36a, whereby the signal is arrived at the pin 44a with
a delay time proportional to the overall length.
[0026] As shown in FIGS.7 and 8, the lower right corner of the base bodies 31 and 32 is
cut out so as to provide the ground pins 45a and 45, respectively. As the purpose
of such cutout part 34 or 34a is only to expose a part of the ground conductor layer
38 or 38a for connection with the pins 45 and 45a, the area removed from the base
bodies by the cutout parts is minimum and there is no substantial decrease in the
length of the delay path pattern. Thus, the delay line device of the present invention
can accommodate the delay path pattern having a predetermined length while at the
same time reducing the size of the device. Alternatively, when the device is made
to have a conventional size, one can obtain a longer delay time as compared to the
prior art device.
[0027] Further, as the device of the present invention uses only one jumper 47, the chance
that the device fails to operate because of the defective connection at the jumper
47 is substantially reduced.
[0028] Next, manufacturing feature of the delay line device of the present invention will
be described with reference to FIG.9. In FIG.9, these parts constructed identically
to those corresponding parts in the preceding drawings are given identical reference
numerals and the description thereof will be omitted.
[0029] When manufacturing the delay line device shown in FIGS.4 and 6, a large ceramic board
50 with a regularly spaced round holes 51 is used. It should be noted that the round
hole 51 is arranged in a row and column formation. Next, both sides of the ceramic
board 50 is coated with a conductor 50a as shown in FIG.10 and the conductor on the
one side is patterned such that there are four conductor patterns 51a - 51d, two (51a
and 51b) on one side of the hole 51 and two (51c and 51d) on the other side of the
hole 51. The patterns 51a and 51b are connected each other and the patterns 51c and
51d are connected each other. Further, the conductor patterns 51a - 51d are disposed
symmetrically about a center of the round hole 51. In other words, there is a center
of symmetry at the center of the hole 51. Note that the pattern 51a is connected to
the pattern 51b below at a conductor part 56a acting as a connection pad and the pattern
51c is connected to the pattern 51d similarly at a conductor part 56b. Further, such
patterns 51a - 51d are repeated for each of the round holes 51, wherein each of the
the conductor patterns 51a and 51b is connected to an adjacent conductor pattern (not
shown) at a conductor part 56c and each of the conductor patterns 51c and 51d is connected
to an adjacent conductor at a conductor part 56d. Thus, the patterns 51a and 51b,
or the patterns 51c and 51d are symmetrical about lines 57 and 58 passing through
the center of the hole 51 horizontally and vertically.
[0030] Next, the ceramic board 50 is cut along the longitudinal lines 57 as well as along
the transversal lines 58 each passing either through the center of respective holes
51 or midpoints m₁ or m₂ between adjacent holes, and the ceramic pieces 33 and 34
carrying the delay path patterns 36 and 36a are obtained. Responsive to the cutting
of the board 50 into the ceramic pieces, the connection pads 39 and 39a are formed
in correspondence to the conductor parts 56c and 56d, the connection pads 40 and 40a
are formed in correspondence to the conductor parts 56a and 56b, and the ground conductor
layers 38 and 38a are formed in correspondence to the conductor 50a. Such ceramic
pieces 33 and 33a are then combined each other by contacting the ground conductor
layers 38 and 38a and are assembled as a unitary body by soldering the both conductor
layers or glueing the conductor layers using electrically conductive adhesives. It
should be noted that the assembling is made such that both base bodies register each
other and the lower right corner of the conductor layer 38 or 38a is exposed for connection
to the ground pins 45 or 45a.
[0031] After connection of the pads 39 and 39a by the jumper 47, the ground pins 45 and
45a are provided respectively on the ceramic chips 33 and 33a as already described,
and the pins 44 and 44a are provided so as to contact with the connection pads 40
and 40a. As can be seen from the side view of FIG.5, the jumper 47 and the pins 44,
44a, 45 and 45a hold the assembled ceramic chips firmly from both sides.
[0032] According to the present invention, both of the first and second ceramic chips 33
and 33a can be cut out from a single ceramic board with respective delay path patterns
printed thereon by a simple sawing operation. Further, as a consequence of use of
the single ceramic board, patterning of the delay path can be simplified, as the hitherto
needed separately performed patternings for forming different delay path patterns
on different ceramic chips, is eliminated in the present invention. The manufacturing
of the device of the present invention is also simplified as a result of use of the
single jumper for connecting the patterns 36 and 36a. Further, manufacturing of the
device is simplified as the hitherto needed cutout of the ground conductor layer for
avoiding the connection pins as shown in the prior art device of FIG.2 can be eliminated
and the efficiency of production of the device is significantly improved.
[0033] FIG.11 shows a second embodiment of the distributed time constant type delay line
device of the present invention. In the drawing, these parts constructed identically
to those corresponding parts in the preceding drawings are given identical reference
numerals and the description thereof will be omitted.
[0034] The device of FIG.11 is essentially the same as the device of FIG.4 except that a
first base body 62 has its lower left corner cut out linearly as shown by a cutout
part 61. Similarly, a second base body 63 has its lower left corner (when viewed from
a rear side in FIG.11) cut out linearly as shown by a cutout part 61a. As a result,
there is formed a triangular exposed region in the ground conductor layer 38a in correspondence
to the cutout part 61 and another triangular exposed region in the ground conductor
layer 38 (not shown) in correspondence to the cutout part 61a. The ground pins 45
and 45a are contacted to the ground conductor layers 38a and 38 at such exposed parts.
As other constructions are identical to those of the device of the first embodiment,
further description of the device of FIG.11 will be omitted.
[0035] FIG.12 shows the ceramic board used for production of the device of FIG.11. In the
drawing, these parts having identical construction with those corresponding parts
in the preceding drawings are given identical reference numerals and the description
thereof will be omitted. In this embodiment, it can be seen that a square hole 61
is provided on the ceramic board 50 in place of the round hole 51. As other processes
for manufacturing the device of FIG.11 are substantially identical to those of the
first embodiment, further description will be omitted.
[0036] Further, the delay path patterns 36 and 36a need not to be identical to each other
but may be different. For example, the pattern 12 and 15 as shown in FIGS.1 and 2
may also be used depending on the needs. Of course, the cutout part at the lower left
corner of the device can be provided at the lower right corner of the device. Further,
the size and shape of the cutout parts in the first base body and the second base
body may be changed depending on the needs. Thus, the through hole provided on the
ceramic board 50 before cutting the board into respective ceramic pieces is not limited
to the true circle or square as shown in FIG.9 or FIG.12 but may take a different
form. In one example, the form of the cutout part may be changed in the first and
second base bodies such that the first base body has a round cutout part as shown
in FIG.4 and the second base body has a straight cutout part as shown in FIG.11.
[0037] Further, the present invention is not limited to these embodiments but various variations
and modifications may be made without departing from the scope of the invention, as
defined in the appended claims.
[0038] Reference signs in the claims are intended for better understanding and shall not
limit the scope.
1. A distributed constant type delay line device comprising a first base body (31, 62),
a first delay path pattern (36) provided on a front side (35) of the first base body,
a first ground conductor (38) provided on a rear side (37) of the first base body,
a second base body (32, 63), a second delay path pattern (36a) provided on a front
side (35a) of the second base body, a second ground conductor (38a) provided on a
rear side (37a) of the second base body, a pair of input/output pins (44, 44a) for
supplying and receiving an electrical signal to and from the first and second delay
path patterns, and a pair of ground pins (45, 45a) for connecting the first and second
ground conductors to the ground, characterized in that said first base body (31, 62)
has a first cutout portion (34, 61) at a first bottom corner thereof, said second
base body (32, 63) has a second cutout portion (34a, 61a) at a first bottom corner
thereof corresponding to said first bottom corner of the first base body when viewed
from a front direction of the second base body, said second base body is combined
with said first base body by contacting the second ground conductor (38a) to the first
ground conductor (38) such that said first cutout portion on the first base body exposes
a part of the second ground conductor covering a second bottom corner of the second
base body which is not provided with the second cutout portion and said second cutout
portion exposes a part of the first ground conductor covering a second bottom corner
of the first base body which is not provided with the first cutout portion when the
first and second base bodies are assembled, said pair of input/output pins (44, 44a)
are provided on said first and second base bodies for connection with respective first
ends (40, 40a) of the first and second delay path patterns (36, 36a), the pair of
ground pins (45, 45a) are provided on the respective second bottom corners of said
first and second base bodies for connection with exposed parts of the first and second
ground conductors, and that a jumper member is provided so as to bridge the first
and second base bodies for connecting a second end (39) of the first delay path pattern
to a corresponding end 39a) of the second delay path pattern.
2. A distributed constant type delay line device as claimed in claim 1 characterized
in that said first and second base bodies (31, 32, 62, 63) have a generally rectangular
shape with a size substantially identical to each other.
3. A distributed constant type delay line device as claimed in claim 2 characterized
in that said first and second delay path patterns (36, 36a) are substantially identical
to each other.
4. A distributed constant type delay line device as claimed in claim 1 characterized
in that said first and second ground conductors (38, 38a) cover the rear side (37,
37a) of the first and second base bodies uniformly.
5. A distributed constant type delay line device as claimed in claim 1 characterized
in that said input/output pins (44, 44a) are provided so as to hold both the first
and second base bodies (31, 32).
6. A method of manufacturing a distributed constant type delay line device characterized
by steps of providing a board (50) of dielectric material having a plurality of holes
(51, 61) formed in a row and column formation with a predetermined separation, providing
a uniform conductor layer (50a) on both sides of the board, patterning the conductor
layer on a front side of the board to form a number of delay path patterns (36, 36a,
51a - 51d) such that four delay path patterns (51a - 51d) surround each hole and that
a pair of patterns diagonally opposing about the hole are symmetrical to each other,
cutting the board along a number of longitudinal and transversal lines (57, 58) respectively
extending along the row and column of the holes and passing either through center
of the holes or through midpoints (m₁, m₂) between a pair of adjacent holes to form
a number of rectangular pieces (52 - 55) carrying said delay path patterns (36, 36a)
on the front side and a uniform conductor layer (38, 38a) on a rear side, each of
said rectangular pieces having a cutout portion at a bottom corner thereof in correspondence
to the hole, assembling together a pair of said rectangular pieces which are diagonally
opposing on the board into a unitary body by contacting respective uniform conductor
layers at rear sides each other such that the cutout portion on the bottom corner
of one of the rectangular pieces in the pair exposes a part of the conductor layer
covering a bottom corner of the other rectangular piece in the pair which is not provided
with the cutout portion, connecting an end of the delay path pattern on one of said
pair of rectangular pieces to a corresponding end of the delay path pattern on the
other of said pair of rectangular pieces by a jumper (47), providing a pair of connection
pins (44, 44a) to another ends of the delay path patterns on said pair of rectangular
pieces, and providing a pair of ground pins (45, 45a) in connection with the exposed
part of the conductor layer on the rectangular pieces.
7. A method as claimed in claim 6 characterized in that said step of assembling comprises
soldering of the conductor layers (38, 38a).
8. A method as claimed in claim 6 characterized in that said hole (51) is a true circle.
9. A method as claimed in claim 6 characterized in that said hole (61) is square having
diagonal lines coincident with the longitudinal and transversal lines (57, 58) passing
through the center of the holes.
10. A method as claimed in claim 6 in which said rectangular pieces (52 - 55) are symmetrical
about a longitudinal line (57) and a transversal line (58) passing through the center
of the holes (51, 61).
1. Verzögerungsleitungselement mit verteilter Leitungskonstante aufweisend: einen ersten
Grundkörper (31, 62), eine erste auf einer Vorderseite (35) des ersten Grundkörpers
angeordnete Verzögerungspfadstruktur (36), einen ersten auf einer Rückseite (37) des
ersten Grundkörpers angeordneten Masseleiter, einen zweiten Grundkörper (32, 63),
ein zweite auf einer Vorderseite (35a) des zweiten Grundkörpers angeordnete Verzögerungspfadstruktur
(36a), einen auf einer Rückseite (37a) des zweiten Grundkörpers angeordneten Masseleiter
(38a), ein Paar Eingangs/Ausgangs-Stifte (44, 44a) zum Liefern und Aufnehmen eines
elektrischen Signals an die und von der ersten und zweiten Verzögerungspfadstruktur,
und ein Paar Massestifte (45, 45a) zum Verbinden des ersten und zweiten Masseleiters
mit Masse, dadurch gekennzeichnet, daß der erste Grundkörper (31, 62) einen ersten
Ausschnittbereich (34, 61) an einer ersten unteren Ecke aufweist, der zweite Grundkörper
(32, 63) einen zweiten Ausschnittbereich (34a, 61a) an einer unteren Ecke aufweist,
welcher der ersten unteren Ecke des ersten Grundkörpers bei einer Betrachtung von
einer vorderen Richtung des zweiten Grundkörpers aus entspricht, der zweite Grundkörper
mit dem ersten Grundkörper durch Verbinden des zweiten Masseleiters 38a mit dem ersten
Masseleiter 38 in der Weise verbunden wird, daß der erste Ausschnittbereich auf dem
ersten Grundkörper einen Teil des zweiten Masseleiters freilegt, der eine zweite untere
Ecke des zweiten Grundkörpers überdeckt, welcher nicht mit dem zweiten Ausschnittbereich
versehen ist, und der zweite Ausschnittbereich einen Teil des ersten Masseleiters
freilegt, der eine zweite untere Ecke des ersten Grundkörpers überdeckt, welcher nicht
mit dem ersten Ausschnittbereich versehen ist, wenn der erste und der zweite Grundkörper
zusammengebaut werden, das Paar der Eingangs/Ausgangs-Stifte (44, 44a) an dem ersten
und zweiten Grundkörper für die Verbindung mit entsprechenden ersten Enden (40, 40a)
der ersten und der zweiten Verzögerungspfadstruktur (36, 36a) angeordnet ist, das
Paar der Massestifte (45, 45a) an den entsprechenden zweiten unteren Ecken des ersten
und zweiten Grundkörpers für die Verbindung mit freigelegten Teilen des ersten und
zweiten Masseleiters vorgesehen ist, und daß ein Verbindungsbrückenelement vorgesehen
ist, um eine Brücke zwischen dem ersten und dem zweiten Grundkörper herzustellen,
um ein zweites Ende (39) der ersten Verzögerungspfadstruktur mit einem entsprechenden
Ende (39a) der zweiten Verzögerungspfadstruktur zu verbinden.
2. Verzögerungsleitungselement mit verteilter Leitungskonstante nach Anspruch 1, dadurch
gekennzeichnet, daß der erste und der zweite Grundkörper (31, 32, 62, 63) im allgemeinen
eine rechteckige Form mit einer im wesentlichen zueinander identischen Größe aufweisen.
3. Verzögerungsleitungselement mit verteilter Leitungskonstante nach Anspruch 2, dadurch
gekennzeichnet, daß die erste und die zweite Verzögerungspfadstruktur (36, 36a) im
wesentlichen zueinander identisch sind.
4. Verzögerungsleitungselement mit verteilter Leitungskonstante nach Anspruch 1, dadurch
gekennzeichnet, daß der erste und der zweite Masseleiter (38, 38a) die Rückseite (37,
37a) des ersten und des zweiten Grundkörpers gleichmäßig überdecken.
5. Verzögerungsleitungselement mit verteilter Leitungskonstante nach Anspruch 1, dadurch
gekennzeichnet, daß die Eingangs/Ausgangs-Stifte (44, 44a) so angeordnet sind, daß
sie sowohl den ersten als auch den zweiten Grundkörper (31, 32) halten.
6. Verfahren zur Herstellung eines Verzögerungsleitungselementes mit verteilter Leitungskonstante,
gekennzeichnet durch die Schritte: Erzeugen einer Platte (50) aus dielektrischem Material
mit mehreren Löchern (51, 61), die in einer Reihen- und Spaltenanordnung mit einer
vorbestimmten Trennmöglichkeit angeordnet sind, Erzeugen einer gleichmäßigen Leiterschicht
(50a) auf beiden Seiten der Platte, Strukturieren der Leiterschicht auf einer Vorderseite
der Platte, um eine Anzahl Verzögerungspfadstrukturen (36, 36a, 51a bis 51d) in der
Weise zu erzeugen, daß vier Verzögerungspfadstrukturen (51a bis 51d) jedes Loch umgeben,
und daß ein sich diagonal am Loch gegenüberliegendes Strukturpaar zueinander symmetrisch
ist, Schneiden der Platte entlang einer Anzahl von Längs- und Quergeraden (57, 58),
die sich entlang der Reihen und Spalten der Löcher erstrecken und entweder durch den
Mittelpunkt der Löcher oder durch Mittelpunkte (m₁, m₂) zwischen einem Paar benachbarter
Löcher verlaufen, um eine Anzahl rechteckiger Teile (52 bis 55) zu bilden, welche
die Verzögerungspfadstrukturen (36, 36a) auf der Vorderseite und eine gleichmäßige
Leiterschicht (38, 38a) auf einer Rückseite tragen, wobei jedes rechteckige Teil einen
dem Loch entsprechenden Ausschnittbereich an einer unteren Ecke aufweist, Zusammenfügen
eines Paares der rechteckigen Stücke, welche sich auf der Platte diagonal gegenüberliegen
in einen Einzelkörper, durch Verbinden der entsprechenden gleichmäßigen Leiterschichten
an den Rückseiten miteinander in der Weise, daß der Ausschnittbereich an der unteren
Ecke des einen rechteckigen Stückes des Paares einen Teil der Leiterschicht freilegt,
welche eine untere Ecke des anderen rechteckigen Teils des Paares überdeckt, welches
nicht mit dem Ausschnittbereich versehen ist, Verbinden eines Endes der Verzögerungspfadstruktur
auf dem einen rechteckigen Paarstück mit einem entsprechenden Ende der Verzögerungspfadstruktur
auf dem anderen rechteckigen Paarstück mittels einer Verbindungsbrücke (47), Anbringen
eines Verbindungsstiftepaares (44, 44a) an weiteren Enden der Verzögerungspfadstrukturen
auf dem Paar der rechteckigen Teile, und Anbringen eines Massestiftepaares (45, 45a)
in Kontakt zu dem freigelegten Teil der Leiterschicht auf den rechteckigen Teilen.
7. Verfahren gemäß Anspruch 6, dadurch gekennzeichnet, daß der Schritt des Zusammenfügens,
das Löten der Leiterschichten (38, 38a) beinhaltet.
8. Verfahren gemäß Anspruch 6, dadurch gekennzeichnet, daß das Loch (51) ein echter Kreis
ist.
9. Verfahren gemäß Anspruch 6, dadurch gekennzeichnet, daß das Loch (61) ein Quadrat
mit Diagonalen ist, die mit den Längs- und Quergeraden (57, 58), welche durch den
Mittelpunkt der Löcher verlaufen, zusammenfallen.
10. Verfahren gemäß Anspruch 6, bei dem die rechteckigen Stücke (52 bis 55) symmetrisch
um eine Längsgerade (57) und ein Quergerade (58) angeordnet sind, die durch den Mittelpunkt
der Löcher (51, 61) verlaufen.
1. Dispositif de ligne à retard du type à constantes réparties, comportant un premier
corps de base (31, 62), une première configuration de chemin à retard (36) prévue
sur une face avant (35) du premier corps de base, un premier conducteur de masse (38)
prévu sur une face arrière (37) du premier corps de base, un second corps de base
(32, 63), une seconde configuration de chemin à retard (36a) prévue sur une face avant
(35a) du second corps de base, un second conducteur de masse (38a) prévue sur une
face arrière (37a) du second corps de base, une paire de broches d'entrée/sortie (44,
44a) pour amener et recevoir un signal électrique sur, et depuis, la première et la
seconde configurations de chemin à retard, et une paire de broches de masse (45, 45a)
pour connecter le premier et le second conducteurs de masse à la masse, caractérisé
par le fait que ledit premier corps de base (31, 62) présente une première portion
découpée (34, 61) à son premier angle inférieur, que ledit second corps de base (32,
63) présente une seconde portion découpée (34a, 61a) à son premier angle inférieur
correspondant audit premier angle inférieur du premier corps de base, vu depuis l'avant
du second corps de base, que ledit second corps de base est combiné avec ledit premier
corps de base par mise en contact du second conducteur de masse (38a) avec le premier
conducteur de masse (38) de façon que ladite première portion découpée sur le premier
corps de base expose une partie du second conducteur de masse qui recouvre un second
angle inférieur du second corps de base qui ne présente pas la seconde portion découpée
et que ladite seconde portion découpée expose une partie du premier conducteur de
masse recouvrant un second angle inférieur du premier corps de base qui ne présente
pas la première portion découpée, lorsque le premier et le second corps de base sont
assemblés, que ladite paire de broches d'entrée/sortie (44, 44a) sont placées sur
ledit premier et ledit second corps de base pour connexion avec les premières extrémités
respectives (40, 40a) de la première et de la seconde configurations de chemin à retard
(36, 36a), que la paire de broches de masse (45, 45a) sont placées sur les seconds
angles inférieurs respectifs dudit premier et dudit second corps de base pour connexion
avec les parties exposées du premier et du second conducteurs de masse, et qu'un élément
formant cavalier est prévu de façon à ponter le premier et le second corps de base
pour connecter une seconde extrémité (39) de la première configuration de chemin à
retard à une extrémité correspondante (39a) de la seconde configuration de chemin
à retard.
2. Dispositif à ligne de retard du type à constantes réparties selon la revendication
1, caractérisé par le fait que ledit premier et ledit second corps de base (31, 32,
62, 63) ont une forme générale rectangulaire de dimension substantiellement identique
l'une à l'autre.
3. Dispositif de ligne à retard du type à constantes réparties selon la revendication
2, caractérisé par le fait que ladite première et ladite seconde configurations de
chemin à retard (36, 36a) sont substantiellement identiques l'une à l'autre.
4. Dispositif de ligne à retard du type à constantes réparties selon la revendication
1, caractérisé par le fait que ledit premier et ledit second conducteurs de masse
(38, 38a) recouvrent uniformément la face arrière (37, 37a) du premier et du second
corps de base.
5. Dispositif de ligne à retard du type à constantes réparties selon la revendication
1, caractérisé par le fait que lesdites broches d'entrée/sortie (44, 44a) sont placées
de façon à maintenir à la fois le premier et le second corps de base (31, 32).
6. Procédé de fabrication d'un dispositif de ligne à retard du type à constantes réparties
caractérisé par les étapes consistant à disposer d'un panneau (50) en matériau diélectrique
présentant une pluralité de trous (51, 61) formés selon une formation en rangée et
en colonne avec une séparation prédéterminée, à disposer une couche conductrice uniforme
(50a) sur les deux faces du panneau, à réaliser la configuration de la couche conductrice
sur une face avant du panneau pour former un certain nombre de configurations de chemin
à retard (36, 36a, 51a - 51d) de façon que quatre configurations de chemin à retard
(51a - 51d) entourent chaque trou et qu'une paire de configurations diagonalement
opposées autour du trou soient symétriques l'une par rapport à l'autre, à découper
le panneau le long d'un certain nombre de lignes longitudinales et transversales (57,
58) s'étendant respectivement le long de la rangée et de la colonne de trous et passant
soit par le centre des trous, soit par des points (m₁, m₂) médians entre une paire
de trous adjacents pour former un certain nombre de pièces rectangulaires (52 - 55)
portant lesdites configurations de chemin à retard (36, 36a) sur la face avant et
une couche conductrice uniforme (38, 38a) sur une face arrière, chacune desdites pièces
rectangulaires présentant une portion découpée à l'un de ses angles inférieurs, en
correspondance avec le trou, à assembler ensemble une paire desdites pièces rectangulaires,
qui sont diagonalement opposées sur le panneau, en un corps unitaire en mettant en
contact l'une avec l'autre les couches conductrices uniformes respectives qui sont
sur la face arrière de façon que la portion découpée à l'angle inférieur de l'une
des pièces rectangulaires de la paire laisse exposée une partie de la couche conductrice
recouvrant un angle inférieur de l'autre pièce rectangulaire de la paire qui ne présente
pas de portion découpée, à connecter une extrémité de la configuration de chemin à
retard située sur l'une de ladite paire de pièces rectangulaires à une extrémité correspondante
de l'extrémité de chemin à retard située sur l'autre de ladite paire des pièces rectangulaires,
au moyen d'un cavalier (47), à placer une paire de broches de connexion (44, 44a)
aux autres extrémités des configurations de chemin à retard situées sur ladite paire
de pièces rectangulaires, et à placer une paire de broches de masse (45, 45a) en connexion
avec la partie exposée de la couche conductrice située sur les pièces rectangulaires.
7. Procédé selon la revendication 6, caractérisé par le fait que ladite étape d'assemblage
comporte le soudage des couches conductrices (38, 38a).
8. Procédé selon la revendication 6, caractérisé par le fait que ledit trou (51) est
un cercle vrai.
9. Procédé selon la revendication 6, caractérisé par le fait que ledit trou (61) est
un carré dont les lignes diagonales coincident avec les lignes longitudinale et transversale
(57, 58) passant par le centre des trous.
10. Procédé selon la revendication 6 dans lequel lesdites pièces rectangulaires (52- 55)
sont symétriques par rapport à une droite longitudinale (57) et à une droite transversale
(58) passant par le centre des trous (51, 61).