Regulator with current limiting function, and method

Abstract

 A regulator (300) has an output transistor (310) which transfers an input (391) to an output (305) wherein the output current I_OUT at the output (305) is limited. A driver portion (311) for controlling the output transistor (310) comprises a mirror transistor (380) coupled to the output transistor (310), a resistor (330) which carries a scaled replica (I_CL) of the output current (I_OUT), and a transistor chain (335) which transfers a potential (V_CL) at the resistor (330) to an input node (351) at a control input (394) and which transfers a control signal (V_IN) from the control input (394) to the output transistor (310). The potential (V_CL) at the resistor (330) corresponds to the output current (I_OUT). An increase of the input node potential (V_X) is limited by a clamping transistor (352) at the input node (351). A rise of the output current (I_OUT) is communicated to the input node (351) by the chain (335). Since a further increase of the input node potential (V_X) is prevented by the clamping transistor (352), the driver portion (311) does allow the output transistor (310) to drain current only below or at a predetermined maximum (I_{OUT MAX}).

Description

Field of the Invention

[0001] The present invention generally relates to electronic circuits, and, more particularly, to regulators, and relates to a method for regulating.

Background of the Invention

[0002] A voltage regulator provides a substantially temperature independent output voltage V_OUT to a consuming circuit ( "consumer circuit"). It is often required that the regulator has a current limiting function which substantially reduces or cuts off output current I_OUT when I_OUT reaches a maximum allowable current I_{OUT MAX}. The current limiting function should not interfere with the normal operation of the regulator when (I_OUT ≤ I_{OUT MAX}). The time between reaching I_{OUT MAX} and reducing (and/or cutting off) I_OUT is the response time T_RESP and should be short enough to prevent damages in the current regulator and in the consumer circuit.

[0003] FIG. 1 illustrates a simplified circuit diagram of prior art regulator 100. Regulator 100 supplies power (output voltage V_OUT', output current I_OUT

) to consumer circuit 199 (illustrated dashed). Regulator 100 comprises output transistor 110, feedback resistors 115 and 116, current limiting portion 101 (dashed frame, with transistor 120, resistor 130 and transistor 140), and driver portion 111 (dashed frame, with transistors 150, 160, 170 and 180, current source 155, and resistors 165 and 166). Preferably, transistor 120 in current limiting portion 101 has an effective emitter area which is the 1 / N fraction of the emitter area of output transistor 110.

[0004] The components of regulator 100 are coupled as follows: Output transistor 110 has an emitter coupled to reference line 191 and a collector coupled to output node 105. Output node 105 is coupled to reference line 192 via resistors 115 and 116.

[0005] In driver portion 111, transistor 180 is coupled in a current mirror arrangement to transistor 110. Transistor 180 has an emitter coupled to reference line 191 and a base and a collector coupled together to the base of transistor 110. The collector of transistor 180 is coupled to a collector of transistor 170. An emitter of transistor 170 is coupled to reference line 192. Transistor 160 has a collector coupled to reference line 191 via resistor 165 and has an emitter coupled to reference line 192 via resistor 166. The emitter of transistor 160 is coupled to a base of transistor 170. Current source 155 is coupled between reference line 191 and an emitter of transistor 150. The emitter of transistor 150 is also coupled to the base of transistor 160. A collector of transistor 150 is coupled to reference line 192. Transistor 150 receives control signal V_IN' at a base.

[0006] In current limiting portion 101, transistor 120 has a base coupled to the base of transistor 110, an emitter coupled to reference line 191 and a collector coupled via resistor 130 to reference line 192 (current I_CL'). A base-emitter path of transistor 140 is coupled in parallel to resistor 130 (between the collector of transistor 120 and reference line 191). A collector of transistor 140 is coupled to the base of transistor 160 of driver portion 111.

[0007] Output transistor 110 provides output current I_OUT' on node 105 depending on control signal V_IN

which is propagated by driver portion 111. The feedback signal V_FB

at node 106 between resistors 115 and 116 can be feed back to control signal V_IN'. For simplicity, the feedback circuit is not illustrated.

[0008] In current limiting portion 101, transistor 120 provides auxiliary current I_CL' which is scaled to output current I_OUT' transistor 110 (preferably,

). Resistor 130 (value R_CL') provides voltage V_CL' proportional to auxiliary current I_CL'.

is applied as the base-emitter voltage V_BE' of transistor 140. When current I_OUT' reaches I_{OUT MAX}', I_CL' reaches a maximum value I_{CL MAX}'. Also, voltage V_CL' reaches V_{BE START}' (e.g., 0.6 volts) at which transistor 140 becomes conductive. This keeps the driving capacity of driver portion 111 at a predetermined minimum. With driver portion 111 in such a state, transistor 110 substantially limits output current I_OUT'.

[0009] Current limiting portion 101 of regulator 100 exhibits an unwanted temperature dependency. Base-emitter voltage V_BE' has a negative temperature coefficient (e.g., about -2mV / K) and V_CL' has a positive temperature coefficient. Also, limiting portion 101 acts as a feedback path from output transistor 110 to driver portion 111 so that regulator 100 can oscillate when I_OUT' is near I_{OUT MAX}'. To prevent oscillating, frequency compensation with additional components (e.g., capacitors on extra die area) should be used when necessary. But this is also not wanted. The response time T_RESP' of regulator 100 is often not short enough. It is a further disadvantage of regulator 100 that current I_CL' in current limiting portion 101 contributes to the total power consumption of regulator 100 without contributing to output current I_OUT'. Regulator 100 can be modified as follows.

[0010] FIG. 2 illustrates a simplified circuit diagram of further prior art regulator 200. Regulator 200 comprises output transistor 210, output resistors 215 and 216, current limiting portion 201 (dashed frame, with resistor 230 and transistor 240), and driver portion 211 (dashed frame, with transistors 250, 260 and 270, current source 255, and resistors 265 and 266). The components of regulator 200 are coupled similarly as in regulator 100 of FIG. 1. In FIGS. 1-2, reference numbers 105/205, 106/206, 110/210, 115/215, 116/216, 101/201, 111/211, 130/230, 140/240, 150/250, 155/255, 160/260, 165/265, 166/266, 170/270, 180/280, 191/291, and 192/292 refer to analogous components. However, their function can be different as described in the following.

[0011] Output transistor 210 and transistor 280 form a current mirror. Auxiliary current I_CL'' is substantially equal to the base current of output transistor 110 (or to a scaled base current). Current I_CL'' is therefore related to I_OUT'' by the collector current to base current ratio ("β-value") of transistor 110 (preferably,

). Similar as in regulator 100, resistor 230 (value R_CL'') provides voltage V_CL'' proportional to auxiliary current I_CL''. Voltage V_CL'' (

) is applied as the base-emitter voltage V_BE'' of transistor 140. When current I_OUT'' reaches I_{OUT MAX}'', I_CL'' also reaches I_{CL MAX}'', voltage V_CL'' reaches V_{BE START}''. Transistor 140 keeps driver portion 211 at a predetermined driving capacity and transistor 210 substantially limits output current I_OUT''. Regulator 200 consumes a smaller total current than regulator 100 (see transistor 120). But the other mentioned disadvantages remain the same.

[0012] The present invention seeks to provide regulators with current limiting function which mitigate or avoid these and other disadvantages and limitations of the prior art.

Brief Description of the Drawings

[0013] 

FIG. 1

illustrates a simplified circuit diagram of a prior art regulator;

FIG. 2

illustrates a simplified circuit diagram of a further prior art regulator;

FIG. 3

illustrates a simplified circuit diagram of a regulator according to a first embodiment of the present invention; and

FIG. 4

illustrates a simplified circuit diagram of a regulator according to a second embodiment of the present invention.

Detailed Description of a Preferred Embodiment

[0014] Embodiments of a regulator with current limiting function of the present invention are explained in connection with FIGS. 3-4. For convenience, the figures and the description refer to bipolar transistors. Persons of skill in the art are able, based on the description herein, to implement the present invention with other technologies, such as CMOS or others.

[0015] The term "transistor" is intended to include any device or arrangement having at least two main electrodes (e.g., emitters and collectors) and a control electrode (e.g., a base). The impedance between the main electrodes is controlled by a signal applied to the control electrode. The transistors are classified into npn-transistors and pnp-transistors. This is convenient for the embodiments of the present invention, but not essential. Persons of skill in the art are able, based on the description herein, to use transistor types in other combinations without departing from the scope of the invention.

[0016] Signals are conveniently introduced as voltages (e.g., V_IN, V_REF) or currents (I_B, I_CL) as they appear in the embodiments. Persons of skill in the art are able, based on the description herein, to change voltage signals to current signals or vice versa without departing from the scope of the present invention.

[0017] The present invention has a number of advantages over the prior art, such as: (a) less temperature dependency, (b) shorter response time T_RESP, and (c) higher stability for high output currents (I_OUT ≈ I_{OUT MAX}) due to lower feedback gain.

[0018] FIG. 3 illustrates a simplified circuit diagram of regulator 300 according to a first embodiment of the present invention. Regulator 300 has reference line 391 (e.g., voltage V_CC), reference line 392 (e.g., ground "GND" at around zero volts), control terminal 394 (control signal V_IN), reference terminal 393 (reference signal V_REF), and feedback node 306 (feedback signal V_FB). Regulator 300 comprises output transistor 310, input transistor 350, clamp transistor 352, chain transistors 360 and 370, mirror transistor 380, resistors 315, 316, 330, 365, 366, and current source 355. In the example of FIG. 3, transistors 310, 350, 352 and 380 are pnp-transistors, and transistors 360 and 370 are npn-transistors. As mentioned above, the transistor types are not important. Having chain transistors 360 and 370 of the same type (e.g., npn) is convenient. Transistors 350, 360, 370, and 380, current source 355, and resistors 365 and 366 form driver portion 311 (dashed frame). Transistors 360 and 370 are preferably arranged as emitter followers and form chain 335 ("arrangement", dashed frame). Resistor 330 and clamp transistor 352 in connection with other components in driver portion 311 provide the current limiting function. Unlike as in the prior art examples of FIGS. 1-2, components of driver portion 311 also participate in limiting the output current. Regulator 300 receives input current I_CC at reference line 391. Regulator provides power (output voltage V_OUT, output current I_OUT) at output node 305 to a consumer circuit (not illustrated in FIG. 3, cf. circuit 199 in FIG. 1). For controlling, an optional operational amplifier (not illustrated) can have inputs at feedback node 306 and at reference terminal 393 and an output at control terminal 394.

[0019] The components of regulator 300 are coupled as follows: Output transistor 310 has an emitter coupled to reference line 391 and a collector coupled to output node 305. Resistors 315 and 316 are serially coupled between output node 305 and reference line 392 via feedback node 306 (voltage sensor arrangement). Output transistor 310 and mirror transistor 380 have their bases coupled together to a collector of transistor 380 and have emitters coupled to reference line 391 to form a current mirror. A collector of transistor 380 is coupled to a collector of chain transistor 370. An emitter of transistor 370 is coupled reference line 392 via resistor 330. Transistor 360 has a collector coupled to reference line 391 via resistor 365, and has an emitter coupled to reference line 392 via resistor 366. The emitter of transistor 360 is also coupled to a base of transistor 370. Current source 355 is coupled between reference line 391 and intermediate node 351. Intermediate node 351 is coupled to a base of transistor 360, to an emitter of clamp transistor 352 and to an emitter of input transistor 350. A collector of input transistor 350 is coupled to reference line 392. A base of input transistor 350 is coupled to control terminal 394. A collector of clamp transistor 352 is coupled to reference terminal 392. A base of clamp transistor 352 is coupled to reference terminal 393. In other words, input transistor 350 and clamp transistor 352 have their main electrodes couple in parallel between intermediate node 351 and reference line 392.

[0020] Further current, voltages and resistor magnitudes are conveniently defined as follows: Input current I_CC is the current going into regulator 300 at reference terminal 391. Output current I_OUT is the collector current of output transistor 310 wherein the current through resistors 315 and 316 is neglected. Control current I_B is the base current of output transistor 310 and flow from the base of transistor 310 to reference terminal 392. For bipolar transistors operating such as transistor 310, the base current is substantially proportional to the collector current (β-relation known in the art).

[0021] Preferably, resistor current I_CL through resistor 370 is substantially proportional to current I_B, that is:

wherein "k" is a proportional factor. This is convenient for explanation, but not essential for the present invention. When the emitter current of mirror transistor 380 is neglected, then factor k is about k = 1.

[0022] Preferably, voltage drop V_CL is related to I_CL proportionally, that is:

wherein R_CL is the Ohmic resistance value of resistor 330. Such a linear relation is convenient, but not essential for the present invention. V_BE3 is the base-emitter voltage of chain transistor 370, V_BE2 is the base-emitter voltage of chain transistor 360, and V_BE1 is the base emitter voltage of input transistor 350. Control signal V_IN is defined as the voltage between control terminal 394 and reference line 392 across the base-collector path of input transistor 350, and reference voltage V_REF is defined as the voltage between reference terminal 393 and reference line 392 across the base-collector path of clamp transistor 352. Feedback signal V_FB is the voltage between feedback node 306 and reference line 392 across resistor 316. Current I_Q is the current of current source 355 and is, preferably, a constant current. Node voltage V_X is the voltage between intermediate node 351 and reference terminal 392.

[0023] The current limiting function in regulator 300 is achieved by the operation of regulator 300 as follows: Output transistor 310 receives input voltage V_CC at the emitter and provides output voltage V_OUT at the collector (also current I_CC and I_OUT, respectively). Driver portion 311 controls transistor 310 through the base current I_B. Resistor 330 carries current I_CL (substantially proportional to I_OUT,I_B, explained above) and provides voltage drop V_CL. Chain 335 forwards voltage drop V_CL to node 351. When I_OUT increases, then voltage V_X at node 351 also increases. Optionally, input transistor 350 receives V_IN and controls the base current I_B through chain 335. Transistor 352 clamps the voltage V_X at node 351 to V_XMAX (V_X ≤ V_{X MAX}). This affects also the maximum magnitude of V_CL and therefore limits I_OUT to I_{OUT MAX}.

[0024] Unlike in the prior art, voltage drop V_CL is not applied to base-emitter path of a transistor which could limit capacity of the driver portion. In other words, changes of V_CL act directly on driver portion 311. There is no time required to wait until a base-emitter voltage V_BE reaches V_{BE START} (as in the prior art, see FIGS. 1-2).

[0025] Voltage changes due to temperature variations are partly compensated. Voltage V_CL across resistor 330 has a positive temperature coefficient ("temp co"). The chain voltage V_CL- V_IN from the emitter of transistor 370 to the base of input transistor 350 can be calculated as follows:

Voltage V_CL - V_IN has a temperature coefficient (e.g., negative) which compensates the opposite temp co of V_CL across resistor 330 (e.g., positive). In other words, chain 335 provides a pn-junction voltage (V_CL - V_IN) with a negative temp co which compensates the positive temp co of voltage drop V_CL. Persons of skill in the art are able, based on the description herein, to replace transistors 360 and 370 by other semiconductor devices whose pn-junctions provide similar voltages.

[0026] Preferably, reference voltage V_REF is substantially independent from the temperature. This is convenient, but not necessary. It is possible to apply a V_REF which substantially does depend on the temperature. In such a case, the temperature dependency of the current limiting portion can be arbitrarily adjusted as required by, for example, the consumer circuit. In regulator 300 of the present invention, the response time T_RESP is shorter than in prior art solutions. This is an important advantage of the present invention. As mentioned above, regulator 300 has a better stability due to lower feedback gain and higher stability for high output currents (I_OUT ≈ I_{OUT MAX}).

[0027] FIG. 4 illustrates a simplified circuit diagram of regulator 400 according to a second embodiment of the present invention. In FIGS. 3-4, reference numbers 300/400, 305/405, 306/406, 310/410, 315/415, 316/416, 330/430, 352/452, 350/450, 335/435, 370/470, 391/491, 392/492, 393/493 and 394/494 refer to analogous components. However, their function can be different as described in the following. The analogous components are: output transistor 410 (e.g., pnp-type), input transistor 450 (e.g., npn-type), clamp transistor 452 (e.g., npn-type), chain transistor 470 (forming chain 435, e.g., pnp-type, dashed), resistors 415, 416 and 430, and current source 455. Regulator 400 further comprises resistor 431.

[0028] The components are coupled as follows: Output transistor 410 has an emitter coupled to reference line 491 and a collector coupled to output node 405. A base of transistor 410 is coupled to reference line 491 via resistor 431 and is coupled to an emitter of transistor 470 via resistor 430. Output node 405 is coupled to reference line 492 via resistor 415, feedback node 406, and resistor 416 (voltage sensor). Chain transistor 470 has a collector coupled to reference line 492 and a base coupled to intermediate node 451 (base-emitter voltage V_BE3). Input transistor 450 has a collector coupled to reference line 491, an emitter coupled to intermediate node 451, and a base coupled to input terminal 494. Clamp transistor 452 has a collector coupled to reference line 491, an emitter coupled to intermediate node 451, and a base coupled to reference terminal 493. Current source is coupled between intermediate node 451 and reference line 492.

[0029] Resistor current I_CL through resistor 430 is, preferably, proportionally related to the control current I_B (base current) of output transistor 410. Voltage V_X is referred to reference line 491 (different from FIG. 3).

[0030] Having described details in connection with FIGS. 3-4, the present invention can also be described as regulator 300/400 with a current limiting function which comprises: (a) output transistor 310/410 having an emitter to receive input voltage V_CC (on line 391/491), a collector to provide output current I_OUT, and a base to receive control current I_B (base current); (b) resistor 330/430 which carries resistor current I_CL proportional to control current I_B at the base of transistor 310/410 and which provides voltage drop V_CL; (c) chain 335/435 to forward voltage drop V_CL to intermediate node 351/451, such that an increase of I_OUT leads to an increase of node voltage V_X between intermediate node 351/451 and reference line 392/491; (d) input transistor 350/450 having an emitter coupled to intermediate node 351/451, a collector coupled reference line 392/491, and a base to receive control signal V_IN, input transistor 350/450 controlling output transistor 310/410 (e.g., via transistors 360, 370, 380 in FIG. 3, or via transistor 470 in FIG. 4); (e) clamp transistor 352/452 having an emitter coupled to intermediate node 351/451, a collector coupled to reference line 392/491, and a base to receive reference signal V_REF, such that node voltage V_X is limited ("clamped") when output current I_OUT increases to predetermined magnitude I_{OUT MAX}, and that input transistor 350/450 prevents I_OUT from increasing beyond I_{OUT MAX}.

[0031] Further, using the reference to FIG. 3 only for convenience of explanation, and with no intention to limit the scope, the present invention can be described as circuit 300 having output transistor 310 to transfer an input 391 to an output 305 wherein output current I_OUT is limited. Circuit 300 is characterized by features (a) and (b):

(a) Driver portion 311 for controlling output transistor 310 has (i) mirror transistor 380 coupled to output transistor 310; (ii) resistor 330 coupled to mirror transistor 380 to carry a scaled replica (e.g., I_CL) of output current I_OUT, the potential V_CL at resistor 330 corresponding to output current I_OUT; (iii) transistor chain 335 to transfer the potential V_CL at resistor 330 to input node 351 and to transfer an external control signal (e.g., V_IN from terminal 394) to output transistor 310; and (iv) clamping transistor 352 to limit an increase of the potential V_X at input node 351.

(b) A rise of output current I_OUT is communicated to input node 351 by transistor chain 335 so that clamping transistor 352 prevents driver portion 311 from allowing output transistor 310 to drain output current I_OUT above a predetermined maximum.

[0032] Further, a method of the present invention can be described as follows. Regulator 300/400 has output transistor 310/410 that receives a first current (e.g., I_CC) at a first main electrode (e.g., emitter) and a second current (e.g., I_B) at a control electrode (e.g., base). Output transistor 310/410 provides a third current (e.g., output current I_OUT) at a second main electrode (e.g., collector). The third current is limited to predetermined maximum current (e.g., I_{OUT MAX}) by the following steps:

(a) propagating a replica (e.g., emitter-collector voltage of transistor 352/452) of a reference voltage (e.g., V_REF) to a node (e.g., node 351/451) to limit a magnitude of a voltage at the node (e.g., V_X limited to V_{X MAX});

(b) providing a voltage drop (e.g., V_CL) across a resistor (e.g., resistor 330/430) which carries a resistor current (I_CL) substantially proportional to the second and third currents (cf. equation (1) and β-relation); and

(c) keeping the voltage drop in parallel to the magnitude of the voltage (V_X) at the node, so that a magnitude of the voltage drop (V_CL) is limited in reference to the maximum magnitude of the voltage at the node (e.g., V_{X MAX} and V_BE2, V_BE3), thereby limiting a magnitude of the second current and limiting a magnitude of the third current to the predetermined maximum current.

[0033] Further, the method of the present invention for limiting output current I_OUT to a maximum predetermined output current I_{OUT MAX} can described by the following steps:

(i) relating a magnitude of control signal V_IN to a magnitude of control current I_B (base current of output transistor 310/410) via intermediate signal V_X at intermediate node 351/451;

(ii) receiving reference voltage V_REF and propagating reference voltage V_REF to intermediate node 351/451, V_REF limiting a magnitude of V_X at node 351/451 to maximum intermediate magnitude V_{X MAX};

(iii) providing voltage drop V_CL across resistor 330/430 which carries resistor current I_CL depending on control current I_B (e.g., see current mirror 380/310 in FIG. 3 or resistor arrangement 430/431 in FIG. 4) and thereby represents I_OUT; and

(iv) keeping in parallel V_CL to the magnitude of V_X, so that a magnitude of V_CL is limited in reference to V_{X MAX}, thereby limiting the magnitude of I_B and limiting I_OUT to I_{OUT MAX}.

[0034] While the invention has been described in terms of particular structures, devices and methods, those of skill in the art will understand based on the description herein that it is not limited merely to such examples and that the full scope of the invention is properly determined by the claims that follow.

Claims

1. A regulator (300) with a current limiting function, characterized by:

a first transistor (310) having a first main electrode to receive an input voltage, a second main electrode to provide an output current, and a control electrode to receive a control current for controlling an impedance between said first and second main electrodes;

an arrangement (335) for forwarding a voltage drop which corresponds to said control current to an intermediate node (351), such that an increase of said output current leads to an increase of a node voltage between said intermediate node (351) and a reference line (392);

a second transistor (350) having a first main electrode coupled to said intermediate node (351), a second main electrode coupled to said reference line (391), and a control electrode to receive a control signal (394), said second transistor controlling said first transistor (310);

a third transistor (352) having a first main electrode coupled to said intermediate node (351), a second main electrode coupled to said reference line (392), and a control electrode to receive a reference signal (393), such that said node voltage is limited when said output current increases to a predetermined magnitude, and that said second transistor (350) prevents said output current from increasing beyond said predetermined magnitude.

2. The regulator (300) of claim 1 further comprising a resistor (330) for carrying a resistor current proportional to said control current on said control electrode of said first transistor (310) and to provide said voltage drop.

3. The regulator (300) of claim 1 wherein said arrangement (335) comprises further transistors (360, 370) in an emitter follower arrangement.

4. The regulator (300) of claim 1 wherein said arrangement (335) provides a chain voltage having a first temperature coefficient so that a second, opposite temperature coefficient of said voltage drop is substantially compensated.

5. The regulator (300) of claim 1 wherein said arrangement (335) provides a pn-junction voltage with a negative temperature coefficient compensating a positive temperature coefficient of said voltage drop.

6. A method for limiting the output current of a regulator (300) to a predetermined maximum current, wherein the regulator (300) has an output transistor (310) receiving a first current at a first main electrode and a second current at a control electrode and providing said output current at a second main electrode, said method characterized by the following steps:

propagating a replica of a reference voltage to a node (351) to limit a magnitude of a voltage at said node;

providing a voltage drop across a resistor (330) which carries a resistor current substantially proportional to said second current and to said output current; and

keeping said voltage drop in parallel to said magnitude of the voltage at said node (351), so that a magnitude of said voltage drop is limited in reference to the maximum magnitude of the voltage at said node (351), thereby limiting a magnitude of said second current and limiting a magnitude of said output current to said predetermined maximum current.

7. A method for limiting the output current I_OUT of a regulator (300) to a maximum predetermined output current I_{OUT MAX}, said regulator (300) having an output transistor (310) receiving an input current I_CC at a first main electrode, receiving a control current I_B at a control electrode, and providing the output current I_OUT at a second main electrode, said method characterized by the following steps:

relating a magnitude of a control signal V_IN to a magnitude of said control current I_B via an intermediate signal V_X at an intermediate node (351);

receiving a reference voltage V_REF and propagating said reference voltage to said intermediate node (351), said reference voltage V_REF limiting a magnitude of V_X at said intermediate node (351) to maximum intermediate magnitude V_{X MAX};

providing a voltage drop V_CL across a resistor (330) which carries a resistor current I_CL which depends on said control current I_B and thereby represents I_OUT; and

keeping in parallel V_CL to the magnitude of V_X, so that a magnitude of V_CL is limited in reference to V_{X MAX}, thereby limiting a magnitude of I_B and limiting I_OUT to I_{OUT MAX}.

8. The method of claim 7 wherein in said step relating, V_IN is substantially related to I_B proportionally.

9. The method of claim 7 wherein in said step providing, said related resistor current is substantially proportional to control current I_B.

10. A circuit (300) having an output transistor (310) to transfer an input to an output wherein an output current is limited, the circuit (300) characterized in that

(a) a driver portion (311) for controlling the output transistor (310) has

(i) a mirror transistor ((380) coupled to the output transistor (310);

(ii) a resistor (330) coupled to the mirror transistor (380) to carry a scaled replica of the output current, the potential at the resistor (330) corresponding to the output current;

(iii) a transistor chain (335) to transfer the potential at the resistor (330) to an input node (351) and to transfer an external control signal to the output transistor (310); and

(iv) a clamping transistor (352) to limit an increase of the potential at the input node (351), and

(b) a rise of the output current is communicated to the input node (351) by the transistor chain (335) so that the clamping transistor (352) prevents the driver portion (311) from allowing the output transistor (310) to drain output current above a predetermined maximum.

Drawing