BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
[0001] The invention is in the field of iontophoresis. In particular, the invention relates
to irrevocably shutting down an electronic controller of an iontophoretic delivery
device when certain error conditions are detected, thereby preventing unintentional
delivery of drugs.
DESCRIPTION OF RELATED ART
[0002] Iontophoresis is the application of an electrical current to transport ions through
intact skin. One particularly advantageous application of iontophoresis is the non-invasive
transdermal delivery of ionized drugs or other therapeutic agents into a patient.
This is done by applying low levels of current to a patch placed on the patient's
skin, which forces the ionized drugs contained in the patch through the patient's
skin and into his or her bloodstream.
[0003] Passive transdermal patches, such as those used to deliver nitroglycerin for angina
pectoris, estradiol for hormone replacement, and nicotine to stop smoking, can only
use a limited number of drugs because they work by diffusion. Iontophoresis advantageously
expands the range of drugs available for transdermal delivery, including, for example,
parenteral drugs (e.g., peptides). Further, because the amount of drug delivered is
related to the amount of current applied, the drug delivery rate can be precisely
controlled by controlling the current, unlike the passive transdermal patches. This
allows for more rapid delivery (onset) and drug reduction (offset) in the patient.
[0004] When compared to drug delivery by needle injection, iontophoresis can have less physical
and emotional trauma, pain, and possibility of infection. Transdermal drug delivery
by iontophoresis also avoids the risks and inconvenience of IV (intravenous) delivery.
In addition, when compared to oral ingestion of drugs, drug delivery by iontophoresis
bypasses the GI tract, thus reducing side-effects such as drug loss, indigestion and
stomach distress, and eliminating the need for swallowing the drug. Iontophoresis
also avoids drug loss due to hepatic first pass metabolism by the liver that occurs
when drugs are ingested.
[0005] Further, transdermal drug delivery by iontophoresis permits continuous delivery of
drugs with a short half life and easy termination of drug delivery. Because iontophoresis
is more convenient, there is a greater likelihood of patient compliance in taking
the drug. Thus, for all of the above reasons, iontophoresis offers an alternative
and effective method of drug delivery, and an especially useful method for children,
the bedridden and the elderly.
[0006] An iontophoretic drug delivery system typically includes a current source, such as
a battery and current controller, and a patch. The patch includes an active reservoir
and a return reservoir. The active reservoir contains the ionized drug, in, for example,
a conductive gel. The return reservoir contains a saline gel and collects ions emanating
from the patient's skin when the drug is being delivered into the patient's skin.
[0007] The patch also has two electrodes, each arranged inside the active and return reservoirs
to be in respective contact with the drug and saline. The anode, or positive, electrode
and the cathode, or negative, electrode are respectively electrically connected to
the anode and cathode of the current source by electrical conductors. Either the anode
electrode or the cathode electrode is placed within the drug reservoir, depending
on the charge of the ionized drug. This electrode is designated as the active electrode.
The other electrode is placed within the return reservoir, and is designated as the
return electrode.
[0008] The active electrode has the same charge as the ionized drug to be delivered and
the return electrode has a charge opposite of the drug to be delivered. For example,
if the drug to be delivered to the patient has a positive ionic charge, then the anode
will be the active electrode and the cathode will be the return electrode. Alternatively,
if the drug to be delivered has a negative ionic charge, then the active electrode
will be the cathode and the return electrode will be the anode. When current from
the current source is supplied to the active electrode, the drug ions migrate from
the drug gel in the reservoir toward and through the skin of a patient. At the same
time, oppositely-charged ions flow from the patient's skin into the saline solution
of the return reservoir. Charge is transferred into the return electrode and back
to the current source, completing the iontophoretic circuit.
[0009] The electronic controller between the battery and the electrodes delivers the required
current to the patch. The controller may control the output current so that drug delivery
is accomplished at a constant or varying rate, or over a short, long or periodic time
interval. These controllers generally require relatively complex electrical circuits,
sometimes including microprocessors, to meet the above requirements.
[0010] While the circuits used for iontophoretis are very reliable, error conditions, including
malfunctions in the electronic controller, can nevertheless occur. If these error
conditions are not corrected, an incorrect drug dosage could be delivered to a patient.
[0011] A delivery device having improved safety and reduced abuse potential is disclosed
in WO-A-96/09850.
[0012] Accordingly, a desirable safety feature for an iontophoretic system is to irrevocably
shut down the electronic controller when certain error conditions are detected. These
error conditions include misuse of the iontophoretic system (which could be either
intentional or by accident), as well as failures in the controller circuitry or, if
applicable, controller software.
[0013] A copending application WO-A-97/11743 discloses a circuit for stopping current flow
to the patient when a low battery condition makes the operation of the controller
unpredictable.
SUMMARY OF THE INVENTION
[0014] It is an object of the invention to provide a controller which irrevocably shuts
off the iontophoretic current when misuse of the iontophoretic system is detected
or system errors occur.
[0015] In one aspect of the invention, a controller for an iontophoretic drug delivery apparatus
is provided. The controller is defined in claim 1. This controller includes a current
generating circuit, error detection circuitry, and a control circuit capable of controlling
the current generating circuit. The control circuit disables itself when the error
detection circuitry detects an error condition. The approach to disabling the control
circuit is by stopping the control circuit's clock signal.
[0016] In another aspect of the invention, a method of shutting down an iontophoretic drug
delivery system is provided. The method is defined in claim 14. This method includes
the steps of controlling an iontophoretic current using a control circuit capable
of being disabled, detecting an error condition, and disabling the control circuit
after the error condition is detected.
BRIEF DESCRIPTION OF THE DRAWINGS
[0017] These and other objects, features and advantages of the present invention can best
be understood by reference to the detailed description of the preferred embodiments
set forth below taken with the drawings, in which:
FIG. 1 is a perspective view of an iontophoretic drug delivery device.
FIG. 2 is a high-level block diagram of an iontophoretic drug delivery device.
FIG. 3 is a block diagram of a iontophoretic controller circuit.
FIG. 4 is a block diagram of an automatic shut-off feature for an iontophoretic controller
circuit, in accordance with a first embodiment of the present invention.
FIGS. 5a-5f depict waveforms of the various circuit states of the first embodiment.
FIG. 6 is a block diagram of an automatic shut-off feature for an iontophoretic controller
circuit, in accordance with a second embodiment of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0018] One type of iontophoretic drug delivery device includes a separate, reusable controller
2, which can be removably and electrically connected to a patch 4 containing the drug,
therapeutic agent or medicament, as shown in FIG. 1. The patch 4 is attached to the
skin of the patient 6. The patch includes an active electrode 8 and a return electrode
10, with the ionic drug 12 and active electrode 8 positioned within the active reservoir
14, and the saline or electrolyte 16 and return electrode 10 positioned within the
return reservoir 20.
[0019] The iontophoretic drug delivery device also includes a controller 2 having a power
supply 22 and electronic control circuitry 24, as shown in FIG. 2. The controller
is electrically coupled to the patch 4 using electronic interconnectors 26, such as
a printed flexible circuit, metal foils, wires, tabs or electrically conductive adhesives.
The power supply 22 in combination with the electrodes 8 and 10 and the patient's
body 6 completes the circuit and generates an electric field across the body surface
or skin on which the iontophoretic device is applied. The electric field causes the
drug in the active reservoir 14 to be delivered into the body of the patient by iontophoresis.
[0020] Patch 4 is generally a planar flexible member formed of, for example, a biocompatible
material such as woven or non-woven textiles or polymers, or any other construction
well-known in the art. The patch is attached to the patient's skin using adhesives
or a strap or both. The patch includes an enlarged patch body 30, which includes the
active and return reservoirs.
[0021] The lower surface of the reservoirs are placed in contact with the skin. The electrodes
are positioned so that an electrical current path is established between the electrodes
8 and 10 through the reservoirs and the patient's skin 6. Electrodes 8 and 10 are
placed in conductive contact with the reservoirs 12 and 16, respectively. A direct
current source may be connected to the electrodes 8 and 10 so that the active electrode
has the same charge polarity as the ionic drug 12. When current is passed through
the active electrode 8 to the return electrode 10 through the skin 6, the ionic drug
12 contained in the active reservoir 14 is delivered through the skin 6 and into the
patient.
[0022] The controller 2 may include, but is not limited to, battery 22, microprocessor 40,
and current control circuit 42, as shown in Figure 3. The microprocessor 40 provides
signals to the current control circuit 42 to ensure that the required current is delivered
by the current control circuit 42 to the connected patch through conductors 27 and
26 to electrodes 8 and 10 (shown in FIG. 2) so that the correct amount of drug is
delivered to the patient. The current control circuit 42 will produce from the battery
22 the required output current irrespective of the varying resistance and/or capacitance
of the load (including the patient's skin, the impedance of which normally varies
from patient to patient and which may change as iontophoresis takes place).
[0023] Further, voltage from a sensor, such as a current sense resistor 48, is monitored
by the current control circuit 42 to ensure that the amount of delivered current is
constant. The current passing through the current sense resistor 48 is the amount
of current actually being delivered through the iontophoretic patch and skin. If less
or more than the required current is being delivered, as indicated by the current
sense resistor 48, the current control circuit 42 will adjust the current to the required
level.
[0024] In order to increase the safety of the iontophoretic drug delivery system, it is
advantageous to irrevocably shut down and disable the iontophoretic controller when
certain error conditions occur, thereby stopping the delivery of the drug.
[0025] Examples of conditions which may be used to trigger this irrevocable shut down might
include, for example, the patch being removed from the controller. This would ensure
that a particular controller can be used only once. Another condition could be when
an incorrect or expired patch is plugged in to the controller. Other conditions include
self-test failures such as low battery voltage, reference voltage failure, clock failure,
current generating circuit overvoltage, current generating circuit overcurrent, and
current generating circuit time-current product exceeded.
[0026] FIG. 4 is a block diagram representation of a first embodiment of the present invention
that implements an automatic, irrevocable shutdown function in an iontophoretic controller.
The waveforms shown in FIGS. 5a-5f depict the operation of the circuit of FIG. 4.
Accordingly, the first embodiment will be described by referring to FIG. 4 and FIGS.
5a-5f together.
[0027] The circuit includes a microprocessor 40 which executes program instructions stored
in a memory (not shown). The microprocessor, however, can only execute the program
instructions when a clock signal is applied to the microprocessor's clock input. Storage
element 51 is used to store a bit of data. This storage element may be a flip-flop,
register, latch, RAM, EEPROM, or the like. When the power is turned on for the first
time, a power-on reset circuit 52 generates a power-on reset pulse (FIG. 5b) which
resets the storage element 51 by storing a ZERO in it, thereby driving the output
Q (FIG. 5e) of the data storage element 51 low.
[0028] After the power is turned on, and during ordinary operation of the system, the output
Q (FIG. 5e) of the storage element 51 is low. As a result, OR gate 54 will pass the
clock signal (FIG. 5a) that is present at the upper input of the OR gate 54 to the
microprocessor clock input (FIG. 5f), thereby enabling the microprocessor 40 to execute
program instructions.
[0029] The microprocessor also has a write strobe output (FIG. 5d). The circuitry required
to generate this write strobe output may be included in the microprocessor itself,
as depicted in FIG. 4. Alternatively, it may be implemented in control logic that
is external to the microprocessor 40. Generation of write strobes is well known in
the art of microprocessor based electronic circuit design. When the microprocessor
40 generates a write strobe, the data present at the D input of the storage element
51 is stored, and the stored data also appears at the output of the storage element
51.
[0030] Error detection circuit 55 has a number of outputs, each corresponding to a particular
error condition. In this embodiment, when any of the error conditions is present,
the corresponding output of the error detection circuit is high. When a given error
is not present, the corresponding output is low. Although not shown in this figure,
the microprocessor may be able to read the status of the error detection circuit outputs.
[0031] OR gate 53 combines the outputs of the error detection circuit 55 into a composite
error signal (FIG. 5c). Because of the logical OR function performed in the OR gate,
the output of the OR gate will be high when any one of the error conditions is detected
by the error detection circuit 55. The composite error signal (FIG. 5c) at the output
of OR gate 53 will only be low when no error conditions are detected by the error
detection circuit 55.
[0032] If the microprocessor generates a write strobe (FIG. 5d) when the composite error
signal (FIG. 5c) at the output of OR gate 53 is low, the output Q (FIG. 5e) of the
data storage element 51 remains low. As a result, OR gate 54 will continue to pass
the clock signal (FIG. 5a) that is present at the upper input of the OR gate 54 to
the microprocessor clock input (FIG. 5f), and the microprocessor will continue to
execute its program.
[0033] If, however, the microprocessor generates a write strobe (FIG. 5d) when the composite
error signal (FIG. 5c) is high, the write strobe causes a ONE to be written into the
storage element. When a ONE is written into the storage element, the output of the
OR gate 54 that is applied to the microprocessor clock input (FIG. 5f) goes high,
and it will remain high no matter what happens to the clock signal (FIG. 5a) at the
upper input of OR gate 54. This stops the clock signal (FIG. 5f) at the microprocessor
clock input. When the clock signal (FIG. 5f) to the microprocessor 40 is stopped,
the microprocessor 40 cannot execute any more instructions, as explained above. Thus,
by generating a write strobe (FIG. 5d) when an error condition exists, the microprocessor
40 prevents itself from executing further instructions.
[0034] When the output Q (FIG. 5e) of the data storage element 51 is high, the current control
circuit 42 should be disabled so that it does not generate current. This can be accomplished
by a logic-level disable input, as shown in FIG. 4. Alternatively, a signal downstream
from the output Q (FIG. 5e) of the storage element 51, such as the output of the OR
gate 54 (FIG. 5f), may be used to disable the current control circuit 42. As yet another
alterative, a second data storage element output (not shown) may be used to disable
the current source, provided that the appropriate disabling data is written to the
second data storage element before the microprocessor 40 shuts itself off.
[0035] Because the microprocessor 40 cannot execute instructions when the clock signal is
stopped, the microprocessor 40 cannot generate an additional write strobe, or initiate
any other action, to clear the storage element. Accordingly, this stopped condition
is permanent, unless the system is restarted as explained below. It should be noted
that, because the microprocessor 40 cannot execute any instructions after shutting
itself off, the microprocessor 40 should preferably be programmed to put the controller
into a safe state before shutting itself off.
[0036] In this embodiment, the only way to restart the system is to remove power from the
system completely (for example, by removing the batteries). Then, when power is ultimately
reapplied, the power-on reset circuit 52 will return the storage element 51 to its
initial ZERO state, as described above, and the clock signal (FIG. 5a) will be able
to pass through the OR gate 54 and reach the clock input (FIG. 5f) of the microprocessor
40.
[0037] Of course, many alternative embodiments to the circuit described above can be readily
envisioned. For example, in the embodiment depicted in FIG. 6, the output bits from
the error detection circuit 55 are read into the microprocessor 40, and those bits
are ORed together by the microprocessor into a single bit. This single bit is then
written, by the microprocessor, into the storage element 51 via the data bus which
is connected to the D input of the storage element 51. Alternatively, the output of
the data storage element 51 may be set by a dedicated strobe connected to a set input
of the storage element 51. As yet another alternative, the microprocessor based design
may be replaced by a different type of control circuit, such as a logic-based state
machine (not shown).
[0038] If desired, a circuit that can never be restarted, even when power is removed, can
be implemented by using, for example, a fuse programmable device like a PROM (programmable
ROM), a PAL (programmable array logic), or the like. These devices are programmed
by blowing a physical fuse that can never be restored. Of course, when these devices
are used, the necessary programming circuitry must also be included.
[0039] A battery draining circuit, such as the field effect transistor (FET) 56 shown in
FIG. 6 or a silicon controlled rectifier (SCR) or a bipolar transistor (not shown),
may optionally be included to drain the battery when the microprocessor 40 is shut
down. This can provide an extra measure of safety by disabling the controller in an
additional way.
[0040] Of course, it will be appreciated that the invention may take forms other than those
specifically described, and the scope of the invention is to be determined solely
by the following claims.
1. A controller (2) for an iontophoretic drug delivery apparatus, comprising:
a current generating circuit;
error detection circuitry (55) for detecting at least one error condition within the
apparatus; and
a control circuit (42) capable of controlling said current generating circuit, said
control circuit being capable of disabling itself when said error detection circuitry
detects the at least one error condition; characterized in that said current control circuit (42) has a clock input, said control circuit being capable
of operating only when a clock signal is applied to the clock input, said control
circuit being further capable of stopping the clock signal when said error detection
circuitry detects the at least one error condition, wherein said current generating
circuit is irrevocably shut off when the clock signal is stopped, and the controller
additionally comprises
power-on reset circuitry (52) to ensure that the clock signal is on and the control
circuit is not disabled when power is initially applied.
2. A controller (2) according to claim 1, wherein the control circuit comprises a microprocessor
(40).
3. A controller (2) according to claim 1, further comprising a battery draining circuit
that is activated when the control circuit (42) is disabled.
4. A controller (2) according to claim 1, wherein the error detection circuitry (55)
detects at least one of the conditions of low battery voltage, reference voltage failure,
clock failure, current generating circuit overvoltage, current generating circuit
overcurrent. excess time-current product, expired patch installed, and incorrect patch
installed.
5. A controller (2) according to claim 1, wherein an iontophoretic patch, (4) is electrically
connected to said current generating circuit, said patch for delivering drugs to the
patient when said current generating circuit is in an operational state.
6. A controller (2) according to claim 3, wherein the battery draining circuit comprises
at least one of an SCR, a bipolar transistor, and an FET.
7. A controller (2) for an iontophoretic drug delivery apparatus, comprising:
a current generating circuit;
a control circuit; and
error detection circuitry (55) for detecting at least one error condition within the
system; characterized by:
a data storage device (51) having an output, wherein the output is in a first state
when certain data is stored in said data storage device, and is not in the first state
when the certain data is not stored in said data storage device;
said control circuit (42) capable of controlling said current generating circuit and
capable of causing the certain data to be stored into said data storage device, said
control circuit having a clock input, said control circuit being capable of operating
only when a clock signal is applied to the clock input:
a logic circuit having an output connected to the clock input of the control circuit,
a control input connected to the output of the data storage device, and a clock input
adapted to receive a first clock signal, wherein a second clock signal is produced
at the logic circuit output only when the data storage device output is not in the
first state;
error detection circuitry (55) for detecting at least one error condition within the
system; and
power-on reset circuitry (52) to ensure that the certain data is not stored in said
data storage device when power is initially applied,
wherein said control circuit causes the certain data to be stored in said data storage
device when said error detection circuitry detects the at least one error condition,
and
wherein said current generating circuit is shut off when the certain data is stored
in said data storage device.
8. A controller (2) according to claim 7, wherein said control circuit comprises a microprocessor
(40).
9. A controller (2) according to claim 7, further comprising a battery draining circuit
that is activated when the certain data is stored in said data storage device (51
).
10. A controller (2) according to claim 9, wherein the battery draining circuit comprises
at least one of an SCR, a bipolar transistor, and an FET.
11. A controller (2) according to claim 7, wherein the error detection circuitry (55)
detects at least one of the conditions of low battery voltage, reference voltage failure,
clock failure, current generating circuit overvoltage, current generating circuit
overcurrent, excess time-current product, expired patch installed, and incorrect patch
installed.
12. A controller (2) according to claim 7, wherein the data storage device (51) comprises
one of a group consisting of a register, latch, RAM, PROM, EPROM, EEPROM, and fuse
programmable device.
13. A controller (2) according to claim 7, wherein an iontophoretic patch (4) is electrically
connected to said current generating circuit, said patch for delivering drugs to the
patient when said current generating circuit is in an operational state.
14. A method of shutting down an iontophoretic drug delivery system, comprising the steps
of:
controlling an iontophoretic current using a control circuit (42) capable of being
disabled wherein the control circuit (42) includes a clock input, the control circuit
being capable of operating only when a clock signal is applied to the clock input;
resetting the control circuit when the control circuit is turned on and Starting the
clock signal when power is initially apllied;
detecting at least one error condition within the system;
disabling the control circuit by stopping the clock signal after the at least one
error condition is detected in said detecting step; and irrevocably stopping the iontophoretic
current when the clock signal is stopped.
1. Controller (2) für eine iontophoretische Medikamentenzuführungsvorrichtung mit:
einer Stromerzeugungsschaltung;
einer Fehlererfassungsschaltungsanordnung (55) zum Erfassen mindestens eines Fehlerzustands
innerhalb der Vorrichtung; und
einer Steuerschaltung (42), die fähig ist, die Stromerzeugungsschaltung zu steuern,
wobei die Steuerschaltung fähig ist, sich selbst zu abzuschalten, wenn die Fehlererfassungsschaltungsanordnung
den mindestens einen Fehlerzustand erfasst; dadurch gekennzeichnet, dass die Stromsteuerschaltung (42) einen Takteingang aufweist, wobei die Steuerschaltung
nur fähig ist zu arbeiten, wenn ein Taktsignal an den Takteingang angelegt wird, wobei
die Steuerschaltung ferner fähig ist, das Taktsignal anzuhalten, wenn die Fehlererfassungsschaltungsanordnung
den mindestens einen Fehlerzustand erfasst, wobei die Stromerzeugungsschaltung unwiderruflich
gesperrt wird, wenn das Taktsignal angehalten wird, und der Controller zusätzlich
eine Einschalt-Rücksetzschaltungsanordnung (52) umfasst, um sicherzustellen, dass
das Taktsignal an ist und die Steuerschaltung nicht abgeschaltet wird, wenn Leistung
anfänglich zugeführt wird.
2. Controller (2) gemäß Anspruch 1, bei dem die Steuerschaltung einen Mikroprozessor
(40) umfasst.
3. Controller (2) gemäß Anspruch 1, ferner mit einer Batteriedrainschaltung, die aktiviert
wird, wenn die Steuerschaltung (42) abgeschaltet wird.
4. Controller (2) gemäß Anspruch 1, bei dem die Fehlererfassungsschaltungsanordnung (55)
mindestens einen der Zustände einer niedrigen Batteriespannung, eines Bezugsspannungsausfalls,
eines Taktausfalls, einer Stromerzeugungsschaltungsüberspannung, Stromerzeugungsschaltungsüberstrom,
eines übermäßigen Zeit-Strom-Produkts, eines installierten abgelaufenen Patches und
eines installierten inkorrekten Patches umfasst.
5. Controller (2) gemäß Anspruch 1, bei dem ein iontophoretischer Patch (4) elektrisch
mit der Stromerzeugungsschaltung verbunden ist, wobei der Patch zum Zuführen von Medikamenten
an den Patienten ist, wenn die Stromerzeugungsschaltung in einem Betriebszustand ist.
6. Controller (2) gemäß Anspruch 3, bei dem die Batteriedrainschaltung mindestens einen
Thyristor (SCR), einen bipolaren Transistor oder/oder einen Feldeffekttransistor (FET)
umfasst.
7. Controller (2) für eine iontophoretische Medikamentenzuführungsvorrichtung mit:
einer Stromerzeugungsschaltung;
einer Steuerschaltung; und
einer Fehlererfassungsschaltungsanordnung (55) zum Erfassen mindestens eines Fehlerzustands
innerhalb des Systems; gekennzeichnet durch:
einer Datenspeichervorrichtung (51) mit einem Ausgang, wobei der Ausgang in einem
ersten Zustand ist, wenn bestimmte Daten in der Datenspeichervorrichtung gespeichert
sind, und nicht in dem ersten Zustand ist, wenn die bestimmten Daten nicht in der
Datenspeichervorrichtung gespeichert sind;
wobei die Steuerschaltung (42) fähig ist, die Stromerzeugungsschaltung zu steuern,
und fähig ist, zu veranlassen, dass die bestimmten Daten in der Datenspeichervorrichtung
gespeichert werden, wobei die Steuerschaltung einen Takteingang aufweist, wobei die
Steuerschaltung nur fähig ist zu arbeiten, wenn ein Taktsignal an den Takteingang
angelegt wird;
einer Logikschaltung mit einem Ausgang, der mit dem Takteingang der Steuerschaltung
verbunden ist, einem Steuereingang, der mit dem Ausgang der Datenspeichervorrichtung
verbunden ist, und einem Takteingang, der angepasst ist, um ein erstes Taktsignal
zu empfangen, wobei ein zweites Taktsignal an dem Ausgang der Logikschaltung nur erzeugt
wird, wenn der Ausgang der Datenspeichervorrichtung nicht in dem ersten Zustand ist;
einer Fehlererfassungsschaltung (55) zum Erfassen mindestens eines Fehlerzustands
innerhalb des Systems; und
einer Einschalt-Rücksetzschaltungsanordnung (52), um sicherzustellen, dass die bestimmten
Daten nicht in der Datenspeichervorrichtung gespeichert sind, wenn Leistung anfänglich
zugeführt wird;
wobei die Steuerschaltung veranlasst, dass die bestimmten Daten in der Datenspeichervorrichtung
gespeichert werden, wenn die Fehlererfassungsschaltungsanordnung den mindestens einen
Fehlerzustand erfasst, und
wobei die Stromerzeugungsschaltung gesperrt wird, wenn die bestimmten Daten in der
Datenspeichervorrichtung gespeichert sind.
8. Controller (2) gemäß Anspruch 7, bei dem die Steuerschaltung einen Mikroprozessor
(40) umfasst.
9. Controller (2) gemäß Anspruch 7, ferner mit einer Batteriedrainschaltung, die aktiviert
wird, wenn die bestimmten Daten in der Datenspeichervorrichtung (51) gespeichert sind.
10. Controller (2) gemäß Anspruch 9, bei dem die Batteriedrainschaltung mindestens einen
Thyristor (SCR), einen bipolaren Transistor und/oder einen Feldeffekttransistor (FET)
umfasst.
11. Controller (2) gemäß Anspruch 7, bei dem die Fehlererfassungsschaltung (55) mindestens
einen der Zustände einer niedrigen Batteriespannung, eines Bezugsspannungsausfalls,
eines Taktausfalls, einer Stromerzeugungsschaltungsüberspannung, eines Stromerzeugungsschaltungsüberstroms,
eines übermäßigen Zeit-Strom-Produkts, eines installierten abgelaufenen Patches und
eines installierten inkorrekten Patches erfasst.
12. Controller (2) gemäß Anspruch 7, bei dem die Datenspeichervorrichtung (51) eine Gruppe
umfasst, die aus einem Register, einem Zwischenspeicher, einem RAM, einem PROM, einem
EPROM, einem EEPROM und einer schmelzprogrammierbaren Vorrichtung aufgebaut ist.
13. Controller (2) gemäß Anspruch 7, bei dem ein iontophoretischer Patch (4) elektrisch
mit der Stromerzeugungsschaltung verbunden ist, wobei der Patch zum Zuführen von Medikamenten
zu dem Patienten ist, wenn die Stromerzeugungsschaltung in einem Betriebszustand ist.
14. Verfahren zum Sperren eines iontophoretischen Medikamentenzuführungssystems mit folgenden
Schritten:
Steuern eines iontophoretischen Stroms mittels einer Steuerschaltung (42), die fähig
ist, abgeschaltet zu werden, wobei die Steuerschaltung (42) einen Takteingang umfasst,
wobei die Steuerschaltung nur fähig ist zu arbeiten, wenn ein Taktsignal an den Takteingang
angelegt wird;
Rücksetzen der Steuerschaltung, wenn die Steuerschaltung angeschaltet wird, und Starten
des Taktsignals, wenn Leistung anfänglich zugeführt wird;
Erfassen mindestens eines Fehlerzustands innerhalb des Systems;
Abschalten der Steuerschaltung durch Anhalten des Taktsignals, nachdem der mindestens
eine Fehlerzustand bei dem Erfassungsschritt erfasst wird, und unwiderrufliches Anhalten
des iontophoretischen Stroms, wenn das Taktsignal angehalten wird.
1. Dispositif de commande (2) pour un appareil de fourniture de médicament par iontophorèse,
comprenant : un circuit de génération de courant ;
un circuit de détection d'erreur (55) pour détecter au moins une condition d'erreur
dans l'appareil; et
un circuit de commande (42) capable de commander ledit circuit de génération de courant,
ledit circuit de commande étant capable de s'auto-désactiver lorsque ledit circuit
de détection d'erreur détecte au moins une condition d'erreur; caractérisé en ce que ledit circuit de commande de courant (42) possède une entrée d'horloge, ledit circuit
de commande étant capable de fonctionner seulement lorsqu'un signal d'horloge est
appliqué à l'entrée d'horloge, ledit circuit de commande étant en outre capable d'arrêter
le signal d'horloge lorsque ledit circuit de détection d'erreur détecte au moins une
condition d'erreur, où ledit circuit de génération de courant est coupé de façon irrévocable
lorsque le signal d'horloge est arrêté et le dispositif de commande comprend en outre
:
un circuit de réinitialisation de mise sous tension (52) pour s'assurer que le signal
d'horloge est activé et que le circuit de commande n'est pas désactivé lorsque l'alimentation
est initialement appliquée.
2. Dispositif de commande (2) selon la revendication 1, dans lequel le circuit de commande
comprend un microprocesseur (40).
3. Dispositif de commande (2) selon la revendication 1, comprenant en outre un circuit
de contrôle de batterie qui est activé lorsque le circuit de commande (42) est invalidé.
4. Dispositif de commande (2) selon la revendication 1, dans lequel le circuit de détection
d'erreur (55) détecte au moins l'une des conditions de tension de batterie déchargée,
de panne de tension de référence, de panne d'horloge, de surtension du circuit de
génération de courant, de sur-courant de circuit de génération de courant, de produit
de temps-courant excessif, de patch installé expiré, et de patch incorrect installé.
5. Dispositif de commande (2) selon la revendication 1, dans lequel un patch d'iontophorèse
(4) est électriquement raccordé audit circuit de génération de courant, ledit patch
pour fournir des médicaments au patient lorsque ledit circuit de génération de courant
est dans un état fonctionnel.
6. Dispositif de commande (2) selon la revendication 3, dans lequel le circuit de contrôle
de batterie comprend au moins l'un d'un redresseur au silicium commandé (SCR), d'un
transistor bipolaire, et d'un transistor à effet de champ (FET).
7. Dispositif de commande (2) pour un appareil de fourniture de médicament par iontophorèse,
comprenant :
un circuit de génération de courant ;
un circuit de commande ; et
un circuit de détection d'erreur (55) pour détecter au moins une condition d'erreur
dans le système ; caractérisé par :
un dispositif de stockage de données (51) ayant une sortie, dans lequel la sortie
est dans un premier état lorsque certaines données sont stockées dans ledit dispositif
de stockage de données, et n'est pas dans le premier état lorsque certaines données
ne sont pas stockées dans ledit dispositif de stockage de données ;
ledit circuit de commande (42) capable de commander ledit circuit de génération de
courant et capable de provoquer le stockage de certaines données dans ledit dispositif
de stockage de données, ledit circuit de commande ayant une entrée d'horloge, ledit
circuit de commande étant capable de fonctionner seulement lorsqu'un signal d'horloge
est appliqué à l'entrée d'horloge:
un circuit logique ayant une sortie raccordée à l'entrée d'horloge du circuit de commande,
une entrée de commande raccordée à la sortie du dispositif de stockage de données,
et une entrée d'horloge adaptée pour recevoir un premier signal d'horloge, dans lequel
un second signal d'horloge est produit sur la sortie de circuit logique seulement
lorsque la sortie de dispositif de stockage de données n'est pas dans le premier état
;
un circuit de détection d'erreur (55) pour détecter au moins une condition d'erreur
dans le système ; et
un circuit de réinitialisation de mise sous tension (52) pour s'assurer que certaines
des données ne sont pas stockées dans ledit dispositif de stockage de données lorsque
l'alimentation est initialement appliquée,
dans lequel ledit circuit de commande provoque le stockage de certaines données dans
ledit dispositif de stockage de données lorsque ledit circuit de détection d'erreur
détecte au moins une condition d'erreur, et
dans lequel ledit circuit de génération de courant est coupé lorsque certaines des
données sont stockées dans ledit dispositif de stockage de données.
8. Dispositif de commande (2) selon la revendication 7, dans lequel ledit circuit de
commande comprend un microprocesseur (40).
9. Dispositif de commande (2) selon la revendication 7, comprenant en outre un circuit
de contrôle de batterie qui est activé lorsque certaines des données sont stockées
dans ledit dispositif de stockage de données (51).
10. Dispositif de commande (2) selon la revendication 9, dans lequel le circuit de contrôle
de batterie comprend au moins l'un d'un redresseur au silicium commandé (SCR), d'un
transistor bipolaire, et d'un transistor à effet de champ (FET).
11. Dispositif de commande (2) selon la revendication 7, dans lequel le circuit de détection
d'erreur (55) détecte au moins l'une des conditions de tension de batterie déchargée,
de panne de tension de référence, de panne d'horloge, de surtension du circuit de
génération de courant, de sur-courant de circuit de génération de courant, de produit
temps-courant excessif, de patch installé expiré, et de patch incorrect installé.
12. Dispositif de commande (2) selon la revendication 7, dans lequel le dispositif de
stockage de données (51) comprend l'un d'un groupe se composant d'un registre, d'un
circuit de verrouillage, d'une mémoire RAM, d'une mémoire PROM, d'une mémoire EPROM,
d'une mémoire EEPROM, et d'un dispositif programmable à fusible.
13. Dispositif de commande (2) selon la revendication 7, dans lequel un patch d'iontophorèse
(4) est électriquement raccordé audit circuit de génération de courant, ledit patch
pour fournir des médicaments au patient lorsque ledit circuit de génération de courant
est dans un état fonctionnel.
14. Procédé d'extinction d'un système de fourniture de médicament par iontophorèse, comprenant
les étapes de :
commande d'un courant d'iontophorèse utilisant un circuit de commande (42) capable
d'être désactivé où le circuit de commande (42) comprend une entrée d'horloge, le
circuit de commande étant capable de fonctionner seulement lorsqu'un signal d'horloge
est appliqué à l'entrée d'horloge ;
réinitialisation du circuit de commande lorsque le circuit de commande est mis sous
tension et démarrage du signal d'horloge lorsque l'alimentation est initialement appliquée
;
détection d'au moins une condition d'erreur dans le système ;
désactivation du circuit de commande par arrêt du signal d'horloge après qu'au moins
une condition d'erreur a été détectée dans ladite étape de détection ; et
arrêt irrévocable du courant d'iontophorèse lorsque le signal d'horloge a été arrêté.