Method, apparatus, and system for time synchronization

Description

Field of the Invention

[0001] The present invention relates to a communication technology, and in particular, to a method, apparatus, and system for time synchronization.

Background of the Invention

[0002] With the emergence of the third generation (3G) mobile communication technologies and more advanced digital mobile technologies, the requirements for time synchronization are still on the rise. For the cost, security, and service requirements, time synchronization becomes more important. At present, the precision of time synchronization required by mobile services is microseconds. However, it is hard to implement high-precision time synchronization.

[0003] The IEEE1588 Precision Time Protocol (PTP) provides a basic mechanism for precision time synchronization between the master clock and the slave clock. The mechanism needs to collect sufficient time stamp information sent between the master clock and the slave clock, and adjust the time synchronization between the master clock and the slave clock according to the collected time stamp information.

[0004] During the implementation of the present invention, the inventor discovers the following problems in the prior art: for most optical and Ethernet systems, a synchronization pulse signal may be used to trigger the obtaining of needed time stamp information. For example, time stamps are obtained at the edge of a transmitted frame signal and the edge of a received frame signal. However, in passband transmission systems that transmit signals continuously in units of symbols, for example, discrete multi tone (DMT)-based systems and orthogonal frequency division multiplexing (OFDM)-based systems, there is no obvious boundary between symbols, and the receive end is difficult to obtain the time stamp information, making it difficult to implement precision time synchronization between the master clock and the slave clock.

[0005] Hyuntae Cho et al: ,Implementation of a precision time protocol over low rate wireless personal area networks' describes the design and implementation of the precision time protocol over low rate wireless personal area networks (LR-WPAN's). To achieve high precision in LR-WPAN's, it analyzes the factors of latency and jitter in wireless environments, and it aims to minimize these factors.

[0006] US 6 243 369 B1 describes a bidirectional data communication system. "There is an algorithm which can be performed in a MAC or TC layer process or in the insertion logic 340 of FIG.8 to determine the insertion point startk, for a timestamp. This algorithm is based upon the observation that an FEC frame in 64-QAM is comprised of 34 MPEG packets 13 bytes and, in 256-QAM, an FEC frame is comprised of 50 MPEG packets-6 bytes. Using this information, the algorithm figures out exactly where within the MPEG packet in which the sync message will land to insert the sync message so that it is completely encapsulated within the MPEG packet"..

Summary of the Invention

[0007] Embodiments of the present invention provide a method, apparatus and system for time synchronization to implement time synchronization between the master clock and the slave clock in communication systems that transmit signals continuously in units of symbols.

[0008] A method for time synchronization in an orthogonal frequency division multiplexing, OFDM, system according to any one of claims 1-10.

[0009] An apparatus for time synchronization in an orthogonal frequency division multiplexing, OFDM, system according to any one of claims 11-16.

[0010] A system for time synchronization in an orthogonal frequency division multiplexing, OFDM according to any one of claims 17-18.

[0011] In embodiments of the present invention, in communication systems that transmit signals in units of symbols, a predetermined specific position of a specific symbol is used as the trigger edge for obtaining the time stamp information, and time synchronization is performed between the master clock and the slave clock according to the obtained time stamp information. Thus, time synchronization is implemented between the master clock and the slave clock in communication systems that transmit signals continuously in units of symbols.

Brief Description of the Drawings

[0012] For a better understanding of the technical solution in the present invention or in the prior art, the accompanying drawings for illustrating the embodiments of the present invention or the prior art are given below. Apparently, the accompanying drawings are exemplary only, and those skilled in the art can derive other drawings from such accompanying drawings without creative efforts.

FIG. 1a illustrates a basic mechanism for time synchronization in an application scenario in an embodiment of the present invention;

FIG. 1b is a flowchart of a method for time synchronization in an embodiment of the present invention;

FIG. 2 is a flowchart of another method for time synchronization in an embodiment of the present invention;

FIG. 3 is a flowchart of another method for time synchronization in an embodiment of the present invention;

FIG. 4a is a flowchart of another method for time synchronization in an embodiment of the present invention;

FIG. 4b illustrates a first application instance of determining a mean time offset in an embodiment of the present invention;

FIG. 4c illustrates a second application instance of determining a mean time offset in an embodiment of the present invention;

FIG. 5 is a first schematic diagram illustrating a digital subscriber line (DSL) system of passband transmission in an application scenario in an embodiment of the present invention;

FIG. 6 is a second schematic diagram illustrating a DSL system of passband transmission in an application scenario in an embodiment of the present invention;

FIG. 7 shows a structure of an apparatus for time synchronization in an embodiment of the present invention;

FIG. 8 shows a structure of another apparatus for time synchronization in an embodiment of the present invention; and

FIG. 9 shows a structure of a system for time synchronization in an embodiment of the present invention.

Detailed Description of the Embodiments

[0013] The technical solution under the present invention is described below with reference to the accompanying drawings. Apparently, the embodiments described below are exemplary only, without covering all embodiments of the present invention. Those skilled in the art can derive other embodiments from the embodiments given herein without making any creative effort, and all such embodiments are covered in the protection scope of the present invention.

[0014] FIG. 1a illustrates a basic mechanism for time synchronization in an application scenario in an embodiment of the present invention. As shown in FIG. 1a, the basic mechanism for time synchronization may be briefly described as follows:

[0015] The master clock periodically sends a piece of synchronization (Sync) information. After sending the Sync information, the master clock sends a piece of Follow_Up information that includes a time stamp, where the time stamp records the actual time (hereinafter referred to as the master sending time stamp Tm1) of the master clock when the master clock sends the Sync information. The slave clock records the time (hereinafter referred to as the slave receiving time stamp Ts1) of the slave clock when the slave clock receives the Sync information.

[0016] After receiving the Sync information, the slave clock sends a delay request (Delay_Req) that includes a time stamp to the master clock, where the time stamp records the time (hereinafter referred to as the slave sending time stamp Ts2) of the slave clock when the slave clock sends the Delay_Req. 4. After receiving the Delay_Req, the master clock sends a delay response (Delay_Resp) that includes a time stamp to the slave clock, where the time stamp records the time (hereinafter referred to as the master receiving time stamp Tm2) of the master clock when the master clock receives the Delay_Req.

[0017] In this way, when the slave clock receives the Delay_Resp, four time stamps are obtained, that is, Tm1, Ts1, Ts2, and Tm2. The slave clock may calculate the offset between the master clock and the slave clock and delay of the transmission link according to the Tm1 Ts1, Ts2, and Tm2. The delay of the transmission link includes a delay of the downlink transmission link (Delay1) and a delay of the uplink transmission link (Delay2). The delay of the transmission link from the master clock to the slave clock is the Delay1, and the delay of the transmission link from the slave clock to the master clock is the Delay2. The time offset, the Delay1, and the Delay2 meet the following relationship:

[0018] Supposing the Delay1 is equal to the Delay2, that is, Delay 1 = Delay2, the following formula may be obtained:

[0019] The clock time of the slave clock may be synchronized with the clock time of the master clock according to the offset calculated by using formula (3).

[0020] In this embodiment, the preceding mechanism is used in communication systems that transmit signals in units of symbols, of OFDM systems. The boundary between symbols is hard to determine because symbols are transmitted continuously in the OFDM systems. Thus, to apply the preceding mechanism to the OFDM systems, a trigger edge for obtaining time stamp information needs to be determined in these communication systems. In this embodiment, the specific position of a specific symbol is firstly determined on the master clock and the slave clock, that is, the preset position of the preset symbol is used as the trigger edge for obtaining the time stamp information.

[0021] FIG. 1 is a flowchart of a method for time synchronization in an embodiment of the present invention. In this embodiment, the method for time synchronization is executed by the slave clock device. As shown in FIG. 1a and FIG. 1b, the method for time synchronization in this embodiment includes the following steps:

Step 11: Obtain a master sending time stamp, a slave receiving time stamp, a slave sending time stamp, and a master receiving time stamp, where the master sending time stamp is the clock time of the master clock that is received by the slave clock and read by the master clock at the time of sending a preset specific position of a first specific symbol, the slave receiving time stamp is the clock time of the slave clock that is read by the slave clock at the time of receiving the specific position of the first specific symbol, the slave sending time stamp is the clock time of the slave clock that is read by the slave clock at the time of sending a specific position of a second specific symbol, and the master receiving time stamp is the clock time of the master clock that is read by the master clock at the time of receiving the specific position of the second specific symbol.

[0022] In systems that transmit signals continuously in units of symbols, the specific position of a specific symbol may be preset to trigger the reading of the local clock time. The position may be the start position of the symbol. The start position of the symbol may be the position after the cyclic prefix of the symbol. During the actual implementation, the position after the inter symbol interference (ISI) protection is the start position of the symbol. In addition, the end of the symbol or any position in the middle of the symbol may be used as the specific position for triggering the obtaining of the time stamp.

[0023] To perform time synchronization between the master clock and the slave clock, the reading of the master sending time stamp, slave receiving time stamp, slave sending time stamp, and master receiving time stamp is triggered at corresponding positions of the symbol. That is, the Tm1, the Ts1, the Ts2, and the Tm2 shown in FIG. 1a are obtained. The Tm1 and Tm2 that the master clock reads at the specific positions of the first specific symbol and the second specific symbol may be carried in related messages shown in FIG. 1a, and the messages are sent to the peer. In this way, the slave clock can obtain the Tm1, Ts1, Ts2, and Tm2 according to the specific positions of the slave clock in the first specific symbol and the second specific symbol, that is, the Ts1 and the Ts2.

[0024] Step 12: Adjust the clock time of the slave clock according to the obtained time stamps to synchronize with the clock time of the master clock.

[0025] According to the Tm1, Ts1, Ts2, and Tm2, the offset between the clock time of the master clock and the clock time of the slave clock may be calculated by using formula (3). The clock time of the slave clock is adjusted according to the calculated offset so that the clock time of the slave clock is synchronized with the clock time of the master clock.

[0026] In this embodiment, in communication systems that transmit signals in units of symbols, a predetermined specific position of a specific symbol is used as the trigger edge for obtaining time stamp information; when the specific position of the specific symbol is reached, the action of obtaining the master sending time stamp, slave receiving time stamp, slave sending time stamp or master receiving time stamp is triggered, and the time is synchronized between the master clock and the slave clock according to the obtained time stamp information. Thus, time synchronization is implemented between the master clock and the slave clock in systems that transmit signals continuously in units of symbols.

[0027] FIG. 2 is a flowchart of another method for time synchronization in an embodiment of the present invention. In this embodiment, the method for time synchronization is executed by the master clock device. As shown in FIG. 2, the method for time synchronization in this embodiment includes the following steps:

Step 21: Obtain a master sending time stamp and a master receiving time stamp, where the master sending time stamp is the clock time of the master clock that is read by the master clock at the time of sending a preset specific position of a first specific symbol, and the master receiving time stamp is the clock time of the master clock that is read by the master clock at the time of receiving a preset specific position of a second specific symbol.

[0028] The specific positions of the first specific symbol and the second specific symbol are preset to trigger the master clock or the slave clock to read the local clock time. For example, the specific position of the first specific symbol is used to trigger the master clock to read the local clock time (that is, the Tm1) at the time of sending the specific position of the first specific symbol; and the specific position of the second specific symbol is used to trigger the master clock to read the local clock time (that is, the Tm2) at the time of receiving the specific position of the second specific symbol. The first specific symbol is different from the second specific symbol, but the specific positions of the two specific symbols may be the same. For example, the start position of the first specific symbol and the start position of the second specific symbol may be preset to the specific positions of the first specific symbol and the second specific symbol respectively.

[0029] Step 22: Send the master sending time stamp and the master receiving time stamp to the slave clock, so that the slave clock adjusts the clock time of the slave clock to synchronize with the clock time of the master clock.

[0030] The specific position of the first specific symbol is also used to trigger the slave clock to read the local clock time (that is, the Ts1) at the time of receiving the specific position of the first specific symbol. The specific position of the second specific symbol is also used to trigger the slave clock to read the local clock time (that is, the Ts2) at the time of sending the specific position of the second specific symbol.

[0031] The slave clock may adjust the clock time of the slave clock according to the Tm1, the Ts1, the Ts2, and the Tm2 to synchronize with the clock time of the master clock. Details are given in step 12 shown in FIG. 1b.

[0032] In this embodiment, in communication systems that transmit signals in units of symbols, the predetermined specific position of a specific symbol is used as the trigger edge for obtaining the time stamp information; when the specific position of the specific symbol is reached, the action of reading the time stamp is triggered, and the master clock sends the read time stamp to the slave clock, so that the slave clock synchronizes with the time of the master clock. Thus, in systems that transmit signals in units of symbols, time synchronization is implemented between the master clock and the slave clock.

[0033] FIG. 3 is a flowchart of another method for time synchronization in an embodiment of the present invention. In this embodiment, the symbol of the obtained time stamp is corrected according to the phase information of sub-carriers that form the specific symbol, for example, the phase information of a single carrier. As shown in FIG. 3, the method for time synchronization in this embodiment includes the following steps:

Step 31: The master clock reads the local clock time (that is, the Tm1) of the master clock at the time of sending a specific position of a first specific symbol, and sends the Tm1 to the slave clock.

Step 32: The slave clock reads the local clock time (that is, the slave receiving time stamp Ts1') of the slave clock at the time of receiving the specific position of the first specific symbol.

[0034] In this embodiment, the specific position of the first specific symbol or a second specific symbol may be the start position of the specific symbol. When the master clock or the slave clock is the receive end receiving the synchronization information, a prior algorithm for determining the start position of the symbol (that is, the symbol synchronization algorithm) may be used to calculate the start position of the specific symbol, and the master receiving time stamp or the salve receiving time stamp is obtained at the start position of the specific symbol.

[0035] However, due to impacts of such factors as noise, channel nonlinearity, and sampling rate limit, the start position of the specific symbol obtained by using the symbol synchronization algorithm may be slightly different from the actual start position of the specific symbol. Especially in uplink bands with low frequencies, the frequency response linearity of the channel in these bands is very poor due to the low sampling rate, causing a big error in the calculation of the start position. If the symbol synchronization algorithm is used to calculate the start position of the symbol, the Ts1' or the Tm2' is obtained. The offset error based on the Ts1' or the Tm2' may be increased, thus reducing the precision of the time synchronization between the slave clock and the master clock. To increase the precision of the time synchronization between the slave clock and the master clock, the symbol correction may be performed on the specific position of the specific symbol. In this embodiment, the symbol of the obtained time stamp is corrected according to the phase information of sub-carriers that form the specific symbol, for example, the phase information of a single carrier.

Step 33: The slave clock obtains a phase difference Δϕ of any one of sub-carriers that form the first specific symbol relative to the specific position of the specific symbol on the master clock and the slave clock.

[0036] The specific symbol generally consists of multiple sub-carriers. In this step, the phase difference is a phase difference any one of the sub-carriers relative to the start position of the specific symbol on the master clock and the slave clock. The initialization information or frequency domain equalizer (FEQ) information of the receiving device on the master clock or the slave clock carries the phase difference of the sub-carrier on the master clock and the slave clock. Thus, the phase difference of any sub-carrier relative to the start position of the specific symbol on the master clock and the slave clock may be pre-obtained according to the initialization information or the FEQ information of the receiving device on the master clock or the slave clock.

[0037] Or, the phase difference may be obtained according to the phase of the sub-carrier signal relative to the start position of the symbol at one side and the phase of the sub-carrier signal relative to the calculated start position of the symbol at the other side. Specifically, the phase of the sub-carrier signal relative to the start position of the symbol is already known when the master clock device or the slave clock device sends some specific signals during the initialization. For example, if the phase of a sub-carrier signal relative to the start position of the specific symbol is zero degrees, the phase of the sub-carrier signal relative to the calculated start position of the specific symbol on the slave clock may be non-zero degrees, for example, 45 degrees, because there are certain errors between the calculated start position of the specific symbol and the actual start position of the specific symbol. In this case, the phase difference of the sub-carrier signal relative to the start position of the specific symbol on the master clock and the slave clock may be obtained, for example, Δϕ = 45°.

[0038] To increase the reliability and accuracy in the correction process and reduce negative impacts caused by factors such as frequency selective noise, a sub-carrier signal with a better signal noise ratio may be selected to perform symbol correction.

Step 34: The slave clock determines the time offset Δt corresponding to the Δϕ.

[0039] For example, the obtained phase difference (Δϕ = 45°) is converted into the Δt. Optionally, the Δt is equal to the phase difference divided by the angular speed.

Step 35: The slave clock corrects the Ts1' according to the Δt, and obtains the Ts1.

[0040] The time offset calculated by the slave clock according to the sub-carriers that form the first specific symbol is used to correct the Ts1'. The time offset calculated by the master clock according to the sub-carriers that form the second specific symbol is used to correct the Tm2'. The step of performing symbol correction on the Ts1' the Tm2' may include: subtracting the Δt from the Ts1' or the Tm2', and obtaining the Ts1 or the Tm2.

[0041] In this step, the Ts1' and Tm2' that are obtained at the specific position of the specific symbol with a big error are corrected to the Ts 1 and the Tm2 that are obtained at the actual specific position of the specific symbol.

Step 36: The slave clock reads the local clock time (that is, the Ts2) of the slave clock at the time of sending the specific position of the second specific symbol, and sends the second specific symbol to the master clock.

Step 37: The master clock reads the local clock time (that is, the Tm2') of the master clock at the time of receiving the specific position of the second specific symbol.

Step 38: The master clock determines a time offset corresponding to the phase difference of any one of sub-carriers that form the second specific symbol relative to the specific position of the specific symbol on the master clock and the slave clock, corrects the Tm2' according to the time offset, and obtains the Tm2.

[0042] In this step, the method for correcting the Tm2' by the master clock is similar to the method for correcting the Ts1' by the slave clock in step 33 to step 35, and is not further described.

Step 39: The master clock sends the Tm2 to the slave clock.

Step 310: The slave clock adjusts the clock time of the slave clock according to the Tm1, the Ts2, the Ts1, and the Tm2 to synchronize with the clock time of the master clock.

[0043] If the Tm1 the Ts2, the Ts1, and the Tm2 are substituted in formula (3), the offset between the master clock and the slave clock is obtained. The clock time of the slave clock is adjusted according to the offset to synchronize with the clock time of the master clock.

[0044] In this embodiment, the Tm2' and the Ts1' are corrected according to the time offset corresponding to the phase difference of a single carrier on the master clock and the slave clock, so that the Tm2 and Ts1 are the closest to the time stamps that are obtained by the receive end at the actual specific position of the specific symbol. Thus, the error of the time offset between the master clock and the slave clock is reduced, and the precision of the time synchronization between the slave clock and the master clock is improved.

[0045] FIG. 4a is a flowchart of another method for time synchronization in an embodiment of the present invention. In this embodiment, the symbols of the obtained time stamps are corrected according to the phase information of sub-carriers that form the specific symbols, for example, the phase information of at least two carriers. As shown in FIG. 4a, the method for time synchronization in this embodiment includes the following steps:

Step 41 to step 42 are similar to step 31 to step 32, and are not further described.

Step 43: The slave clock obtains phase differences of at least two sub-carriers that form the first specific symbol relative to the specific position of the specific symbol on the master clock and the slave clock.

[0046] If the error between the calculated specific position of the specific symbol and the actual specific position of the specific symbol is greater than a sub-carrier period, the symbol may be corrected according to the phase information of a group of sub-carriers (for example, two or more sub-carriers). The method for obtaining the phase difference of any one of the sub-carriers in this step is similar to step 33, and is not further described.

Step 44: The slave clock determines the mean time offset of each phase difference, corrects the Ts1' according to the mean time offset, and obtains the Ts1.

[0047] FIG. 4b illustrates the first application instance of determining the mean time offset in an embodiment of the present invention. The horizontal coordinate of the sub-graph on the upper left corner of FIG. 4b refers to the sub-canier sequence number, and the vertical coordinate refers to the phase. To increase the precision of the time synchronization, of all sub-carriers forming symbols, two or more sub-carriers with a better signal noise ratio and linear frequency response may be selected. That is, each carrier transmitting this group of sub-carriers has a proximately equal time offset. The sub-graph on the upper right corner of FIG. 4b shows that a number processing algorithm is used to fit the curve in the sub-graph on the upper left corner of FIG. 4b into a straight line. For example, the minimum mean square error algorithm may be used to fit the sub-graph on the upper left corner of FIG. 4b into the straight line shown in the sub-graph on the upper right corner of FIG. 4b. The sub-graph on the lower right corner of FIG. 4b refers to the slope of the curve on the upper corner of FIG. 4b. The sub-graph on the lower left corner of FIG. 4b refers to the time offset of each sub-carrier that is converted from the slope shown in the sub-graph on the lower right corner of FIG. 4b. If the selected group of sub-carriers has good frequency response linearity, the time offset corresponding to the phase difference of each sub-carrier is roughly equal, which is represented by a straight line in the sub-graph on the lower left corner of FIG. 4b. The mean time offset Δt is calculated according to all the time offsets; the symbol correction is performed on the calculated specific position of the specific symbol, and the corrected specific position of the specific symbol is obtained.

[0048] FIG. 4c illustrates the second application instance of determining the mean time offset in an embodiment of the present invention. If each sub-carrier in a group of sub-carriers has poor linear frequency response, the method shown in FIG. 4c may be used to determine the mean time offset corresponding to the phase information of each sub-carrier to reduce the symbol correction error. The difference between the method in FIG. 4b and the method in FIG. 4c is as follows: In FIG. 4c, the sub-graph on the upper left corner is converted into the slope graph on the lower right corner; the time offset of each sub-carrier on the lower left corner of FIG. 4c is obtained according to the slope graph.

[0049] After the time offset of each carrier is obtained, the mean value of all the time offsets is calculated and the mean time offset Δt is obtained. For example, the mean value of five time offsets shown in the sub-graph on the lower left corner of FIG. 4c is calculated, and the mean time offset Δt is obtained. The symbol correction is performed on the slave receiving time stamp or the master receiving time stamp according to the Δt. For example, the Δt is subtracted from the obtained Ts1' or the Tm2', and the Ts1 or the Tm2 is obtained.

[0050] In this step, the slave clock corrects the Ts1' that is obtained by the slave clock at the calculated specific position of the specific symbol with a big error to the Ts1 that is obtained at the actual specific position of the specific symbol.

[0051] Step 45 to step 46 are similar to step 36 to step 37, and are not further described.

Step 47: The master clock determines a mean time offset corresponding to the phase differences of at least two sub-carriers that form the second specific symbol relative to the specific position of the specific symbol on the master clock and the slave clock, corrects the Tm2' according to the mean time offset, and obtains the Tm2.

[0052] In this step, the method for correcting the Tm2' by the master clock is similar to the method for correcting the Ts1' by the slave clock in step 43 to step 44, and is not further described.

[0053] In this step, the master clock corrects the Tm2' that is obtained at the calculated specific position of the specific symbol with a big error to the Tm2 that is obtained at the actual specific position of the specific symbol.

Step 48 to step 49 are similar to step 39 to step 310, and are not further described.

[0054] In this embodiment, the Tm2' and the Ts1' are corrected according to the mean time offset corresponding to the phase difference of each carrier in a group of at least two sub-carriers that form the first or second specific symbol relative to the master clock and the slave clock, so that the Tm2 and the Ts1 are the closest to the time stamp obtained at the actual specific position of the specific symbol. Thus, the error of the time offset between the master clock and the slave clock is reduced, and the precision of the time synchronization between the slave clock and the master clock is improved. In this embodiment, the symbol may be corrected when the error between the calculated specific position of the specific symbol and the actual specific position of the specific symbol is greater than a sub-carrier period, thus improving the precision of the time synchronization.

[0055] The preceding embodiments shown in FIG. 1a to FIG. 4c are described supposing the Delay1 is equal to the Delay2. If the Delay1 is not equal to the Delay2, the mapping relation between the Delay1 and the Delay2 needs to be determined to calculate the offset according to the basic mechanism shown in FIG. 1a and formula (1) and formula (2). That is, the offset needs to be calculated according to the Tm1, Ts1, Ts2, and Tm2 and the mapping relation between the Delay1 and the Delay2. Then, the slave clock adjusts the local clock time by using the offset to synchronize with the local clock time of the master clock.

[0056] The following describes the mapping relation between the Delay1 and the Delay2 with reference to the digital subscriber line (DSL) of passband transmission.

[0057] The DSL technology is a high-speed transmission technology that transmits data through a twisted pair cable. The DSL of passband transmission includes an asymmetrical digital subscriber line (ADSL) and a very high speed digital subscriber line (VDSL). Various DSLs of passband transmission perform modulation and demodulation by using the DMT modulation technology.

[0058] FIG. 5 is the first schematic diagram illustrating a DSL system of passband transmission in an application scenario in an embodiment of the present invention. As shown in FIG. 5, the DSL system of passband transmission includes a central office unit (CO) and a customer premises equipment (CPE). The CO and the CPE transmit data through a twisted pair cable. The CO is located on the master clock, and the CPE is located on the slave clock. The clock time of the CPE needs to be synchronized with the clock time of the CO.

[0059] The CO or the CPE may be divided into three sublayers on a physical medium, namely, transport protocol dependent convergence sublayer, physical media dependent-TC (PMD-TC) sublayer, and physical media dependent (PMD) sublayer. Because the path delay caused by the twisted pair cable between the CO and the CPE is small, the two ends of the twisted pair cable may be used as reference points for reading the local clock information under ideal circumstances, that is, obtaining the time stamps. However, both ends of the twisted pair cable and the hybrid circuit that is adapted to convert an analog signal into two telephone line signals generally do not support the read and write functions. Thus, in this embodiment, the time stamps are obtained at a sublayer near the twisted pair cable (that is, the PMD sublayer), so as to reduce the offset error caused by the device delay and improve the precision of the time synchronization.

[0060] FIG. 6 is the second schematic diagram illustrating a DSL system of passband transmission in an application scenario in an embodiment of the present invention. In FIG. 6, only the PMD sublayer device is illustrated on the CO and the CPE in the DSL system. The PMD sublayer device on the CO includes a CO digital signal sending circuit, a CO analog signal sending circuit, a CO digital signal receiving circuit, and a CO analog signal receiving circuit. The PMD sublayer device on the CPE includes a CPE digital signal sending circuit, a CPE analog signal sending circuit, a CPE digital signal receiving circuit, and a CPE analog signal receiving circuit. The delays generated by the CO digital signal sending circuit, the CO digital signal receiving circuit, the CPE digital signal sending circuit, and the CPE digital signal receiving circuit may be directly obtained by using the existing circuit design information, the test method or emulation method. The delays generated by these circuits are called device delay information.

[0061] In the downlink from the CO to the CPE, the generated delays include delay Δt1 of the CO digital signal sending circuit, delay Δt2 of the CO analog signal sending circuit, delay Δt3 of the downlink path, delay Δt2' of the CPE analog signal receiving circuit, and delay Δt1' of the CPE digital signal receiving circuit. Δt1 and Δt2 refer to the master device delay information. Δt2' and Δt1' refer to the slave device delay information, and Δt3 refers to the downlink path delay information. Thus, the Delay1 meets the following formula:

[0062] In the uplink from the CPE to the CO, the generated delays include delay Δt4 of the CO digital signal receiving circuit, delay Δt5 of the CO analog signal receiving circuit, delay Δt6 of the uplink path, delay Δt5' of the CPE analog signal sending circuit, and delay Δt4' of the CPE digital signal sending circuit. Δt4 and Δt5 refer to the master device delay information. Δt5' and Δt4' refer to the slave device delay information, and Δt6 refers to the uplink path delay information. Thus, the Delay2 meets the following formula:

[0063] In general, the Delay1 is not equal to the Delay2. The difference between the Delay1 and the Delay2 is usually greater than 1uS, thus affecting the precision of the time synchronization greatly. In applications, the mapping relation between the Delay1 and the Delay2 may be roughly processed, and the function relation between the Delay1 and the Delay2 is established. For example,

[0064] In formula (6), function f may be a linear or non-linear function. Subsequently, f is changed to a linear function to simplify the calculation of the offset.

[0065] During the implementation of the present invention, the inventor measures and analyzes the delays (shown in formula (4)) in FIG. 6 by using the measurement or circuit emulation method. The inventor finds the following result: Delays Δt2 and Δt5 occurring when the CO analog signal sending circuit and the CO analog signal receiving circuit process different sub-carriers are close to a fixed value; delays Δt2' and Δt5' occurring when the CPE analog signal sending circuit and the CPE analog signal receiving circuit process different sub-carriers are close to a fixed value. By checking the characteristics of the twisted pair cable, the inventor finds that the downlink path delay Δt3 and downlink path delay Δt6 of the twisted pair cable have specific relations at each frequency point. For example,

[0066] This formula means that the time for transmitting the uplink 48 x 4.3125 KHz neighbor signal in the twisted pair cable is 1.07 times as much as that for transmitting the 96 x 4.3125 KHz neighbor signal.

[0067] Based on the preceding analysis, formula (6) may be simplified as follows:

[0068] In formula (8), the Delay1 may be the delay of a downlink signal in the twisted pair cable, and the Delay2 may be the delay of an uplink signal in the twisted pair cable; a and b refer to fixed coefficients, the specific values of which may be obtained according to the delays of the uplink and downlink devices and delay time characteristics of the uplink and downlink lines.

[0069] If formulas (1), (2), and (8) are combined, the offset may be calculated.

[0070] Alternatively, each time stamp may be pre-corrected according to the device delay so as to perform time synchronization according to each corrected time stamp. The Tm1, Ts1, Ts2, and Tm2 shown in FIG. 6 refer to the time stamps obtained at the ingress of the PMD sublayer. In this embodiment, the obtained time stamps may be corrected according to the device delay information of the PMD sublayer, so that the corrected time stamps are obtained at both ends of the twisted pair cable. For example, the time stamps after the device delay is considered are as follows:

[0071] In this case, the Delay2 and the Delay1 are equivalent to the Delay2' and the Delay1' at both ends of the twisted pair cable, where the Delay2' and the Delay1' refer to the uplink path delay and downlink path delay of the twisted pair cable. According to formulas 1, 2, 4, 5, and 9 to 12, the following formulas may be obtained:

[0072] In formula (13), a refers to a fixed coefficient, the specific value of which may be obtained according to the delay time characteristics of the uplink and downlink lines of the twisted pair cable. Preferably, a may be any value meeting 1 ≤ a ≤ 1.1. The offset may be calculated according to formulas (13) to (15). The clock time of the CPE may be adjusted according to the offset to synchronize with the clock time of the CO. In this embodiment, the obtained time stamps are corrected according to the delay information of the PMD sublayer device, so that the mapping relation between the uplink delay and the downlink delay may be simplified as the mapping relation between the uplink path delay and the downlink path delay. In this way, the corrected time stamps are obtained at both ends of the twisted pair cable. Thus, the error of the offset between the CO and the CPE is reduced, and the precision of the time synchronization is improved.

[0073] Based on the DSL system shown in FIG. 6, the following describes the process of correcting the time stamps in the downlink from the CO to the CPE and in the uplink from the CPE to the CO with reference to the symbol correction method and the method for determining the mapping relation between the uplink delay and the downlink delay.

1. Downlink from the CO to the CPE: The CO digital signal sending circuit reads the local time of the CO (that is, obtains the Tm1) at the specific position of the specific symbol; when the specific symbol is transmitted to the CPE digital signal receiving circuit through the downlink, the CPE digital signal receiving circuit reads the local time of the CPE (that is, obtains the Ts1') at the pre-calculated specific position of the specific symbol. Then, the Tm1 and the Ts1' are corrected. This correction process includes three parts:

(1) Correcting the Ts1' by the CPE: The CPE corrects the Ts1' by using the method shown in FIG. 3 or FIG. 4a according to the time offset corresponding to the phase difference of the sub-carrier. In this way, the Ts1 is read at the actual specific position of the specific symbol.

(2) Correcting the Ts 1 by the CPE: The CPE corrects the Ts 1 by using the pre-obtained Δt1' and Δt2' according to formula (10). In this way, the Ts1" is obtained at a side close to the CPE of the twisted pair cable.

(3) Correcting the Tm1 by the CO: The CO corrects the Tm1 by using the pre-obtained Δt1 and Δt2 according to formula (9). In this way, the Tm1" is obtained at a side where the twisted pair cable is close to the CO.

Based on the preceding description, the following formula may be obtained:

2. Uplink from the CPE to the CO: The CPE digital signal sending circuit reads the local time of the CPE (that is, obtains the Ts2) at the specific position of the specific symbol; when the specific symbol is transmitted to the CO digital signal receiving circuit through the uplink, the CO digital signal receiving circuit reads the local time of the CO (that is, obtains the Tm2') at the pre-calculated specific position of the specific symbol. Then, the Ts2 and the Tm2' are corrected. This correction process also includes three parts:

(1) Correcting the Tm2' by the CO: The CO corrects the Tm2' by using the method shown in FIG. 3 or FIG. 4a according to the time offset corresponding to the phase difference of the sub-carrier. In this way, the Tm2 is obtained at the actual specific position of the specific symbol.

(2) Correcting the Tm2 by the CO: The CO corrects the Tm2 by using the pre-obtained Δt4 and Δt5 according to formula (11). In this way, the Tm2" is obtained at a side close to the CO of the twisted pair cable.

(3) Collecting the Ts2 by the CPE: The CPE corrects the Ts2 by using the pre-obtained Δt4' and Δt5' according to formula (12). In this way, the Ts2" is obtained at a side where the twisted pair cable is close to the CPE.

[0074] Based on the preceding description, the following formula may be obtained:

[0075] Because Delay2' = a * Delay1', the offset, Delay1', and Delay2' may be obtained. The clock time of the CPE is adjusted according to the offset so as to synchronize with the clock time of the CO.

[0076] In this embodiment, the time stamp is obtained when the PMD sublayer device receives/sends the specific position of the specific symbol; the time stamps obtained by the receiving end are corrected according to the phase difference of the sub-carrier on the CO and the CPE; the mapping relation between the uplink delay and the downlink delay is simplified; the secondary correction is performed on the time stamp according to the delay information of the PMD sublayer device on the CO and the CPE. Thus, the error of the offset between the CO and the CPE is greatly reduced, and the precision of the time synchronization is improved.

[0077] FIG. 7 shows a structure of an apparatus for time synchronization in an embodiment of the present invention. As shown in FIG. 7, the apparatus for time synchronization includes a time stamp obtaining module 71 and a time adjusting module 72.

[0078] The time stamp obtaining module 71 is adapted to obtain the master sending time stamp, the salve receiving time stamp, the slave sending time stamp, and the master receiving time stamp. The master sending time stamp is the clock time of the master clock that is received by the slave clock and read by the master clock at the time of sending a preset specific position of a first specific symbol; the slave receiving time stamp is the clock time of the slave clock that is read by the slave clock at the time of receiving the specific position of the first specific symbol; the slave sending time stamp is the clock time of the slave clock that is read by the slave clock at the time of sending a specific position of a second specific symbol; and the master receiving time stamp is the clock time of the master clock that is read by the master clock at the time of receiving the specific position of the second specific symbol.

[0079] The time adjusting module 72 is adapted to adjust the clock time of the slave clock according to the obtained time stamps-to synchronize with the clock time of the master clock.

[0080] On the basis of the preceding technical solution, optionally, the master receiving time stamp may be corrected by the master clock according to the phase information of sub-carriers that form the second specific symbol. The time adjusting module 72 may further include a slave receiving time stamp correcting unit 721 and a first time adjusting unit 722. The slave receiving time stamp correcting unit 721 is adapted to corrects the slave receiving time stamp according to the phase information of the sub-carriers that form the first specific symbol. The first time adjusting unit 722 is adapted to adjust the clock time of the slave clock according to the master sending time stamp, the slave sending time stamp, the corrected slave receiving time stamp, and the corrected master receiving time stamp to synchronize with the clock time of the master clock.

[0081] Optionally, the slave receiving time stamp correcting unit 721 is further adapted to: obtain a phase difference of any one of the sub-carriers that form the first specific symbol relative to the specific position of the first specific symbol on the master clock and the slave clock; determine a time offset corresponding to the phase difference; and correct the slave receiving time stamp according to the time offset. Or, the slave receiving time stamp correcting unit 721 is further adapted to: obtain phase differences of at least two sub-carriers that form the first specific symbol, where the phase differences are phase differences of each sub-carrier relative to the specific position of the first specific symbol on the master clock and the slave clock; determine time offsets corresponding to each phase difference; determine a mean time offset of all the time offsets; and correct the slave receiving time stamp according to the mean time offset.

[0082] Optionally, in the preceding technical solution, the master sending time stamp is the clock time of the master clock that is read by a master PMD device on master clock at the time of sending a preset specific position of a first specific symbol; the slave receiving time stamp is the clock time of the slave clock that is read by a PMD device on the slave clock at the time of receiving the specific position of the first specific symbol; the slave sending time stamp is the clock time of the slave clock that is read by the PMD device on the slave clock at the time of sending a specific position of a second specific symbol; and the master receiving time stamp is the clock time of the master clock that is read by the PMD device on master clock at the time of receiving the specific position of the second specific symbol.

[0083] Further, the master sending time stamp and the master receiving time stamp may be time stamps corresponding to the clock time of the master clock that is corrected by the master clock according to the pre-obtained delay information of the master PMD device. The time adjusting module 72 may include a path delay determining unit 723, a slave device delay correcting unit 724, and a second time adjusting unit 725. The path delay determining unit 723 is adapted to determine the mapping relation between the master clock and the slave clock and between the uplink path delay and the downlink path delay. The slave device delay correcting unit 724 is adapted to correct the slave sending time stamp and the slave receiving time stamp according to the pre-obtained slave device delay information of the slave PMD device on the slave clock. The second time adjusting unit 725 is adapted to adjust the clock time of the slave clock according to the corrected time stamps and the mapping relation between the uplink path delay and the downlink path delay.

[0084] In embodiments of the present invention, in communication systems that transmit signals in units of symbols, the predetermined specific position of a specific symbol is used as the trigger edge for obtaining the time stamp information, and time synchronization is performed between the master clock and the slave clock according to the obtained time stamp information. Thus, time synchronization is implemented between the master clock and the slave clock in communication systems that transmit signals continuously in units of symbols. In this embodiment, the specific representation form of the apparatus for time synchronization is not limited. It may be a slave clock device, for example, the CPE. The mechanism for implementing time synchronization between the master clock and the slave clock is already illustrated in FIG. 1a to FIG. 6.

[0085] FIG. 8 shows a structure of another apparatus for time synchronization in an embodiment of the present invention. As shown in FIG. 8, the apparatus for time synchronization includes a time stamp obtaining module 81 and a time stamp sending module 82.

[0086] The time stamp obtaining module 81 is adapted to obtain the master sending time stamp and the master receiving time stamp. The master sending time stamp is the clock time of the master clock that is read by the master clock at the time of sending a preset specific position of a first specific symbol. The master receiving time stamp is the clock time of the master clock that is read by the master clock at the time of receiving a preset specific position of a second specific symbol.

[0087] The time stamp sending module 82 is adapted to send the master sending time stamp and the master receiving time stamp to the slave clock, so that the slave clock adjusts the clock time of the slave clock to synchronize with the clock time of the master clock.

[0088] On the basis of the preceding technical solution, the time stamp sending module 82 may further include a master receiving time stamp correcting unit 821 and a time stamp sending unit 822. The master receiving time stamp correcting unit 821 is adapted to correct the master receiving time stamp according to the phase information of the sub-carriers that form the second specific symbol. Accordingly, the time stamp sending unit 822 is adapted to send the master sending time stamp and the corrected master receiving time stamp.

[0089] Optionally, the master receiving time stamp correcting unit 821 is further adapted to: obtain a phase difference of any one of the sub-carriers relative to the specific position of the second specific symbol on the master clock and the slave clock; determine a time offset corresponding to the phase difference; and correct the master receiving time stamp according to the time offset. Or, the master receiving time stamp correcting unit 821 is further adapted to: obtain phase differences of at least two sub-carriers, where the phase differences are phase differences of each sub-carrier relative to the specific position of the second specific symbol on the master clock and the slave clock; determine time offsets corresponding to each phase difference; determine a mean time offset of all the time offsets; and correct the master receiving time stamp according to the mean time offset.

[0090] Optionally, the master sending time stamp is the clock time of the master clock that is read by the master PMD device on the master clock at the time of sending the specific position of the first specific symbol. The master receiving time stamp is the clock time of the master clock that is read by the PMD device on the master clock at the time of receiving the specific position of the second specific symbol.

[0091] Further, the time stamp sending module 82 may include a master device delay correcting unit 823. The master device delay correcting unit 823 may be adapted to correct the master sending time stamp and the master receiving time stamp according to the pre-obtained master device delay information of the master PMD device. Accordingly, the time stamp sending unit 822 is further adapted to send the master sending time stamp and the master receiving time stamp corrected by the master device delay correcting unit 823.

[0092] In this embodiment, in communication systems that transmit signals in units of symbols, the predetermined specific position of a specific symbol is used as the trigger edge for obtaining the time stamp information; when the specific position of the specific symbol is reached, the action of reading the time stamp is triggered; and the read time stamp is sent to the slave clock, so that the slave clock synchronizes with the time of the master clock. Thus, in systems that transmit signals in units of symbols, time synchronization is implemented between the master clock and the slave clock. In this embodiment, the specific representation form of the apparatus for time synchronization is not limited. It may be a master clock device, for example, the CO. The mechanism for implementing time synchronization between the master clock and the slave clock is already illustrated in FIG. 1a to FIG. 6.

[0093] FIG. 9 shows a structure of a system for time synchronization in an embodiment of the present invention. As shown in FIG. 9, the system for time synchronization includes a master clock device 91 and a slave clock device 92.

[0094] The master clock device 91 is adapted to: obtain the master sending time stamp and the master receiving time stamp, and send the master sending time stamp and the master receiving time stamp to the slave clock device 92.

[0095] The slave clock device 92 is adapted to: obtain the master sending time stamp, the slave receiving time stamp, the slave sending time stamp, and the master receiving time stamp, and adjust the clock time of the slave clock according to the obtained time stamps to synchronize with the clock time of the master clock.

[0096] In the preceding technical solution, the master sending time stamp is the clock time of the master clock that is read by the master clock device at the time of sending a preset specific position of a first specific symbol; the slave receiving time stamp is the clock time of the slave clock that is read by the slave clock device at the time of receiving the specific position of the first specific symbol; the slave sending time stamp is the clock time of the slave clock that is read by the slave clock device at the time of sending a specific position of a second specific symbol; and the master receiving time stamp is the clock time of the master clock that is read by the master clock device at the time of receiving the specific position of the second specific symbol.

[0097] In the system for time synchronization in this embodiment, the predetermined specific position of a specific symbol is used as the trigger edge for obtaining the time stamp information; when the specific position of the specific symbol is reached, the action of reading the time stamp is triggered; and the read time stamp is sent to the slave clock, so that the slave clock synchronizes with the time of the master clock. Thus, in systems that transmit signals continuously in units of symbols, time synchronization is implemented between the master clock and the slave clock. FIG. 8 shows a detailed structure of the master clock device in an embodiment of the present invention. FIG. 7 shows a detailed structure of the slave clock device in an embodiment of the present invention. The mechanism for implementing synchronization between the master clock and the slave clock through interactions between the master clock device and the slave clock device is already illustrated in FIG. 1a to FIG. 6.

[0098] It should be understood by those skilled in the art that the accompanying drawings are merely schematic views of preferred embodiments, and modules or processes in the accompanying drawings are not mandatory in implementing the present invention.

[0099] In addition, the modules in the apparatus in the embodiments of the present invention may be distributed in the way described herein, or distributed in other ways, for example, in one or more apparatuses of different embodiments. The modules in the foregoing embodiments may be combined into one, or split into several submodules.

[0100] The serial number of the embodiments given above is for clear description only, and does not represent the order of preference.

[0101] Those skilled in the art may understand that all or part of the steps of the method according to the embodiments of the present invention may be implemented by a program instructing relevant hardware. The program may be stored in a computer readable storage medium. When the program runs, the steps of the method according to the embodiments of the present invention are performed. The storage medium may be a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or a compact disk read-only memory (CD-ROM).

[0102] It should be noted that the above embodiments are merely provided for elaborating the technical solution of the present invention, but not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, it is apparent that those skilled in the art may make modifications to the technical solutions described in the above embodiments, or may make equivalent replacements to some of the technical features without making the nature of the corresponding technical solutions depart from scope of the embodiments of the invention.

Claims

1. A method for time synchronization in an orthogonal frequency division multiplexing, OFDM, system, comprising:

obtaining (11) a master sending time stamp, a slave receiving time stamp, a slave sending time stamp, and a master receiving time stamp;

wherein the master sending time stamp (21, 31, 41) is a clock time of a master clock that is read by the master clock at the time of sending a preset specific position of a first specific symbol in the OFDM system;

the slave receiving time stamp (32, 42) is a clock time of a slave clock that is read by the slave clock at the time of receiving the specific position of the first specific symbol in the OFDM system;

the slave sending time stamp (36, 45) is a clock time of the slave clock that is read by the slave clock at the time of sending a specific position of a second specific symbol in the OFDM system; and

the master receiving time stamp (21, 37, 46) is a clock time of the master clock that is read by the master clock at the time of receiving the specific position of the second specific symbol in the OFDM system; and

adjusting (12, 310, 49) a clock time of the slave clock according to the offset calculated from the time stamps to synchronize with a clock time of the master clock.

2. The method of claim 1, the method further comprising:

correcting the time stamps according to a device delay information of a master physical media dependent, PMD, sublayer.

3. The method of claim 2, wherein the corrected time stamps are obtained at both ends of a twisted pair cable.

4. The method according to any one of claims 2-3, wherein the step of adjusting the clock time of the slave clock according to the offset calculated from the time stamps to synchronize with the clock time of the master clock comprises:

adjusting the clock time of the slave clock according to the offset calculated from the corrected time stamps to synchronize with the clock time of the master clock.

5. The method of claim 1, the method further comprises:

correcting the master receiving time stamp according to phase information of sub-carriers in the OFDM system that form the second specific symbol;

correcting the slave receiving time stamp according to phase information of sub-carriers in the OFDM system that form the first specific symbol; and

wherein the step of adjusting the clock time of the slave clock according to the offset calculated from the time stamps to synchronize with the clock time of the master clock comprises:

adjusting (310) the clock time of the slave clock according to the master sending time stamp, the slave sending time stamp, the corrected slave receiving time stamp, and the corrected master receiving time stamp to synchronize with the clock time of the master clock.

6. The method of claim 5, wherein the step of correcting the slave receiving time stamp according to the phase information of the sub-carriers in the OFDM system that form the first specific symbol comprises:

obtaining (33) a phase difference of any one of the sub-carriers in the OFDM system that form the first specific symbol, wherein the phase difference is phase difference of the sub-carrier relative to the specific position of the first specific symbol on the master clock and the slave clock;

determining a time offset corresponding to the phase difference; and

correcting the slave receiving time stamp according to the time offset.

7. The method of claim 5 wherein the step of correcting the master receiving time stamp according to the phase information of the sub-carriers in the OFDM system that form the second specific symbol comprises:

obtaining (43) a phase difference of any one of the sub-carriers in the OFDM system that form the second specific symbol, wherein the phase difference is phase difference of the sub-carrier relative to the specific position of the second specific symbol on the master clock and the slave clock;

determining a time offset corresponding to the phase difference; and

correcting the master receiving time stamp according to the time offset.

8. The method of claim 5, wherein the step of correcting the slave receiving time stamp according to the phase information of the sub-carriers in the OFDM system that form the first specific symbol comprises:

obtaining phase differences of at least two of the sub-carriers that form the first specific symbol, wherein the phase differences are phase differences of each sub-carrier relative to the specific position of the first specific symbol on the master clock and the slave clock;

determining time offsets corresponding to each phase difference;

determining a mean time offset of all the time offsets; and

correcting the slave receiving time stamp according to the mean time offset.

9. The method of claim 5, wherein the step of correcting the master receiving time stamp according to the phase information of the sub-carriers in the OFDM system that form the second specific symbol comprises:

obtaining phase differences of at least two of the sub-carriers that form the second specific symbol, wherein the phase differences are phase differences of each sub-carrier relative to the specific position of the second specific symbol on the master clock and the slave clock;

determining time offsets corresponding to each phase difference;

determining a mean time offset of all the time offsets; and

correcting the master receiving time stamp according to the mean time offset.

10. The method according to any one of claims 5-9, wherein: the master sending time stamp is the clock time of the master clock that is read by a master physical media dependent, PMD, device on the master clock at the time of sending the specific position of the first specific symbol in the OFDM system and corrected by the master PMD device according to pre-obtained master device delay information of the master PMD device;
the slave receiving time stamp is the clock time of the slave clock that is read by a slave PMD device on the slave clock at the time of receiving the specific position of the first specific symbol in the OFDM system;
the slave sending time stamp is the clock time of the slave clock that is read by the slave PMD device at the time of sending the specific position of the second specific symbol in the OFDM system; and
the master receiving time stamp is the clock time of the master clock that is read by the master PMD device at the time of receiving the specific position of the second specific symbol in the OFDM system and corrected by the master PMD device according to the master device delay information;
wherein the step of adjusting the clock time of the slave clock according to the obtained time stamps to synchronize with the clock time of the master clock comprises:

determining a mapping relation between an uplink path delay and a downlink path delay;

correcting the slave sending time stamp and the slave receiving time stamp according to pre-obtained slave device delay information of the slave PMD device; and

adjusting the time of the slave clock according to the corrected time stamps and the mapping relation between the uplink path delay and the downlink path delay to synchronize with the clock time of the master clock.

11. An apparatus for time synchronization in an orthogonal frequency division multiplexing, OFDM, system, comprising: a time stamp obtaining module (71), adapted to obtain a master sending time stamp, a slave receiving time stamp, a slave sending time stamp, and a master receiving time stamp;
the master sending time stamp is a clock time of a master clock that is read by the master clock at the time of sending a preset specific position of a first specific symbol in the OFDM system;
the slave receiving time stamp is a clock time of a slave clock that is read by the slave clock at the time of receiving the specific position of the first specific symbol in the OFDM system;
the slave sending time stamp is a clock time of the slave clock that is read by the slave clock at the time of sending a specific position of a second specific symbol in the OFDM system, and
the master receiving time stamp is a clock time of the master clock that is read by the master clock at the time of receiving the specific position of the second specific symbol in the OFDM system; and
a time adjusting module (72), adapted to adjust a clock time of the slave clock according to the offset calculated from the time stamps to synchronize with a clock time of the master clock.

12. The apparatus of claim 11, wherein the obtained time stamps are corrected according to a device delay information of a master physical media dependent, PMD, sublayer.

13. The apparatus of claim 11, wherein the master receiving time stamp is corrected by phase information of sub-carriers in the OFDM system that form the second specific symbol and the time adjusting module (72) comprises:

a slave receiving time stamp correcting unit (721), adapted to correct the slave receiving time stamp according to phase information of sub-carriers in the OFDM system that form the first specific symbol; and

a first time adjusting unit (722), adapted to adjust the clock time of the slave clock according to the master sending time stamp, the slave sending time stamp, the corrected slave receiving time stamp, and the corrected master receiving time stamp to synchronize with the clock time of the master clock.

14. The apparatus of claim 13, wherein the slave receiving time stamp correcting unit (721) is further adapted to:

obtain a phase difference of any one of the sub-carriers in the OFDM system that form the first specific symbol, wherein the phase difference is phase difference of the sub-carrier relative to the specific position of the first specific symbol on the master clock and the slave clock;

determine a time offset corresponding to the phase difference; and

correct the slave receiving time stamp according to the time offset.

15. The apparatus of claim 13, wherein:

the slave receiving time stamp correcting unit (721) is further adapted to:

obtain phase differences of at least two of the sub-carriers in the OFDM system that form the first specific symbol, wherein the phase differences are phase differences of each sub-carrier relative to the specific position of the first specific symbol on the master clock-and the slave clock;

determine time offsets corresponding to each phase difference; determine a mean time offset of all the time offsets; and

correct the slave receiving time stamp according to the mean time offset.

16. The apparatus according to any one of claims 11-15, wherein: the master sending time stamp is the clock time of the master clock that is read by a master physical media dependent, PMD, device of the master clock at the time of sending the specific position of the first specific symbol in the OFDM system and corrected by the master PMD device according to pre-obtained master device delay information of the master PMD device;
the slave receiving time stamp is the clock time of the slave clock that is read by a slave PMD device of the slave clock at the time of receiving the specific position of the first specific symbol in the OFDM system;
the slave sending time stamp is the clock time of the slave clock that is read by the slave PMD device at the time of sending the specific position of the second specific symbol in the OFDM system; and
the master receiving time stamp is the clock time of the master clock that is read by the master PMD device at the time of receiving the specific position of the second specific symbol in the OFDM system and corrected by the master PMD device according to the master device delay information;
wherein the time adjusting module (72) comprises:

a path delay determining unit (723), adapted to determine a mapping relation between an uplink path delay and a downlink path delay;

a slave device delay correcting unit (724), adapted to correct the slave sending time stamp and the slave receiving time stamp according to pre-obtained slave device delay information of the slave PMD device; and

a second time adjusting unit (725), adapted to adjust the clock time of the slave clock according to the corrected time stamps and the mapping relation between the uplink path delay and the downlink path delay to synchronize with the clock time of the master clock.

17. A system for time synchronization in an orthogonal frequency division multiplexing, OFDM, system, comprising:

a master clock device (91), adapted to obtain and send a master sending time stamp and a master receiving time stamp to the slave clock device (92); and

a slave clock device (92) according to any one of claims 11-16.

18. The system of claim 17, wherein:

the master clock device (91) is further adapted to: correct the master receiving time stamp according to phase information of sub-carriers in the OFDM system that form the second specific symbol; and send the master sending time stamp and the corrected master receiving time stamp.

Ansprüche

1. Verfahren zur Zeitsynchronisation in einem Orthogonal-Frequenzmultiplex-System, OFDM-System, umfassend:

Erhalten (11) eines Master-Sendezeitstempels, eines Slave-Empfangszeitstempels, eines Slave-Sendezeitstempels und eines Master-Empfangszeitstempels;

wobei der Master-Sendezeitstempel (21, 31, 41) eine Zeitgeberzeit eines Master-Zeitgebers ist, die durch den Master-Zeitgeber zum Zeitpunkt des Sendens einer voreingestellten spezifischen Position eines ersten spezifischen Symbols in dem OFDM-System gelesen wird;

der Slave-Empfangszeitstempel (32, 42) eine Zeitgeberzeit eines Slave-Zeitgebers ist, die durch den Slave-Zeitgeber zum Zeitpunkt des Empfangs der spezifischen Position des ersten spezifischen Symbols in dem OFDM-System gelesen wird;

der Slave-Sendezeitstempel (36, 45) eine Zeitgeberzeit des Slave-Zeitgebers ist, die durch den Slave-Zeitgeber zum Zeitpunkt des Sendens einer spezifischen Position eines zweiten spezifischen Symbols in dem OFDM-System gelesen wird; und

der Master-Empfangszeitstempel (21, 37, 46) eine Zeitgeberzeit des Master-Zeitgebers ist, die durch den Master-Zeitgeber zum Zeitpunkt des Empfangs der spezifischen Position des zweiten spezifischen Symbols in dem OFDM-System gelesen wird; und

Justieren (12, 310, 49) einer Zeitgeberzeit des Slave-Zeitgebers gemäß dem aus den Zeitstempeln berechneten Offset zur Synchronisierung mit einer Zeitgeberzeit des Master-Zeitgebers.

2. Verfahren nach Anspruch 1, wobei das Verfahren ferner Folgendes umfasst:

Korrigieren der Zeitstempel gemäß einer Einrichtungsverzögerungsinformation einer Master-"Physical Media Dependent"-Subschicht, Master-PMD-Subschicht.

3. Verfahren nach Anspruch 2, wobei die korrigierten Zeitstempel an beiden Enden eines verdrillten Doppelleitungskabels erhalten werden.

4. Verfahren nach einem der Ansprüche 2-3, wobei der Schritt des Justierens der Zeitgeberzeit des Slave-Zeitgebers gemäß dem aus den Zeitstempeln berechneten Offset zur Synchronisation mit der Zeitgeberzeit des Master-Zeitgebers Folgendes umfasst:

Justieren der Zeitgeberzeit des Slave-Zeitgebers gemäß dem aus den korrigierten Zeitstempeln berechneten Offset zur Synchronisation mit der Zeitgeberzeit des Master-Zeitgebers.

5. Verfahren nach Anspruch 1, wobei das Verfahren ferner Folgendes umfasst:

Korrigieren des Master-Empfangszeitstempels gemäß Phaseninformationen von Subträgern in dem OFDM-System, die das zweite spezifische Symbol bilden;

Korrigieren des Slave-Empfangszeitstempels gemäß Phaseninformationen von Subträgern in dem OFDM-System, die das erste spezifische Symbol bilden; und

wobei der Schritt des Justierens der Zeitgeberzeit des Slave-Zeitgebers gemäß dem aus den Zeitstempeln berechneten Offset zur Synchronisation mit der Zeitgeberzeit des Master-Zeitgebers Folgendes umfasst:

Justieren (310) der Zeitgeberzeit des Slave-Zeitgebers gemäß dem Master-Sendezeitstempel, dem Slave-Sendezeitstempel, dem korrigierten Slave-Empfangszeitstempel und dem korrigierten Master-Empfangszeitstempel zur Synchronisation mit der Zeitgeberzeit des Master-Zeitgebers.

6. Verfahren nach Anspruch 5, wobei der Schritt des Korrigierens des Slave-Empfangszeitstempels gemäß den Phaseninformationen der Subträger in dem OFDM-System, die das erste spezifische Symbol bilden, Folgendes umfasst:

Erhalten (33) einer Phasendifferenz eines beliebigen der Subträger in dem OFDM-System, die das erste spezifische Symbol bilden, wobei die Phasendifferenz Phasendifferenz des Subträgers relativ zu der spezifischen Position des ersten spezifischen Symbols auf dem Master-Zeitgeber und dem Slave-Zeitgeber ist;

Bestimmen eines Zeitoffsets entsprechend der Phasendifferenz; und

Korrigieren des Slave-Empfangszeitstempels gemäß dem Zeitoffset.

7. Verfahren nach Anspruch 5, wobei der Schritt des Korrigierens des Master-Empfangszeitstempels gemäß den Phaseninformationen der Subträger in dem OFDM-System, die das zweite spezifische Symbol bilden, Folgendes umfasst:

Erhalten (43) einer Phasendifferenz eines beliebigen der Subträger in dem OFDM-System, die das zweite spezifische Symbol bilden, wobei die Phasendifferenz Phasendifferenz der Subträger relativ zu der spezifischen Position des zweiten spezifischen Symbols auf dem Master-Zeitgeber und dem Slave-Zeitgeber ist;

Bestimmen eines Zeitoffsets entsprechend der Phasendifferenz; und

Korrigieren des Master-Empfangszeitstempels gemäß dem Zeitoffset.

8. Verfahren nach Anspruch 5, wobei der Schritt des Korrigierens des Slave-Empfangszeitstempels gemäß den Phaseninformationen der Subträger in dem OFDM-System, die das erste spezifische Symbol bilden, Folgendes umfasst:

Erhalten von Phasendifferenzen von mindestens zwei der Subträger, die das erste spezifische Symbol bilden, wobei die Phasendifferenzen Phasendifferenzen jedes Subträgers relativ zu der spezifischen Position des ersten spezifischen Symbols auf dem Master-Zeitgeber und dem Slave-Zeitgeber sind;

Bestimmen von Zeitoffsets entsprechend jeder Phasendifferenz;

Bestimmen eines mittleren Zeitoffsets aller Zeitoffsets; und

Korrigieren des Slave-Empfangszeitstempels gemäß dem mittleren Zeitoffset.

9. Verfahren nach Anspruch 5, wobei der Schritt des Korrigierens des Master-Empfangszeitstempels gemäß den Phaseninformationen der Subträger in dem OFDM-System, die das zweite spezifische Symbol bilden, Folgendes umfasst:

Erhalten von Phasendifferenzen von mindestens zwei der Subträger, die das zweite spezifische Symbol bilden, wobei die Phasendifferenzen Phasendifferenzen jedes Subträgers relativ zu der spezifischen Position des zweiten spezifischen Symbols auf dem Master-Zeitgeber und dem Slave-Zeitgeber sind;

Bestimmen von Zeitoffsets entsprechend jeder Phasendifferenz;

Bestimmen eines mittleren Zeitoffsets aller Zeitoffsets; und

Korrigieren des Master-Empfangszeitstempels gemäß dem mittleren Zeitoffset.

10. Verfahren nach einem der Ansprüche 5-9, wobei der Master-Sendezeitstempel die Zeitgeberzeit des Master-Zeitgebers ist, die durch eine Master-"Physical Media Dependent"-Einrichtung, Master-PMD-Einrichtung, auf dem Master-Zeitgeber zum Zeitpunkt des Sendens der spezifischen Position des ersten spezifischen Symbols in dem OFDM-System gelesen und durch die Master-PMD-Einrichtung gemäß im Voraus erhaltenen Master-Einrichtungs-Verzögerungsinformationen der Master-PMD-Einrichtung korrigiert wird;
der Slave-Empfangszeitstempel die Zeitgeberzeit des Slave-Zeitgebers ist, die durch eine Slave-PMD-Einrichtung auf dem Slave-Zeitgeber zum Zeitpunkt des Empfangens der spezifischen Position des ersten spezifischen Symbols in dem OFDM-System gelesen wird;
der Slave-Sendezeitstempel die Zeitgeberzeit des Slave-Zeitgebers ist, die durch die Slave-PMD-Einrichtung zum Zeitpunkt des Sendens der spezifischen Position des zweiten spezifischen Symbols in dem OFDM-System gelesen wird; und
der Master-Empfangszeitstempel die Zeitgeberzeit des Master-Zeitgebers ist, die durch die Master-PMD-Einrichtung zum Zeitpunkt des Empfangens der spezifischen Position des zweiten spezifischen Symbols in dem OFDM-System gelesen und durch die Master-PMD-Einrichtung gemäß den Master-Einrichtungs-Verzögerungsinformationen korrigiert wird;
wobei der Schritt des Justierens der Zeitgeberzeit des Slave-Zeitgebers gemäß den erhaltenen Zeitstempeln zur Synchronisation mit der Zeitgeberzeit des Master-Zeitgebers Folgendes umfasst:

Bestimmen einer Abbildungsbeziehung zwischen einer Aufwärtsstrecken-Pfadverzögerung und einer Abwärtsstrecken-Pfadverzögerung;

Korrigieren des Slave-Sendezeitstempels und des Slave-Empfangszeitstempels gemäß im Voraus erhaltenen Slave-Einrichtungs-Verzögerungsinformationen der Slave-PMD-Einrichtung; und

Justieren der Zeitgeberzeit des Slave-Zeitgebers gemäß den korrigierten Zeitstempeln und der Abbildungsbeziehung zwischen der Aufwärtsstrecken-Pfadverzögerung und

der Abwärtsstrecken-Pfadverzögerung zur Synchronisation mit der Zeitgeberzeit des Master-Zeitgebers.

11. Vorrichtung zur Zeitsynchronisation in einem Orthogonal-Frequenzmultiplex-System, OFDM-System, umfassend:

ein Zeitstempel-Erhaltemodul (71), ausgelegt zum Erhalten eines Master-Sendezeitstempels, eines Slave-Empfangszeitstempels, eines Slave-Sendezeitstempels und eines Master-Empfangszeitstempels;

wobei der Master-Sendezeitstempel eine Zeitgeberzeit eines Master-Zeitgebers ist,

die durch den Master-Zeitgeber zum Zeitpunkt des Sendens einer voreingestellten spezifischen Position eines ersten spezifischen Symbols in dem OFDM-System gelesen wird;

der Slave-Empfangszeitstempel eine Zeitgeberzeit eines Slave-Zeitgebers ist, die durch den Slave-Zeitgeber zum Zeitpunkt des Empfangs der spezifischen Position des ersten spezifischen Symbols in dem OFDM-System gelesen wird;

der Slave-Sendezeitstempel eine Zeitgeberzeit des Slave-Zeitgebers ist, die durch den Slave-Zeitgeber zum Zeitpunkt des Sendens einer spezifischen Position eines zweiten spezifischen Symbols in dem OFDM-System gelesen wird; und

der Master-Empfangszeitstempel eine Zeitgeberzeit des Master-Zeitgebers ist, die durch den Master-Zeitgeber zum Zeitpunkt des Empfangs der spezifischen Position des zweiten spezifischen Symbols in dem OFDM-System gelesen wird; und

ein Zeitjustierungsmodul (72), ausgelegt zum Justieren einer Zeitgeberzeit des Slave-Zeitgebers gemäß dem aus den Zeitstempeln berechneten Offset zur Synchronisierung mit einer Zeitgeberzeit des Master-Zeitgebers.

12. Vorrichtung nach Anspruch 11, wobei die erhaltenen Zeitstempel gemäß einer Einrichtungsverzögerungsinformation einer Master-"Physical Media Dependent"-Subschicht, Master-PMD-Subschicht, korrigiert werden.

13. Vorrichtung nach Anspruch 11, wobei der Master-Empfangszeitstempel durch Phaseninformationen von Subträgern in dem OFDM-System, die das zweite spezifische Symbol bilden, korrigiert wird und das Zeitjustierungsmodul (72) Folgendes umfasst:

eine Slave-Empfangszeitstempel-Korrektureinheit (721), ausgelegt zum Korrigieren des Slave-Empfangszeitstempels gemäß Phaseninformationen von Subträgern in dem OFDM-System, die das erste spezifische Symbol bilden; und

eine erste Zeitjustierungseinheit (722), ausgelegt zum Justieren der Zeitgeberzeit des Slave-Zeitgebers gemäß dem Master-Sendezeitstempel, dem Slave-Sendezeitstempel,

dem korrigierten Slave-Empfangszeitstempel und dem korrigierten Master-Empfangszeitstempel zur Synchronisation mit der Zeitgeberzeit des Master-Zeitgebers.

14. Vorrichtung nach Anspruch 13, wobei die Slave-Empfangszeitstempel-Korrektureinheit (721) ferner für Folgendes ausgelegt ist:

Erhalten einer Phasendifferenz eines beliebigen der Subträger in dem OFDM-System, die das erste spezifische Symbol bilden, wobei die Phasendifferenz Phasendifferenz des Subträgers relativ zu der spezifischen Position des ersten spezifischen Symbols auf dem Master-Zeitgeber und dem Slave-Zeitgeber ist;

Bestimmen eines Zeitoffsets entsprechend der Phasendifferenz; und

Korrigieren des Slave-Empfangszeitstempels gemäß dem Zeitoffset.

15. Vorrichtung nach Anspruch 13, wobei
die Slave-Empfangszeitstempel-Korrektureinheit (721) ferner für Folgendes ausgelegt ist:

Erhalten von Phasendifferenzen von mindestens zwei der Subträger in dem OFDM-System, die das erste spezifische Symbol bilden, wobei die Phasendifferenzen Phasendifferenzen jedes Subträgers relativ zu der spezifischen Position des ersten spezifischen Symbols auf dem Master-Zeitgeber und dem Slave-Zeitgeber sind;

Bestimmen von Zeitoffsets entsprechend jeder Phasendifferenz;

Bestimmen eines mittleren Zeitoffsets aller Zeitoffsets; und

Korrigieren des Slave-Empfangszeitstempels gemäß dem mittleren Zeitoffset.

16. Vorrichtung nach einem der Ansprüche 11-15, wobei
der Master-Sendezeitstempel die Zeitgeberzeit des Master-Zeitgebers ist, die durch eine Master-"Physical Media Dependent"-Einrichtung, Master-PMD-Einrichtung, des Master-Zeitgebers zum Zeitpunkt des Sendens der spezifischen Position des ersten spezifischen Symbols in dem OFDM-System gelesen und durch die Master-PMD-Einrichtung gemäß im Voraus erhaltenen Master-Einrichtungs-Verzögerungsinformationen der Master-PMD-Einrichtung korrigiert wird; der Slave-Empfangszeitstempel die Zeitgeberzeit des Slave-Zeitgebers ist, die durch eine Slave-PMD-Einrichtung auf dem Slave-Zeitgeber zum Zeitpunkt des Empfangens der spezifischen Position des ersten spezifischen Symbols in dem OFDM-System gelesen wird;
der Slave-Sendezeitstempel die Zeitgeberzeit des Slave-Zeitgebers ist, die durch die Slave-PMD-Einrichtung zum Zeitpunkt des Sendens der spezifischen Position des zweiten spezifischen Symbols in dem OFDM-System gelesen wird; und
der Master-Empfangszeitstempel die Zeitgeberzeit des Master-Zeitgebers ist, die durch die Master-PMD-Einrichtung zum Zeitpunkt des Empfangens der spezifischen Position des zweiten spezifischen Symbols in dem OFDM-System gelesen und durch die Master-PMD-Einrichtung gemäß den Master-Einrichtungs-Verzögerungsinformationen korrigiert wird;
wobei das Zeitjustierungsmodul (72) Folgendes umfasst:

eine Pfadverzögerungsbestimmungseinheit (723), ausgelegt zum Bestimmen einer Abbildungsbeziehung zwischen einer Aufwärtsstrecken-Pfadverzögerung und einer Abwärtsstrecken-Pfadverzögerung;

eine Slave-Einrichtungsverzögerungskorrektureinheit (724), ausgelegt zum Korrigieren des Slave-Sendezeitstempels und des Slave-Empfangszeitstempels gemäß im Voraus erhaltenen Slave-Einrichtungs-Verzögerungsinformationen der Slave-PMD-Einrichtung; und

eine zweite Zeitjustierungseinheit (725), ausgelegt zum Justieren der Zeitgeberzeit des Slave-Zeitgebers gemäß den korrigierten Zeitstempeln und der Abbildungsbeziehung zwischen der Aufwärtsstrecken-Pfadverzögerung und der Abwärtsstrecken-Pfadverzögerung zur Synchronisation mit der Zeitgeberzeit des Master-Zeitgebers.

17. System zur Zeitsynchronisation in einem Orthogonal-Frequenzmultiplex-System, OFDM-System, umfassend:

eine Master-Zeitgebereinrichtung (91), ausgelegt zum Erhalten und Senden eines Master-Sendezeitstempels und eines Master-Empfangszeitstempels zu der Slave-Zeitgebereinrichtung (92); und

eine Slave-Zeitgebereinrichtung (92) nach einem der Ansprüche 11-16.

18. System nach Anspruch 17, wobei
die Master-Zeitgebereinrichtung (91) ferner für Folgendes ausgelegt ist:

Korrigieren des Master-Empfangszeitstempels gemäß Phaseninformationen von Subträgern in dem OFDM-System, die das zweite spezifische Symbol bilden; und

Senden des Master-Sendezeitstempels und des korrigierten Master-Empfangszeitstempels.

Revendications

1. Procédé de synchronisation temporelle dans un système de multiplexage par répartition orthogonale de la fréquence, OFDM, le procédé comprenant les étapes consistant à :

obtenir (11) une estampille temporelle d'envoi maîtresse, une estampille temporelle de réception esclave, une estampille temporelle d'envoi esclave et une estampille temporelle de réception maîtresse ;

laquelle estampille temporelle d'envoi maîtresse (21, 31, 41) est un temps d'horloge d'une horloge maîtresse qui est lu par l'horloge maîtresse au moment d'envoyer une position spécifique préétablie d'un premier symbole spécifique dans le système OFDM;

laquelle estampille temporelle de réception esclave (32, 42) est un temps d'horloge d'une horloge esclave qui est lu par l'horloge esclave au moment de recevoir la position spécifique du premier symbole spécifique dans le système OFDM ;

laquelle estampille temporelle d'envoi esclave (36, 45) est un temps d'horloge de l'horloge esclave qui est lu par l'horloge esclave au moment d'envoyer une position spécifique d'un deuxième symbole spécifique dans le système OFDM ; et

laquelle estampille temporelle de réception maîtresse (21, 37, 46) est un temps d'horloge de l'horloge maîtresse qui est lu par l'horloge maîtresse au moment de recevoir la position spécifique du deuxième symbole spécifique dans le système OFDM ; et

ajuster (12, 310, 49) un temps d'horloge de l'horloge esclave conformément au décalage calculé à partir des estampilles temporelles pour le synchroniser avec un temps d'horloge de l'horloge maîtresse.

2. Procédé selon la revendication 1, le procédé comprenant en outre l'étape consistant à :

corriger les estampilles temporelles conformément à des informations de retard de dispositif relatives à une sous-couche dépendante du support physique, PMD, maîtresse.

3. Procédé selon la revendication 2, dans lequel les estampilles temporelles corrigées sont obtenues aux deux extrémités d'un câble à paire torsadée.

4. Procédé selon l'une quelconque des revendications 2 et 3, dans lequel l'étape consistant à ajuster le temps d'horloge de l'horloge esclave conformément au décalage calculé à partir des estampilles temporelles pour le synchroniser avec le temps d'horloge de l'horloge maîtresse comprend l'étape consistant à :

ajuster le temps d'horloge de l'horloge esclave conformément au décalage calculé à partir des estampilles temporelles corrigées pour le synchroniser avec le temps d'horloge de l'horloge maîtresse.

5. Procédé selon la revendication 1, le procédé comprenant en outre les étapes consistant à :

corriger l'estampille temporelle de réception maîtresse conformément à des informations de phase relatives à des sous-porteuses dans le système OFDM qui forment le deuxième symbole spécifique ;

corriger l'estampille temporelle de réception esclave conformément à des informations de phase relatives à des sous-porteuses dans le système OFDM qui forment le premier symbole spécifique ; et

laquelle étape consistant à ajuster le temps d'horloge de l'horloge esclave conformément au décalage calculé à partir des estampilles temporelles pour le synchroniser avec le temps d'horloge de l'horloge maîtresse comprend l'étape consistant à :

ajuster (310) le temps d'horloge de l'horloge esclave conformément à l'estampille temporelle d'envoi maîtresse, à l'estampille temporelle d'envoi esclave, à l'estampille temporelle de réception esclave corrigée et à l'estampille temporelle de réception maîtresse corrigée pour le synchroniser avec le temps d'horloge de l'horloge maîtresse.

6. Procédé selon la revendication 5, dans lequel l'étape consistant à corriger l'estampille temporelle de réception esclave conformément aux informations de phase relatives aux sous-porteuses dans le système OFDM qui forment le premier symbole spécifique comprend les étapes consistant à :

obtenir (33) une différence de phase d'une quelconque des sous-porteuses dans le système OFDM qui forment le premier symbole spécifique, laquelle différence de phase est une différence de phase de la sous-porteuse par rapport à la position spécifique du premier symbole spécifique sur l'horloge maîtresse et l'horloge esclave ;

déterminer un décalage temporel correspondant à la différence de phase ; et

corriger l'estampille temporelle de réception esclave conformément au décalage temporel.

7. Procédé selon la revendication 5, dans lequel l'étape consistant à corriger l'estampille temporelle de réception maîtresse conformément aux informations de phase relatives aux sous-porteuses dans le système OFDM qui forment le deuxième symbole spécifique comprend les étapes consistant à :

obtenir (43) une différence de phase d'une quelconque des sous-porteuses dans le système OFDM qui forment le deuxième symbole spécifique, laquelle différence de phase est une différence de phase de la sous-porteuse par rapport à la position spécifique du deuxième symbole spécifique sur l'horloge maîtresse et l'horloge esclave ;

déterminer un décalage temporel correspondant à la différence de phase ; et

corriger l'estampille temporelle de réception maîtresse conformément au décalage temporel.

8. Procédé selon la revendication 5, dans lequel l'étape consistant à corriger l'estampille temporelle de réception esclave conformément aux informations de phase relatives aux sous-porteuses dans le système OFDM qui forment le premier symbole spécifique comprend les étapes consistant à :

obtenir des différences de phase d'au moins deux des sous-porteuses qui forment le premier symbole spécifique, lesquelles différences de phase sont des différences de phase de chaque sous-porteuse par rapport à la position spécifique du premier symbole spécifique sur l'horloge maîtresse et l'horloge esclave ;

déterminer des décalages temporels correspondant à chaque différence de phase ;

déterminer un décalage temporel moyen de tous les décalages temporels ; et

corriger l'estampille temporelle de réception esclave conformément au décalage temporel moyen.

9. Procédé selon la revendication 5, dans lequel l'étape consistant à corriger l'estampille temporelle de réception maîtresse conformément aux informations de phase relatives aux sous-porteuses dans le système OFDM qui forment le deuxième symbole spécifique comprend les étapes consistant à :

obtenir des différences de phase d'au moins deux des sous-porteuses qui forment le deuxième symbole spécifique, lesquelles différences de phase sont des différences de phase de chaque sous-porteuse par rapport à la position spécifique du deuxième symbole spécifique sur l'horloge maîtresse et l'horloge esclave ;

déterminer des décalages temporels correspondant à chaque différence de phase ;

déterminer un décalage temporel moyen de tous les décalages temporels ; et

corriger l'estampille temporelle de réception maîtresse conformément au décalage temporel moyen.

10. Procédé selon l'une quelconque des revendications 5 à 9,
laquelle estampille temporelle d'envoi maîtresse est le temps d'horloge de l'horloge maîtresse qui est lu par un dispositif dépendant du support physique, PMD, maître sur l'horloge maîtresse au moment d'envoyer la position spécifique du premier symbole spécifique dans le système OFDM et corrigé par le dispositif PMD maître conformément à des informations de retard de dispositif maître préalablement obtenues relatives au dispositif PMD maître ;
laquelle estampille temporelle de réception esclave est le temps d'horloge de l'horloge esclave qui est lu par un dispositif PMD esclave sur l'horloge esclave au moment de recevoir la position spécifique du premier symbole spécifique dans le système OFDM ;
laquelle estampille temporelle d'envoi esclave est le temps d'horloge de l'horloge esclave qui est lu par le dispositif PMD esclave au moment d'envoyer la position spécifique du deuxième symbole spécifique dans le système OFDM ; et laquelle estampille temporelle de réception maîtresse est le temps d'horloge de l'horloge maîtresse qui est lu par le dispositif PMD maître au moment de recevoir la position spécifique du deuxième symbole spécifique dans le système OFDM et corrigé par le dispositif PMD maître conformément aux informations de retard de dispositif maître ;
laquelle étape consistant à ajuster le temps d'horloge de l'horloge esclave conformément aux estampilles temporelles obtenues pour le synchroniser avec le temps d'horloge de l'horloge maîtresse comprend les étapes consistant à :

déterminer une relation de correspondance entre un retard de trajet sens montant et un retard de trajet sens descendant ;

corriger l'estampille temporelle d'envoi esclave et l'estampille temporelle de réception esclave conformément à des informations de retard de dispositif esclave préalablement obtenues relatives au dispositif PMD esclave ; et

ajuster le temps d'horloge de l'horloge esclave conformément aux estampilles temporelles corrigées et à la relation de correspondance entre le retard de trajet sens montant et le retard de trajet sens descendant pour le synchroniser avec le temps d'horloge de l'horloge maîtresse.

11. Appareil de synchronisation temporelle dans un système de multiplexage par répartition orthogonale de la fréquence, OFDM, l'appareil comprenant :

un module d'obtention d'estampille temporelle (71), adapté à obtenir une estampille temporelle d'envoi maîtresse, une estampille temporelle de réception esclave, une estampille temporelle d'envoi esclave et une estampille temporelle de réception maîtresse ;

laquelle estampille temporelle d'envoi maîtresse est un temps d'horloge d'une horloge maîtresse qui est lu par l'horloge maîtresse au moment d'envoyer une position spécifique préétablie d'un premier symbole spécifique dans le système OFDM;

laquelle estampille temporelle de réception esclave est un temps d'horloge d'une horloge esclave qui est lu par l'horloge esclave au moment de recevoir la position spécifique du premier symbole spécifique dans le système OFDM ;

laquelle estampille temporelle d'envoi esclave est un temps d'horloge de l'horloge esclave qui est lu par l'horloge esclave au moment d'envoyer une position spécifique d'un deuxième symbole spécifique dans le système OFDM, et

laquelle estampille temporelle de réception maîtresse est un temps d'horloge de l'horloge maîtresse qui est lu par l'horloge maîtresse au moment de recevoir la position spécifique du deuxième symbole spécifique dans le système OFDM ; et

un module d'ajustement de temps (72), adapté à ajuster un temps d'horloge de l'horloge esclave conformément au décalage calculé à partir des estampilles temporelles pour le synchroniser avec un temps d'horloge de l'horloge maîtresse.

12. Appareil selon la revendication 11, dans lequel les estampilles temporelles obtenues sont corrigées conformément à des informations de retard de dispositif relatives à une sous-couche dépendante du support physique, PMD, maîtresse.

13. Appareil selon la revendication 11, dans lequel l'estampille temporelle de réception maîtresse est corrigée par des informations de phase relatives à des sous-porteuses dans le système OFDM qui forment le deuxième symbole spécifique, et le module d'ajustement de temps (72) comprend :

une unité de correction d'estampille temporelle de réception esclave (721), adaptée à corriger l'estampille temporelle de réception esclave conformément à des informations de phase relatives à des sous-porteuses dans le système OFDM qui forment le premier symbole spécifique ; et

une première unité d'ajustement de temps (722), adaptée à ajuster le temps d'horloge de l'horloge esclave conformément à l'estampille temporelle d'envoi maîtresse, à l'estampille temporelle d'envoi esclave, à l'estampille temporelle de réception esclave corrigée et à l'estampille temporelle de réception maîtresse corrigée pour le synchroniser avec le temps d'horloge de l'horloge maîtresse.

14. Appareil selon la revendication 13, dans lequel l'unité de correction d'estampille temporelle de réception esclave (721) est en outre adaptée à :

obtenir une différence de phase d'une quelconque des sous-porteuses dans le système OFDM qui forment le premier symbole spécifique, laquelle différence de phase est une différence de phase de la sous-porteuse par rapport à la position spécifique du premier symbole spécifique sur l'horloge maîtresse et l'horloge esclave ;

déterminer un décalage temporel correspondant à la différence de phase ; et

corriger l'estampille temporelle de réception esclave conformément au décalage temporel.

15. Appareil selon la revendication 13, dans lequel :

l'unité de correction d'estampille temporelle de réception esclave (721) est en outre adaptée à :

obtenir des différences de phase d'au moins deux des sous-porteuses dans le système OFDM qui forment le premier symbole spécifique, lesquelles différences de phase sont des différences de phase de chaque sous-porteuse par rapport à la position spécifique du premier symbole spécifique sur l'horloge maîtresse et l'horloge esclave ;

déterminer des décalages temporels correspondant à chaque différence de phase ;

déterminer un décalage temporel moyen de tous les décalages temporels ; et

corriger l'estampille temporelle de réception esclave conformément au décalage temporel moyen.

16. Appareil selon l'une quelconque des revendications 11 à 15,
laquelle estampille temporelle d'envoi maîtresse est le temps d'horloge de l'horloge maîtresse qui est lu par un dispositif dépendant du support physique, PMD, maître de l'horloge maîtresse au moment d'envoyer la position spécifique du premier symbole spécifique dans le système OFDM et corrigé par le dispositif PMD maître conformément à des informations de retard de dispositif maître préalablement obtenues relatives au dispositif PMD maître ;
laquelle estampille temporelle de réception esclave est le temps d'horloge de l'horloge esclave qui est lu par un dispositif PMD esclave de l'horloge esclave au moment de recevoir la position spécifique du premier symbole spécifique dans le système OFDM ;
laquelle estampille temporelle d'envoi esclave est le temps d'horloge de l'horloge esclave qui est lu par le dispositif PMD esclave au moment d'envoyer la position spécifique du deuxième symbole spécifique dans le système OFDM ; et
laquelle estampille temporelle de réception maîtresse est le temps d'horloge de l'horloge maîtresse qui est lu par le dispositif PMD maître au moment de recevoir la position spécifique du deuxième symbole spécifique dans le système OFDM et corrigé par le dispositif PMD maître conformément aux informations de retard de dispositif maître ;
lequel module d'ajustement de temps (72) comprend :

une unité de détermination de retard de trajet (723), adaptée à déterminer une relation de correspondance entre un retard de trajet sens montant et un retard de trajet sens descendant ;

une unité de correction de retard de dispositif esclave (724), adaptée à corriger l'estampille temporelle d'envoi esclave et l'estampille temporelle de réception esclave conformément à des informations de retard de dispositif esclave préalablement obtenues relatives au dispositif PMD esclave ; et

une deuxième unité d'ajustement de temps (725), adaptée à ajuster le temps d'horloge de l'horloge esclave conformément aux estampilles temporelles corrigées et à la relation de correspondance entre le retard de trajet sens montant et le retard de trajet sens descendant pour le synchroniser avec le temps d'horloge de l'horloge maîtresse.

17. Système de synchronisation temporelle dans un système de multiplexage par répartition orthogonale de la fréquence, OFDM, le système comprenant :

un dispositif d'horloge maîtresse (91), adapté à obtenir une estampille temporelle d'envoi maîtresse et une estampille temporelle de réception maîtresse et à les envoyer au dispositif d'horloge esclave (92) ; et

un dispositif d'horloge esclave (92) selon l'une quelconque des revendications 11 à 16.

18. Système selon la revendication 17, dans lequel :

le dispositif d'horloge maîtresse (91) est en outre adapté à : corriger l'estampille temporelle de réception maîtresse conformément à des informations de phase relatives à des sous-porteuses dans le système OFDM qui forment le deuxième symbole spécifique ; et envoyer l'estampille temporelle d'envoi maîtresse et l'estampille temporelle de réception maîtresse corrigée.

Drawing