BACKGROUND
1. FIELD OF THE DISCLOSURE
[0001] The present disclosure relates to the field of integrated circuits. More particularly,
the present disclosure relates to the field of error detection on integrated circuit
input/output pins.
2. BACKGROUND INFORMATION
[0002] Integrated circuits include processors and microprocessors such as microcontrollers.
Microcontrollers have pins which can become stuck, or which can be misaddressed in,
for example, an analog input mode. Conventionally, 2 channels are used to detect stuck
pins or misaddressing so as to invoke protection.
SUMMARY OF THE INVENTION
[0004] The invention provides a solution to pin stuck detection on input/output pin of an
integrated circuit including a microprocessor. The input/output pin of the integrated
circuit being linked to an input node. The input node receives an input signal through
at least one resistor and is connected to a reference voltage through a second resistor
and to zero volt through a third resistor. The invention is defined by the independent
method claim 1 and the independent apparatus claim 9.
[0005] Additional features are defined by the dependent claims 2-8 and 10-14.
BRIEF DESCRIPTION OF THE DRAWINGS
[0006]
Figure 1 shows an exemplary electronic device that includes a driving circuit with
a microprocessor with input/output pins, according to an aspect of the present disclosure;
Figure 2 shows an exemplary circuit with a microprocessor, according to an aspect
of the present disclosure;
Figure 3 shows another exemplary circuit with a microprocessor, according to an aspect
of the present disclosure;
Figure 4 shows an exemplary circuit with a microprocessor, according to an aspect
of the present disclosure;
Figure 5 shows an exemplary process for error detection on integrated circuit input/output
pins, according to an aspect of the present disclosure;
Figure 6 shows another exemplary process for error detection on integrated circuit
input/output pins, according to an aspect of the present disclosure
Figure 7 shows another exemplary process for error detection on integrated circuit
input/output pins, according to an aspect of the present disclosure; and
Figure 8 shows another exemplary process for error detection on integrated circuit
input/output pins, according to an aspect of the present disclosure.
DETAILED DESCRIPTION
[0007] In view of the foregoing, the present disclosure, through one or more of its various
aspects, embodiments and/or specific features or sub-components, is thus intended
to bring out one or more of the advantages as specifically noted below.
[0008] The present disclosure describes a microcontroller that can perform error detection
for pins. When a microcontroller is used to control a light emitting diode driving
circuit to meet UL Class 2 requirements and temperature Class P requirement, the software
needs to be compatible with UL 60730 compatible. The microcontroller described herein
can detect if pins are stuck at high level or low level, and if analog input multiplexer
addressing is wrong. When errors are detected, protection can be triggered. The disclosure
contained herein describes, for example, how to detect a stuck input/output pin configured
for digital output, as well as wrong multiplexer addressing for analog input pin.
[0009] Methods described herein are illustrative examples, and as such are not intended
to require or imply that any particular process of any embodiment be performed in
the order presented. Words such as "thereafter," "then," "next," etc. are not intended
to limit the order of the processes, and these words are instead used to guide the
reader through the description of the methods. Further, any reference to claim elements
in the singular, for example, using the articles "a," "an" or "the", is not to be
construed as limiting the element to the singular.
[0010] Additionally, terms such as microprocessor and microcontroller may be used interchangeably
herein. In the absence of explanations distinguishing such terms, similar and comparable
terms such as these should be considered equivalent for the purposes of the explanations
provided herein. In the example of a microprocessor, any microprocessor described
herein may also be, for example, a microprocessor chip, or a controller.
[0011] Figure 1 shows an exemplary electronic device that includes a driving circuit with
a microprocessor. In Figure 1, the electronic device 10 is a device that includes
a microprocessor 140. The microprocessor 140 in Figure 1 is shown as part of a driving
circuit, for driving loads imposed by light emitting diode(s) 199.
[0012] An example of the electronic device 10 is a device that includes light emitting diodes
driven by a driving circuit. The driving circuit may be designed to comply with UL
Class 2 LED Driver requirements, and can help ensure that parameters of the driving
circuit meet such requirements. Such a driving circuit may include a primary control
section and an output section isolated in at least one aspect from the primary control
section.
[0013] Electronic device 10 may be, for example, a lighting fixture, an entertainment display,
a communications device, and more. Such devices can also include electronic devices
with memory and additional microprocessors beyond the microprocessor 100 specific
to the output section 100b of the driving circuit 100. Such devices may operate as
standalone devices or may be connected, for example, using a network, to other devices
or systems.
[0014] The electronic device 10 can be incorporated as or in a particular device that in
turn is in an integrated system that includes additional devices. In a particular
embodiment, the electronic device 10 can be implemented using electronic devices that
provide voice, video or data communication. Further, while a single electronic device
10 is illustrated, the electronic device 10 maybe included in a "system" that includes
any collection of systems or sub-systems that individually or jointly execute a set,
or multiple sets, of instructions to perform one or more computer software functions.
[0015] A microprocessor as described herein is tangible and non-transitory. As used herein,
the term "non-transitory" is to be interpreted not as an eternal characteristic of
a state, but as a characteristic of a state that will last for a period of time. The
term "non-transitory" specifically disavows fleeting characteristics such as characteristics
of a particular carrier wave or signal or other forms that exist only transitorily
in any place at any time. A microprocessor is an article of manufacture and/or a machine
component. A microprocessor for an electronic device 10 is configured to execute software
instructions in order to perform functions as described in the various embodiments
herein. A microprocessor for an electronic device 10 maybe a general purpose microprocessor
or maybe part of an application specific integrated circuit (ASIC). Additionally,
any microprocessor described herein may include multiple microprocessors, parallel
microprocessors, or both. Multiple microprocessors may be included in, or coupled
to, a single device or multiple devices.
[0016] Moreover, devices described herein may include storage such as a memory. Memories
described herein are tangible storage mediums that can store data and executable instructions,
and are non-transitory during the time instructions are stored therein. A memory described
herein is an article of manufacture and/or machine component. Memories described herein
are computer-readable mediums from which data and executable instructions can be read
by a processor. Memories as described herein may be random access memory (RAM), read
only memory (ROM), flash memory, electrically programmable read only memory (EPROM),
electrically erasable programmable read-only memory (EEPROM), registers, or any other
form of storage medium known in the art. Memories may be volatile or non-volatile,
secure and/or encrypted, unsecure and/or unencrypted.
[0017] In a particular embodiment, a device described herein may include a computer-readable
medium in which one or more sets of instructions, for example, software, can be embedded.
Sets of instructions can be read from the computer-readable medium. Further, the instructions,
when executed by a microprocessor, can be used to perform one or more of the methods
and processes as described herein. In a particular embodiment, the instructions may
reside completely, or at least partially, within a separate memory, and/or within
the microprocessor during execution by a device.
[0018] In an alternative embodiment, dedicated hardware implementations, such as application-specific
integrated circuits (ASICs), programmable logic arrays and other hardware components,
can be constructed to implement one or more of the methods described herein. One or
more embodiments described herein may implement functions using two or more specific
interconnected hardware modules or devices with related control and data signals that
can be communicated between and through the modules. Accordingly, the present disclosure
encompasses software, firmware, and hardware implementations. Nothing in the present
application should be interpreted as being implemented or implementable solely with
software and not hardware such as a tangible non-transitory microprocessor and/or
memory.
[0019] In accordance with various embodiments of the present disclosure, the methods described
herein may be implemented using a microprocessor that executes software programs.
Further, in an exemplary, non-limited embodiment, implementations can include distributed
processing, component/object distributed processing, and parallel processing.
[0020] Figure 2 shows an exemplary circuit with a microprocessor, according to an aspect
of the present disclosure. In Figure 2, the microcontroller 240 is a microprocessor
with a pin stuck for analog input. The circuit includes three resistors including
R1 202, R2 204 and R3 206. Vin is input via R1. To detect the stuck analog input pin,
an offset voltage is added to the analog input, and the input range is scaled down.
A valid range for Vin may be zero (0) to Vref. When input voltage Vin is within a
valid range, the voltage range at the analog input pin will be from Voffset1 to Vref
minus (-) Voffset2. When the analog input pin is stuck to a high level, the measured
voltage will be equal to or close to Vref. When the analog input pin is stuck to a
low level, the measured voltage will be equal or close to zero. Therefore, the microprocessor
can perform a process of checking measured voltage levels via the analog input pin,
and identifying when a pin is stuck by determining when measured voltage is at or
approximately Vref or zero.
[0021] Figure 3 shows another exemplary circuit with a microprocessor, according to an aspect
of the present disclosure. In the embodiment of Figure 3, a microcontroller 340 is
provide in a circuit with an opto-coupler 318, three resistors including R4 308, R5
310 and R6 312, a capacitor C1 320, and a transistor Q1 316.
[0022] In the embodiment of Figure 3, a digital output pin that is stuck can be detected.
When the digital output is to be set high, the microprocessor 340 will set the digital
output pin to a high level with a very narrow low level pulse. In the embodiment of
Figure 3, a narrow low level pulse is used instead of continuously setting the pin
to the high level. The microprocessor then reads back from the pin while the narrow
low level pulse is in process to detect if the digital output pin is stuck.
[0023] When the digital output is to be set low, the microprocessor 340 will set the digital
output pin to a low level with a very narrow high level pulse. In the embodiment of
Figure 3, a narrow high level pulse is used for this purpose instead of continuously
setting the pin to the low level. The microprocessor then reads back from the pin
while the narrow high level pulse is in process to detect if the digital output pin
is stuck.
[0024] Additionally, in Figure 3, an external filter circuit as shown by the circuitry around
the microprocessor 340 filters the output narrow low level pulse or output narrow
high level pulse as a hardware protection circuit to protect other hardware. Alternatively,
a circuit driven by the digital output pin can be designed in a way so as not to respond
to a narrow low level pulse.
[0025] Figure 4 shows another exemplary circuit with a microprocessor, according to an aspect
of the present disclosure. In Figure 4, wrong multiplexer addressing is detected for
an analog input pin. In Figure 4, the circuit includes four resistors including R1
402, R2 404, R5 410 and R7 414. The circuit also includes capacitor C3 and microcontroller
440
[0026] In the embodiment of Figure 4, after an analog input is converted via analog to digital
conversion, the microcontroller 440 reconfigured to analog input pin for digital output.
The microcontroller then sets the pin to either a high level or a low level depending
on the value of the received analog input. That is, the microcontroller sets the value
to be different than the received analog input.
[0027] In the embodiment of Figure 4, after setting the reconfigured digital output pin
to a level different from the value of the analog input received before the reconfiguration,
the invented method is: after completing ADC conversion, the microcontroller configures
the pin to digital output and sets the pin to high or low level. After setting the
level of the pin, the capacitor C2 is connected to the pin to maintain the voltage
for a short time, insofar as the voltage at the pin reflects the value set by the
microcontroller. The short time may be a predetermined period. During the short time,
the microcontroller is reconfigured for analog input. The reconfigured analog pin
then measures input voltage, which is the voltage maintained by the capacitor. If
the voltage follows the digital output value set by the microprocessor 440, the addressing
of the channel for the pin is correct in the analog input mode. Otherwise, the addressing
for the pin in the analog input mode is determined to be incorrect.
[0028] Figure 5 shows an exemplary process for error detection on integrated circuit input/output
pins, according to an aspect of the present disclosure. In Figure 5, an overview of
the error detection methods described herein is shown. This overview applied to multiple
different embodiments described herein.
[0029] At S505, an input/output pin of an integrated circuit is used in a first mode. This
first mode may be described, for example, as the normal mode, or the mode for which
the input/output pin is configured. At S510, a test mode starts. The test mode may
be started at S510 after each instance of using the input/output pin in the first
mode. For example, the test mode may be used after each of a set (e.g., 5) of instances
of using the input/output pin the first mode.
[0030] At S515, the input/output pin is toggled. The toggling at S515 may mark the beginning
of the test mode, or may be considered the first operation in the test mode. At S520,
the input/output pin is tested. At S525 an error is identified. After identifying
an error at S525, the process returns to S505 where the input/output pin is used in
the first mode again.
[0031] Toggling at S515 may be performed by changing a value set for the input/output pin.
Alternatively, toggling at S515 may be performed by reconfiguring the functionality
of the input/output pin, such as by reconfiguring an input/output pin being used for
analog input to a use for digital output.
[0032] Additionally, although the overview shown in Figure 5 shows the process returning
to the first mode (normal use) at S505 after identifying an error at S525, the process
may involve numerous alternative intermediate steps before returning to the first
mode (normal use). For example, the integrated circuit that contains the input/output
pin may be shut off, a circuit that contains the integrated circuit may be shut off,
or a device that contains a circuit that contains the integrated circuit may be shut
off. Additionally, an alarm or indicator warning of the error may be set to warn a
user of the error. In some circumstances, a remedial action may be taken automatically
to provide a remedy for an error, such as by sending a pulse to reset a pin. In any
event, Figure 5 is an overview of the process, and does not show details that happen
between major stages of the process described herein.
[0033] Figure 6 shows another exemplary process for error detection on integrated circuit
input/output pins, according to an aspect of the present disclosure. The embodiment
of Figure 6 corresponds to both the circuits shown in Figure 3 and in Figure 4, and
starts with using an input/output pin in a first mode at S605. At S610, a test mode
starts, and at S615 an input/output pin is toggled. At S620, a second, disparate value
from the previous setting is newly set. At S625, a resulting value is received back,
and at S630 the resulting value is measured. At S635 the error is identified based
on the actions taken from S615 to S630. Afterwards (later) the process returns to
the first mode (normal use) at S605.
[0034] Providing a second, disparate value at S620 may be performed in several different
ways. For instance, value set by a received signal may be identified, so that the
pin can be set with a different level at S620. Alternatively, a previous value set
for an input/output pin configured for output may be considered a first value, and
the second, disparate value may be set to ensure that the pin is not stuck at the
previous (first) level.
[0035] Additionally, the actions at S625 and S630 maybe performed in several different ways.
For instance, a pin may be set with a level, and then the level can be immediately
read to ensure that the pin correctly reflects the intended setting. The pin may be
set to a second, disparate level by an output pulse and then immediately read back,
or may be set to a second, disparate level and then used to charge a capacitor which
is then immediately read back. In any event, the activities at S625 and S635 are performed
using the input/output pin in question, and not two pins in these embodiments.
[0036] Figure 7 shows another exemplary process for error detection on integrated circuit
input/output pins, according to an aspect of the present disclosure. In Figure 7,
the process starts at S705 when an input/output pin is used in a first mode. At S710
the test mode starts. At S715, the input/output pin is toggled, and at S717 the pin
is set to a second, disparate value. At S720, the second value is provided via an
output pulse. In the embodiment of Figure 7, the actions at S715 to S735 are to identify
whether a pin configured for digital input is stuck at a level.
[0037] The output pulse is set very narrow, and is low level if the pin is to be set to
a high level, and is high level if the pin is to be set to a low level. At S722, the
output pulse is externally filtered. The output pulse is filtered in the manner explained
with respect to Figure 3, in order to protect other hardware in the circuit that includes
the microprocessor with the pin in question.
[0038] At S725 the set value is read back as a resulting value. At S732, the resulting value
is compared with the second value. If the resulting value is the second value (S732
= Yes), no error is identified, and the input/output pin is again used in the first
mode at S705. On the other hand, if the resulting value does not equal the second
value, then the pin is diagnosed as being stuck at the previous level.
[0039] Figure 8 shows another exemplary process for error detection on integrated circuit
input/output pins, according to an aspect of the present disclosure. In Figure 8,
an analog input is received at S802 and converted to a first value via an analog to
digital converter. At S805, the first value is read.
[0040] At S810, the test mode starts. In the test mode, at S815 the input/output pin is
reconfigured for digital output. For this embodiment, the toggling described earlier
includes this reconfiguration.
[0041] At S820, a second, disparate value is set the digital output value at the input/output
pin. At S822, the capacitor is connected to the input/output pin and charged or discharged
to maintain the voltage value of the input/output pin. As described earlier, the voltage
value of the input/output pin reflects the value set for the input/output pin.
[0042] At S824, the input/output pin is reconfigured for analog input. At S825, the voltage
level of the capacitor is measured. The measured voltage level of the capacitor is
effectively the voltage level of the input/output pin. At S830, the resulting value
is obtained from the measured voltage level. At S832, a comparison is made as to whether
the resulting level is the second value set at S820. If the resultant value is not
the second value (S832 = No) then the error is identified at S835. If the resultant
value is the second value (S832 = Yes), then there is no error and the process returns
to S802 where the analog input is received and converted via an analog to digital
converter.
[0043] After the error is identified at S835, the microprocessor may be shut down. As described
previously, a circuit that includes the microprocessor maybe shut down, or a device
that includes such a circuit may even be shut down. Additionally, while a computer-readable
medium is described generally as a single medium, the term "computer-readable medium"
includes a single medium or multiple media that store one or more sets of instructions.
The term "computer-readable medium" shall also include any medium that is capable
of storing, encoding or carrying a set of instructions for execution by a microprocessor
or that cause a computer system to perform any one or more of the methods or operations
disclosed herein.
[0044] Although the present specification describes components and functions that may be
implemented in particular embodiments with reference to particular standards and protocols,
the disclosure is not limited to such standards and protocols. For example, standards
such as UL 60730 represent examples of the state of the art. Such standards are periodically
superseded by more efficient equivalents having essentially the same functions. Accordingly,
replacement standards and protocols having the same or similar functions are considered
equivalents thereof.
[0045] The illustrations of the embodiments described herein are intended to provide a general
understanding of the structure of the various embodiments. The illustrations are not
intended to serve as a complete description of all of the elements and features of
the disclosure described herein. Many other embodiments may be apparent to those of
skill in the art upon reviewing the disclosure. Other embodiments may be utilized
and derived from the disclosure, such that structural and logical substitutions and
changes may be made without departing from the scope of the disclosure. Additionally,
the illustrations are merely representational and may not be drawn to scale. Certain
proportions within the illustrations may be exaggerated, while other proportions may
be minimized. Accordingly, the disclosure and the figures are to be regarded as illustrative
rather than restrictive.
[0046] One or more embodiments of the disclosure may be referred to herein, individually
and/or collectively, by the term "invention" merely for convenience and without intending
to voluntarily limit the scope of this application to any particular invention or
inventive concept. Moreover, although specific embodiments have been illustrated and
described herein, it should be appreciated that any subsequent arrangement designed
to achieve the same or similar purpose may be substituted for the specific embodiments
shown. This disclosure is intended to cover any and all subsequent adaptations or
variations of various embodiments. Combinations of the above embodiments, and other
embodiments not specifically described herein, will be apparent to those of skill
in the art upon reviewing the description.
[0047] According to an aspect of the present disclosure, a method for detecting error on
an input/output (IO) pin of an integrated circuit includes using the input/output
pin of the integrated circuit in a first mode by receiving or sending a first value
as analog data or digital data. The method also includes toggling the input/output
pin in a test mode after instances of using the input/output pin in the first mode.
The test mode includes providing a second value disparate from the first value during
a set time after using the input/output pin in the first mode, receiving back during
the set time a resulting value based on providing the second value, measuring the
resulting value, and identifying an error on the input/output pin of the integrated
circuit based on the measured resulting value.
[0048] According to another aspect of the present disclosure, the method includes outputting
a pulse to provide the second value as an output pulse value at an output of the integrated
circuit in the test mode. The method also includes reading the output pulse internally
to receive back the resulting value by obtaining the output pulse value, measuring
the output pulse value as the measured resulting value; and comparing the output pulse
value read from the output with the second value. The identified error is identified
based on the comparing.
[0049] According to still another aspect of the present disclosure the using the input/output
pin in the first mode includes reading the first value from a first received analog
input from the input/output pin after conversion by an analog to digital converter.
The toggling in the test mode includes reconfiguring the input/output pin first for
digital output in the test mode after receiving the first received analog input. The
providing includes setting the second value as a digital output value for output from
the input/output pin reconfigured for digital output in the test mode during the set
time. The method also includes charging or discharging a capacitor at the input/output
pin reconfigured for digital output in the test mode to maintain a voltage level after
setting the second value as the digital output value during the set time. The method
also includes reconfiguring the input/output pin second for analog input again in
the test mode after setting the second value as the digital output value during the
set time. The voltage level is measured at the input/output pin to obtain the measured
resulting value after conversion by the analog to digital converter. The measured
resulting value obtained from the input/output pin is compared with the second value.
The identified error is identified based on the comparing.
[0050] According to yet another aspect of the present disclosure, the integrated circuit
includes a microcontroller used to control a light emitting diode driving circuit.
[0051] According to another aspect of the present disclosure, the light emitting diode driving
circuit complies with class 2 requirements for light emitting diodes. The microcontroller
complies with an Underwriter Laboratories 60730 standard.
[0052] According to still another aspect of the present disclosure, the identified error
indicates that the input/output pin is stuck in a HIGH level or a LOW level when the
input/output pin is used as a digital output pin. Pulses are used to set the input/output
pin to an opposite level.
[0053] According to yet another aspect of the present disclosure, the method includes setting
the input/output pin to the HIGH level from a LOW level using one of the pulses,
reading back the resulting value, and identifying that the input/output pin is stuck
in the LOW level based on the resulting value.
[0054] According to another aspect of the present disclosure, the method includes
setting the input/output pin to the LOW level from a HIGH level using one of the pulses,
reading back the resulting value; and identifying that the input/output pin is stuck
in the HIGH level based on the measured resulting value.
[0055] According to still another aspect of the present disclosure, the identified error
indicates that analog input multiplexer addressing is erroneous.
[0056] According to yet another aspect of the present disclosure, the method includes converting
the first received analog input and the measured voltage level to digital output using
the analog to digital converter; and setting the input/output pin reconfigured first
for digital output to a HIGH level or a LOW level. The capacitor is connected to the
input/output pin reconfigured for digital output to maintain the voltage level during
the set time.
[0057] According to another aspect of the present disclosure, the method includes determining
whether the measured voltage level at the input/output pin maintained by the capacitor
indicates that the input/output pin is set to the HIGH level or the LOW level. The
method also includes identifying an analog input multiplexer addressing error based
on the determination and the comparing.
[0058] According to an aspect of the present disclosure, a light emitting diode driving
circuit includes a primary control section and an output section isolated from the
primary control section. The output section includes a microprocessor that is operable
to execute instructions to detect errors on an input/output (IO) pin of the microprocessor.
When executed by the microprocessor, the instructions cause the light emitting diode
driving circuit to perform a process that includes using the input/output pin of the
microprocessor in a first mode by receiving or sending a first value as analog data
or digital data. The process also includes toggling the input/output pin in a test
mode after instances of using the input/output pin in the first mode. The test mode
includes providing a second value disparate from the first value during a set time
after using the input/output pin in the first mode, receiving back during the set
time a resulting value based on providing the second value, measuring the resulting
value, and identifying an error on the input/output pin of the microprocessor based
on the measured resulting value.
[0059] According to another aspect of the present disclosure, the first mode is a mode in
which the microprocessor is primarily used.
[0060] According to still another aspect of the present disclosure, the input/output pin
is configured for digital output, and the toggling includes changing a level of the
input/output pin configured for digital output to a HIGH level or a LOW level based
on the second value.
[0061] According to still another aspect of the present disclosure, the input/output pin
is configured for analog input in the first mode, and the toggling comprises reconfiguring
the input/output pin from being configured for analog input to being configured for
digital output.
1. A method for detecting error on an input/output pin of an integrated circuit by a
microprocessor of said integrated circuit, the input/output pin of the integrated
circuit being linked to an input node and to an input/output node of the microprocessor,
wherein the input node receives in input mode an input signal (Vin) through at least
one resistor (R1, 202, 402) and wherein the input node is connected to a reference
voltage (Vref) through a second resistor (R2, 204, 404) and to zero volt through a
third resistor (R3, 206, R5, 410), the method comprising:
using (S505, S605, S805) the input/output pin of the integrated circuit in input mode
by receiving a first value as analog data or digital data; and
toggling (S510, S610, S810) the input/output pin of the integrated circuit in a test
mode after each of a plurality of instances of using the input/output pin of the integrated
circuit in the input mode,
wherein the test mode comprises using the input/output pin of the integrated circuit
as an output (S515, S615, S815) providing a second value (S520, S620, S820) disparate
from the first value during a set time after using the input/output pin of the integrated
circuit in the input mode, receiving back (S520, S625, S822, S824) during the set
time a resulting value based on providing the second value, measuring the resulting
value (S630, S825), and identifying an error (S525, S635, S835) on the input/output
pin of the integrated circuit based on the measured resulting value.
2. The method of claim 1, further comprising:
outputting a pulse to provide the second value as an output pulse value at the input/output
pin of the integrated circuit used as output of the integrated circuit in the test
mode;
reading the output pulse internally to receive back the resulting value by obtaining
the output pulse value;
measuring the output pulse value as the measured resulting value; and
comparing the output pulse value read from the output with the second value,
wherein the identified error is identified based on the comparing.
3. The method of claim 1,
wherein the using the input/output pin of the integrated circuit in the first mode
comprises reading the first value from a first received analog input from the input/output
pin of the integrated circuit after conversion by an analog to digital converter;
wherein the toggling in the test mode comprises reconfiguring the input/output pin
of the integrated circuit first for digital output in the test mode after receiving
the first received analog input; and wherein the providing comprises setting the second
value as a digital output value for output from the input/output pin of the integrated
circuit reconfigured for digital output in the test mode during the set time;
wherein the method further comprises:
charging or discharging a capacitor at the input/output pin of the integrated circuit
reconfigured for digital output in the test mode to maintain a voltage level after
setting the second value as the digital output value during the set time;
reconfiguring the input/output pin of the integrated circuit second for analog input
again in the test mode after setting the second value as the digital output value
during the set time;
measuring the voltage level at the input/output pin of the integrated circuit to obtain
the measured resulting value after conversion by the analog to digital converter,
and
comparing the measured resulting value obtained from the input/output pin of the integrated
circuit with the second value,
wherein the identified error is identified based on the comparing.
4. The method of claim 1, wherein the integrated circuit comprises a microcontroller,
used to control a light emitting diode driving circuit.
5. The method of claim 4,
wherein the light emitting diode driving circuit complies with class 2 requirements
for light emitting diodes, and
wherein the microcontroller complies with an Underwriter Laboratories 60730 standard.
6. The method of claim 3,
wherein the identified error indicates that analog input multiplexer addressing is
erroneous.
7. The method of claim 6, further comprising:
converting the first received analog input and the measured voltage level to digital
output using the analog to digital converter; and
setting the input/output pin of the integrated circuit reconfigured first for digital
output to a HIGH level or a LOW level,
wherein the capacitor is connected to the input/output pin of the integrated circuit
reconfigured for digital output to maintain the voltage level during the set time.
8. The method of claim 7, further comprising:
determining whether the measured voltage level at the input/output pin of the integrated
circuit maintained by the capacitor indicates that the input/output pin is set to
the HIGH level or the LOW level, and
identifying an analog input multiplexer addressing error based on the determination
and the comparing.
9. A control circuit for a light emitting diode driving circuit, the control circuit
being comprised in an integrated circuit,
- wherein the integrated circuit includes the light emitting diode driving circuit
and the control circuit comprises a microprocessor operable to execute instructions
to detect errors on an input/output pin of the integrated circuit, the input/output
pin of the integrated circuit being linked to an input node and to an input/output
pin of the microprocessor,
- a first resistor (R1, 202, 402) connected to the input node and receiving an input
signal (Vin) in an input mode,
- a second resistor (R2, 204, 404) connected between a reference voltage (Vref) and
the input node
- a third resistor (R3, 206, R5, 410) connected between a zero voltage and the input
node, wherein, when executed by the microprocessor, the instructions cause the light
emitting diode driving circuit to perform a process comprising:
using the input/output pin of the integrated circuit in the input mode by receiving
a first value as analog data or digital data; and
toggling the input/output pin of the integrated circuit in a test mode after each
of a plurality of instances of using the input/output pin of the integrated circuit
in the first mode, wherein the test mode comprises using the input/output pin of the
integrated circuit as an output providing a second value disparate from the first
value during a set time after using the input/output pin of the integrated circuit
in the input mode, receiving back during the set time a resulting value based on providing
the second value, measuring the resulting value, and identifying an error on the input/output
pin of the microprocessor based on the measured resulting value.
10. The control circuit of claim 9,
wherein the input mode is a mode in which the integrated circuit is primarily used.
11. The control circuit of claim 9,
wherein the input/output pin of the integrated circuit is configured for analog input
in the first mode, and
wherein the toggling comprises reconfiguring the input/output pin of the integrated
circuit from being configured for analog input to being configured for digital output.
12. The control circuit of claim 9, wherein the control circuit further comprises a fourth
resistor (R7, 422) linking the input/output pin of the integrated circuit to the input
node.
13. The control circuit of claim 9, wherein the control circuit further comprises a capacitor
(C2, 422) connected in parallel with the third resistor (R5, 410).
14. The control circuit of claim 9, wherein said control circuit is in an output section
of the light emitting diode driving circuit and the light emitting driving circuit
has a primary control section and the output section isolated from the primary control
section.
1. Verfahren zum Detektieren eines Fehlers auf einem Eingangs-/Ausgangspin einer integrierten
Schaltung durch einen Mikroprozessor dieser integrierten Schaltung, wobei der Eingangs-/Ausgangspin
der integrierten Schaltung mit einem Eingangsknoten und mit einem Eingangs-/Ausgangsknoten
des Mikroprozessors verbunden ist, wobei der Eingangsknoten im Eingangsmodus ein Eingangssignal
(Vin) durch mindestens einen Widerstand (R1, 202, 402) empfängt, und wobei der Eingangsknoten
an eine Referenzspannung (Vref) durch einen zweiten Widerstand (R2, 204, 404) und
an null Volt durch einen dritten Widerstand (R3, 206, R5, 410) angeschlossen ist,
wobei das Verfahren beinhaltet, dass:
der Eingangs-/Ausgangspin der integrierten Schaltung im Eingangsmodus durch Empfangen
eines ersten Wertes als Analogdaten oder Digitaldaten verwendet wird (S505, S605,
S805); und
der Eingangs-/Ausgangspin der integrierten Schaltung nach jeder mehrerer Instanzen
der Verwendung des Eingangs-/Ausgangspins der integrierten Schaltung in dem Eingangsmodus
in einem Testmodus getoggelt wird (S510, S610, S810),
wobei der Testmodus das Verwenden des Eingangs-/Ausgangspins der integrierten Schaltung
als einen Ausgang (S515, S615, S815), das Bereitstellen eines von dem ersten Wert
verschiedenen zweiten Wertes (S520, S620, S820) während einer vorgegebenen Zeit nach
Verwenden des Eingangs-/Ausgangspins der integrierten Schaltung in dem Eingangsmodus,
das Zurückerhalten (S520, S625, S822, S824) eines sich aufgrund des Bereitstellens
des zweiten Wertes ergebenden Wertes während der vorgegebenen Zeit, das Messen (S630,
S825) des sich ergebenden Wertes sowie das Identifizieren (S525, S635, S835) eines
Fehlers auf dem Eingangs-/Ausgangspin der integrierten Schaltung aufgrund des gemessenen
resultierenden Wertes beinhaltet.
2. Verfahren nach Anspruch 1, das weiterhin beinhaltet, dass:
ein Impuls abgegeben wird, um den zweiten Wert als einen Ausgangsimpulswert an dem
Eingangs-/Ausgangspin der integrierten Schaltung, der als Ausgabe der integrierten
Schaltung in dem Testmodus verwendet wird, bereitzustellen;
der Ausgangimpuls intern gelesen wird, um den sich ergebenden Wert durch Erhalten
des Ausgangsimpulswertes zurückzuerhalten;
der Ausgangsimpulswert als der gemessene resultierende Wert gemessen wird; und
der aus der Ausgabe ausgelesene Ausgangsimpulswert mit dem zweiten Wert verglichen
wird,
wobei der identifizierte Fehler aufgrund des Vergleichens identifiziert wird.
3. Verfahren nach Anspruch 1,
wobei die Verwendung des Eingangs-/Ausgangspins der integrierten Schaltung in dem
ersten Modus das Auslesen des ersten Wertes aus einer ersten empfangenen Analogeingabe
von dem Eingangs-/Ausgangspin der integrierten Schaltung nach Umwandlung durch einen
Analog-Digital-Wandler umfasst;
wobei das Toggling in dem Testmodus das Rekonfigurieren des Eingangs-/Ausgangspins
der integrierten Schaltung zuerst für Digitalausgabe in dem Testmodus nach Empfangen
der ersten empfangenen Analogeingabe umfasst; und
wobei das Bereitstellen das Festlegen des zweiten Wertes als einen digitalen Ausgangswert
zur Ausgabe von dem Eingangs-/Ausgangspin der integrierten Schaltung, der zur Digitalausgabe
in dem Testmodus während der vorgegebenen Zeit rekonfiguriert wurde, umfasst;
wobei das Verfahren weiterhin beinhaltet, dass:
ein Kondensator an dem zur Digitalausgabe in dem Testmodus rekonfigurierten Eingangs-/Ausgangspin
der integrierten Schaltung geladen oder entladen wird, um einen Spannungspegel nach
Festsetzen des zweiten Wertes als den digitalen Ausgangswert während der vorgegebenen
Zeit aufrechtzuerhalten;
der Eingangs-/Ausgangspin der integrierten Schaltung zweitens für Analogeingabe in
dem Testmodus nach Festlegen des zweiten Wertes als den digitalen Ausgangswert während
der vorgegebenen Zeit erneut rekonfiguriert wird;
der Spannungspegel an dem Eingangs-/Ausgangspin der integrierten Schaltung gemessen
wird, um den gemessenen resultierenden Wert nach Umwandlung durch den Analog-Digital-Wandler
zu erhalten, und
der gemessene resultierende Wert, der von dem Eingangs-/Ausgangspin der integrierten
Schaltung erhalten wird, mit dem zweiten Wert verglichen wird,
wobei der identifizierte Fehler aufgrund des Vergleichens identifiziert wird.
4. Verfahren nach Anspruch 1, wobei die integrierte Schaltung einen Mikrocontroller umfasst,
der zur Steuerung einer Leuchtdioden-Ansteuerungsschaltung verwendet wird.
5. Verfahren nach Anspruch 4,
wobei die Leuchtdioden-Ansteuerungsschaltung auf Klasse 2 anwendbare Anforderungen
für lichtemittierende Dioden erfüllt, und
wobei der Mikrocontroller einem ,Underwriter Laboratories 60730'-Standard entspricht.
6. Verfahren nach Anspruch 3,
wobei der identifizierte Fehler signalisiert, dass die Adressierung des Multiplexers
mit Analogeingang fehlerhaft ist.
7. Verfahren nach Anspruch 6, das weiterhin beinhaltet, dass:
die erste empfangene Analogeingabe und der gemessene Spannungspegel unter Verwendung
des Analog-Digital-Wandlers in eine Digitalausgabe umgewandelt werden; und
der zuerst zur Digitalausgabe rekonfigurierte Eingangs-/Ausgangspin der integrierten
Schaltung auf einen HIGH-Level oder einen LOW-Level gesetzt wird,
wobei der Kondensator mit dem zur Digitalausgabe rekonfigurierten Eingangs-/Ausgangspin
der integrierten Schaltung verbunden wird, um den Spannungspegel während der vorgegebenen
Zeit aufrechtzuerhalten.
8. Verfahren nach Anspruch 7, das weiterhin beinhaltet, dass:
ermittelt wird, ob der durch den Kondensator aufrechterhaltene gemessene Spannungspegel
an dem Eingangs-/Ausgangspin der integrierten Schaltung signalisiert, dass der Eingangs-/Ausgangspin
auf den HIGH-Level oder den LOW-Level gesetzt ist, und
ein Fehler der Adressierung des Multiplexers mit Analogeingang aufgrund der Ermittlung
und des Vergleichens identifiziert wird.
9. Steuerschaltkreis für eine Leuchtdioden-Ansteuerungsschaltung, wobei der Steuerschaltkreis
in einer integrierten Schaltung enthalten ist,
- wobei die integrierte Schaltung eine Leuchtdioden -Ansteuerungsschaltung enthält
und der Steuerschaltkreis umfasst: einen Mikroprozessor, der so eingerichtet ist,
dass er Anweisungen zum Detektieren von Fehlern auf einem Eingangs-/Ausgangspin der
integrierten Schaltung ausführt, wobei der Eingangs-/Ausgangspin der integrierten
Schaltung mit einem Eingangsknoten und einem Eingangs-/Ausgangspin des Mikroprozessors
verbunden ist,
- einen ersten Widerstand (R1, 202, 402), der mit dem Eingangsknoten verbunden ist
und ein Eingangssignal (Vin) in einem Eingangsmodus empfängt,
- einen zweiten Widerstand (R2, 204, 404), der zwischen einer Referenzspannung (Vref)
und dem Eingangsknoten geschaltet ist,
- einen dritten Widerstand (R2, 206, R5, 410), der zwischen einer Nullspannung und
dem Eingangsknoten geschaltet ist,
wobei die Anweisungen bei Ausführung durch den Mikroprozessor die Leuchtdioden-Ansteuerungsschaltung
veranlassen, einen Prozess auszuführen, wonach:
der Eingangs-/Ausgangspin der integrierten Schaltung in dem Eingangsmodus durch Empfangen
eines ersten Wertes als Analogdaten oder Digitaldaten verwendet wird; und
der Eingangs-/Ausgangspin der integrierten Schaltung nach jeder mehrerer Instanzen
der Verwendung des Eingangs-/Ausgangspins der integrierten Schaltung in dem ersten
Modus in einem Testmodus getoggelt wird,
wobei der Testmodus das Verwenden des Eingangs-/Ausgangspins der integrierten Schaltung
als einen Ausgang, das Bereitstellen eines von dem ersten Wert verschiedenen zweiten
Wertes während einer vorgegebenen Zeit nach Verwenden des Eingangs-/Ausgangspins der
integrierten Schaltung in dem Eingangsmodus, das Zurückerhalten eines sich aufgrund
des Bereitstellens des zweiten Wertes ergebenden Wertes während der vorgegebenen Zeit,
das Messen des sich ergebenden Wertes sowie das Identifizieren eines Fehlers auf dem
Eingangs-/Ausgangspin des Mikroprozessors aufgrund des gemessenen resultierenden Wertes
beinhaltet.
10. Steuerschaltkreis nach Anspruch 9,
wobei der Eingangsmodus ein Modus ist, in dem die integrierte Schaltung primär verwendet
wird.
11. Steuerschaltkreis nach Anspruch 9,
wobei der Eingangs-/Ausgangspin der integrierten Schaltung zur Analogeingabe in dem
ersten Modus konfiguriert ist, und
wobei das Toggling das Rekonfigurieren des Eingangs-/Ausgangspins der integrierten
Schaltung von dem Konfigurieren für Analogeingabe auf das Konfigurieren für Digitalausgabe
umfasst.
12. Steuerschaltkreis nach Anspruch 9, wobei der Steuerschaltkreis weiterhin einen vierten
Widerstand (R7, 422) umfasst, der den Eingangs-/Ausgangspin der integrierten Schaltung
mit dem Eingangsknoten verbindet.
13. Steuerschaltkreis nach Anspruch 9, wobei der Steuerschaltkreis weiterhin einen Kondensator
(C2, 422) umfasst, der parallel zu dem dritten Widerstand (R5, 410) geschaltet ist.
14. Steuerschaltkreis nach Anspruch 9, wobei sich dieser Steuerschaltkreis in einem Ausgangsteil
der Leuchtdioden-Ansteuerungsschaltung befindet und die Leuchtdioden-Ansteuerungsschaltung
einen primären Steuerteil aufweist und der Ausgangsteil von dem primären Steuerteil
isoliert ist.
1. Procédé pour détecter une erreur sur une broche d'entrée/sortie d'un circuit intégré
par un microprocesseur dudit circuit intégré, la broche d'entrée/sortie du circuit
intégré étant reliée à un nœud d'entrée et à un nœud d'entrée/sortie du microprocesseur,
dans lequel le nœud d'entrée reçoit, dans un mode d'entrée, un signal d'entrée (Vin)
à travers au moins une résistance (R1, 202, 402) et dans lequel le nœud d'entrée est
connecté à une tension de référence (Vref) à travers une deuxième résistance (R2,
204, 404) et à zéro volt à travers une troisième résistance (R3, 206, R5, 410), le
procédé comprenant :
l'utilisation (S505, S605, S805) de la broche d'entrée/sortie du circuit intégré dans
un mode d'entrée en recevant la première valeur en tant que donnée analogique ou donnée
numérique ; et
la commutation (S510, S610, S810) de la broche d'entrée/sorte du circuit intégré dans
un mode de test après chacune parmi une pluralité d'instances d'utilisation de la
broche d'entrée/sortie du circuit intégré dans le mode d'entrée,
dans lequel le mode de test comprend l'utilisation de la broche d'entrée/sortie du
circuit intégré en tant que sortie (S515, S615, S815) fournissant une seconde valeur
(S520, S620, S820) différente de la première valeur pendant une durée définie après
l'utilisation de la broche d'entrée/sortie du circuit intégré dans le mode d'entrée,
la réception en retour (S520, S625, S822, S824), pendant la durée définie, d'une valeur
résultante sur la base de la fourniture de la seconde valeur, la mesure de la valeur
résultante (S630, S825), et l'identification d'une erreur (S525, S635, S835) sur la
broche d'entrée/sortie du circuit intégré sur la base de la valeur résultante mesurée.
2. Procédé selon la revendication 1, comprenant en outre :
la sortie d'une impulsion pour fournir la seconde valeur en tant que valeur d'impulsion
de sortie au niveau de la broche d'entrée/sortie utilisée en tant que sortie du circuit
intégré dans le mode test ;
la lecture de l'impulsion de sortie en interne pour recevoir en retour la valeur résultante
en obtenant la valeur d'impulsion résultante ;
la mesure de la valeur d'impulsion résultante en tant que valeur résultante mesurée
; et
la comparaison de la valeur d'impulsion d'entrée lue à partie de la sortie avec la
seconde valeur,
dans lequel l'erreur identifiée est identifiée sur la base de la comparaison.
3. Procédé selon la revendication 1,
dans lequel l'utilisation de la broche d'entrée/sortie du circuit intégré dans le
premier mode comprend la lecture de la première valeur à partir d'une première entrée
analogique de la broche d'entrée/sortie du circuit intégré après conversion par un
convertisseur analogique-numérique ;
dans lequel la commutation dans le mode test comprend la reconfiguration de la broche
d'entrée/sortie du circuit intégré en premier lieu pour une sortie numérique dans
le mode test après réception de la première entrée analogique reçue ; et
dans lequel la fourniture comprend la définition de la seconde valeur en tant que
valeur de sortie numérique pour une sortie à partir de la broche d'entrée/sortie du
circuit intégré reconfigurée pour une sortie numérique dans le mode test pendant la
durée définie ;
dans lequel le procédé comprenant en outre :
le chargement ou le déchargement d'un condensateur au niveau de la broche d'entrée/sortie
du circuit intégré reconfigurée pour une sortie numérique dans le mode test pour maintenir
un niveau de tension après la définition de la seconde valeur en tant que valeur de
sortie numérique pendant la durée définie ;
la reconfiguration de la broche d'entrée/sortie du circuit intégré, en second lieu,
pour une entrée analogique, à nouveau dans le mode test, après la définition de la
seconde valeur en tant que valeur de sortie numérique pendant la durée définie ;
la mesure du niveau de tension au niveau de la broche d'entrée/sortie du circuit intégré
pour obtenir la valeur résultante mesurée après la conversion par le convertisseur
analogique-numérique, et
la comparaison de la valeur résultante mesurée obtenue à partir de la broche d'entrée/sortie
du circuit intégré avec la seconde valeur,
dans lequel l'erreur identifiée est identifiée sur la base de la comparaison.
4. Procédé selon la revendication 1, dans lequel le circuit intégré comprend une microcommande,
utilisée pour commander un circuit d'attaque pour diode photoémettrice.
5. Procédé selon la revendication 4,
dans lequel le circuit d'attaque pour diode photoémettrice est conforme aux exigences
de classe 2 relatives aux diodes photoémettrices, et
dans lequel la microcommande est conforme à une norme 60730 de Underwriter Laboratories.
6. Procédé selon la revendication 3,
dans lequel l'erreur identifiée indique que l'adressage au multiplexeur d'entrée analogique
est erroné.
7. Procédé selon la revendication 6, comprenant en outre :
la conversion de la première entrée analogique reçue et du niveau de tension mesurée
en sortie numérique en utilisant le convertisseur analogique-numérique ; et
la définition du fait que la broche d'entrée/sortie du circuit intégré doit être reconfigurée
en premier lieu pour une sortie numérique à un HAUT niveau ou un niveau BAS,
dans lequel le condensateur est connecté à la broche d'entrée/sortie du circuit intégré
reconfiguré pour une sortie numérique pour maintenir le niveau de tension pendant
la durée définie.
8. Procédé selon la revendication 7, comprenant en outre :
la détermination du fait que le niveau de tension mesuré au niveau de la broche d'entrée/sortie
du circuit intégré maintenu par le condensateur indique ou non que la broche d'entrée/sortie
est définie pour être sur le HAUT niveau ou le niveau BAS, et
l'identification d'une erreur d'adressage au multiplexeur d'entrée analogique sur
la base de la détermination et de la comparaison.
9. Circuit de commande pour un circuit d'attaque pour diode photoémettrice, le circuit
de commande étant compris dans un circuit intégré,
- dans lequel le circuit intégré inclut le circuit d'attaque pour diode photoémettrice
et le circuit de commande comprend un microprocesseur qui peut intervenir pour exécuter
des instructions pour détecter des erreurs sur une broche d'entrée/sortie du circuit
intégré, la broche d'entrée/sortie du circuit intégré étant reliée à un nœud d'entrée
et à une broche d'entrée/sortie du microprocesseur,
- une première résistance (R1, 202, 402) connectée au nœud d'entrée et recevant un
signal d'entrée (Vin) dans un mode d'entrée,
- une deuxième résistance (R2, 204, 404) connectée entre une tension de référence
(Vref) et le nœud d'entrée
- une troisième résistance (R3, 206, R5, 410) connectée entre une tension nulle et
le nœud d'entrée,
dans lequel, lorsqu'elles sont exécutées par le microprocesseur, les instructions
amènent le circuit d'attaque pour diode photoémettrice à effectuer un processus comprenant
:
l'utilisation de la broche d'entrée/sortie du circuit intégré dans le mode d'entrée
en recevant la première valeur en tant que donnée analogique ou donnée numérique ;
et
la commutation de la broche d'entrée/sorte du circuit intégré dans un mode de test
après chacune parmi une pluralité d'instances d'utilisation de la broche d'entrée/sortie
du circuit intégré dans le premier mode,
dans lequel le mode de test comprend l'utilisation de la broche d'entrée/sortie du
circuit intégré en tant que sortie fournissant une seconde valeur différente de la
première valeur pendant une durée définie après l'utilisation de la broche d'entrée/sortie
du circuit intégré dans le mode d'entrée, la réception en retour, pendant la durée
définie, d'une valeur résultante sur la base de la fourniture de la seconde valeur,
la mesure de la valeur résultante, et l'identification d'une erreur sur la broche
d'entrée/sortie du microprocesseur sur la base de la valeur résultante mesurée.
10. Circuit de commande selon la revendication 9,
dans lequel le mode d'entrée est un mode dans lequel le circuit intégré est principalement
utilisé.
11. Circuit de commande selon la revendication 9,
dans lequel la broche d'entrée/sortie du circuit intégré est configurée pour une entrée
analogique dans le premier mode,
et
dans lequel la commutation comprend la reconfiguration de la broche d'entrée/sortie
d'une
configuration pour une entrée analogique vers une configuration pour une sortie numérique.
12. Circuit de commande selon la revendication 9, dans lequel le circuit de commande comprend
en outre une quatrième résistance (R7, 422) reliant la broche d'entrée/sortie du circuit
intégré au nœud d'entrée.
13. Circuit de commande selon la revendication 9, dans lequel le circuit de commande comprend
en outre un condensateur (C2, 422) connecté en parallèle avec la troisième résistance
(R5, 410).
14. Circuit de commande selon la revendication 9, dans lequel ledit circuit de commande
est dans une section de sortie du circuit d'attaque pour diode photoémettrice et le
circuit d'attaque pour diode photoémettrice présente une section de commande principale
et la section de sortie isolée de la section de commande principale.