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<ep-patent-document id="EP81109013B1" file="EP81109013NWB1.xml" lang="en" country="EP" doc-number="0056093" kind="B1" date-publ="19870311" status="n" dtd-version="ep-patent-document-v1-1">
<SDOBI lang="en"><B000><eptags><B001EP>......DE....FRGB........NL........................</B001EP><B005EP>M</B005EP><B007EP>DIM360   - Ver 2.5 (21 Aug 1997)
 2100000/0</B007EP></eptags></B000><B100><B110>0056093</B110><B120><B121>EUROPEAN PATENT SPECIFICATION</B121></B120><B130>B1</B130><B140><date>19870311</date></B140><B190>EP</B190></B100><B200><B210>81109013.3</B210><B220><date>19811027</date></B220><B240></B240><B250>en</B250><B251EP>en</B251EP><B260>en</B260></B200><B300><B310>1044/81</B310><B320><date>19810109</date></B320><B330><ctry>JP</ctry></B330></B300><B400><B405><date>19870311</date><bnum>198711</bnum></B405><B430><date>19820721</date><bnum>198229</bnum></B430><B450><date>19870311</date><bnum>198711</bnum></B450><B451EP><date>19860415</date></B451EP></B400><B500><B510><B516>4</B516><B511> 4H 05K   3/42   A</B511><B512> 4H 05K   3/18   B</B512></B510><B540><B541>de</B541><B542>Verfahren zur Herstellung einer gedruckten Schaltungsplatte</B542><B541>en</B541><B542>Process for producing a printed circuit board</B542><B541>fr</B541><B542>Procédé de fabrication d'une plaquette à circuit imprimé</B542></B540><B560></B560></B500><B700><B710><B711><snm>KABUSHIKI KAISHA TOSHIBA</snm><iid>00213130</iid><irf>35 789 a/schö</irf><syn>TOSHIBA, KABUSHIKI KAISHA</syn><adr><str>72, Horikawa-cho,
Saiwai-ku</str><city>Kawasaki-shi,
Kanagawa-ken 210</city><ctry>JP</ctry></adr></B711></B710><B720><B721><snm>Takahashi, Katsuhiro</snm><adr><str>40, Naka Shinden
Nabekura</str><city>Hanamaki-shi
Iwate-ken</city><ctry>JP</ctry></adr></B721><B721><snm>Ikari, Kunihiro</snm><adr><str>3-10, Mabori-kaigan 2-chome</str><city>Yokosuka-shi
Kanagawa-ken</city><ctry>JP</ctry></adr></B721></B720><B740><B741><snm>Lehn, Werner, Dipl.-Ing.</snm><sfx>et al</sfx><iid>00007471</iid><adr><str>Hoffmann  Eitle,
Patent- und Rechtsanwälte,
Postfach 81 04 20</str><city>81904 München</city><ctry>DE</ctry></adr></B741></B740></B700><B800><B840><ctry>DE</ctry><ctry>FR</ctry><ctry>GB</ctry><ctry>NL</ctry></B840><B880><date>19840314</date><bnum>198411</bnum></B880></B800></SDOBI><!-- EPO <DP n="1"> --><!-- EPO <DP n="2"> -->
<description id="desc" lang="en">
<p id="p0001" num="0001">The present invention relates to a process for producing a printed circuit board, and particularly to an improvement of a process for producing a printed circuit board wherein a conductive circuit is directly formed on an insulating substrate by non-electrolytic plating.</p>
<p id="p0002" num="0002">In recent years, there has been developed an art for producing a printed circuit board by directly and selectively depositing catalytically active metal particles on a substrate by a photochemical reaction and then immersing the substrate in a non-electrolytic plating solution to form a circuit conductor only at portions where the metal particles are precipitated (this art will hereinafter be referred to as "photo-forming"), without using a copper clad laminated board, an etching resist, a plating resist or a catalyst-containing substrate.</p>
<p id="p0003" num="0003">This photo-forming method comprises forming on the entire insulating substrate having a through hole, a light sensitive material layer which contains a metal capable of constituting catalytic nuclei for non-electrolytic plating, in a reducible oxidized state and a light sensitive substance (i.e. a light sensitive reducing agent) capable of forming a reducing agent upon absorption of radiant energy, then selectively exposing portions expected to form a circuit, thereby to reductively precipitate metal particles which are catalytically active for the non-electrolytic plating, and then immersing thus treated substrate in a non electrolytic plating solution to form a circuit conductor on the portion where the metal particles are precipitated (U.S. Patent No. 3,772,078).</p>
<p id="p0004" num="0004">A typical example of this method will be described as follows:
<ul id="ul0001" list-style="none">
<li>a) An insulating substrate having a through hole is coated on its surface and on the inner wall surface of the through hole, with an aqueous light sensitive solution containing a light sensitive reducing agent composition (such as a copper salt) and a surface active agent, and then dried.</li>
<li>b) A negative film is directly overlaid on this substrate, and exposure is conducted by a ultraviolet ray thereby to precipitate metal particles such as copper, which constitute catalytic nuclei for plating.</li>
<li>c) After removing the negative film, non-reacted light sensitive material remaining on the surface of the substrate is washed off with water.</li>
<li>d) The substrate is immersed in a non-electrolytic plating solution and plating copper is precipitated on the metal particles, whereby a conductor circuit is obtained.</li>
</ul></p>
<p id="p0005" num="0005">A similar method for fabricating a printed circuit board is disclosed in U.S. Patent No. 4 085 285 but in which the use of a light sensitive reducing agent is omitted. Another step is included instead, which involves the depositing of fine particles of a light sensitive metal oxide semiconductor on at least the inner wall surface of a through hole.</p>
<p id="p0006" num="0006">In the production of a printed circuit board by such photo-forming methods, there is a drawback that non-plated fine portions (hereinafter referred to as "plating voids") will be left on the inner surface of the through hole, and the reliability of the electric connection of the through hole will thereby be impaired, although there is no problem for the formation of the circuit on the flat surface of the substrate.</p>
<p id="p0007" num="0007">The present invention is intended to eliminate such a drawback inherent to the conventional photo-forming method, and it is an object of the present invention to provide a process for producing a printed circuit board, whereby it is possible to effectively carry out the formation of a circuit at the through hole portion, thereby ensuring the reliability of the electric connection of the through hole portion of the circuit board.</p>
<p id="p0008" num="0008">From a study of the cause for the formation of plating voids at the through hole portion in the production of a printed circuit board according to the conventional photo-forming method, it has been found that the formation of plating voids are based on the following cause. Namely, even when a light is radiated from both sides of the insulating substrate, no adequate light will reach the inside of a bore constituting the through hole which is a cylindrical pass-through bore, whereby the exposure will be inadequate and the precipitation of the metal particles will be insufficient. Thus, non-plated fine portions (i.e. plating voids) are likely to be left.</p>
<p id="p0009" num="0009">The present inventors have conducted extensive researches on the process for producing a printed circuit board by the photo-forming method comprising the above steps a) to d), whereupon it has been found that the above object can be attained by depositing fine particles of a light sensitive oxide semiconductor on the inner wall surface of the pass-through bore constituting the through hole, prior to the application of the aqueous light sensitive material solution. Thus, the present invention has been accomplished.</p>
<p id="p0010" num="0010">According to the present invention, there is provided a process for producing a printed circuit board, comprising;
<ul id="ul0002" list-style="none">
<li>A) a step of providing an adhesive layer on one side or both sides of an insulating substrates;</li>
<li>B) a step of roughening, and imparting a hydrophilic property to, the surface of said adhesive layer by a physical or chemical method;</li>
<li>D) a step of forming on the substrate a light sensitive material layer containing a metal in a reducible oxidized state capable of forming catalytic nuclei for non-electrolytic plating, and a light sensitive reducing agent;</li>
<li>E) a step of reductively precipitating metal particles constituting catalytic nuclei by selectively exposing said light sensitive material layer; and</li><!-- EPO <DP n="3"> -->
<li>F) a step of forming a conductor circuit layer by non-electrolytic plating after removing non-exposed portions of said light sensitive material layer;</li>
</ul></p>
<p id="p0011" num="0011">wherein the improvement comprises providing between the step B) and the step D), a step C) of depositing fine particles of a light sensitive metal oxide semiconductor on at least the inner wall surface of a through hole.</p>
<p id="p0012" num="0012">As the insulating substrate which is used in the present invention, there may be mentioned a plastic plate, a ceramic plate, a laminated board containing a resin, or a metal plate coated on its surface with an insulating layer.</p>
<p id="p0013" num="0013">As the adhesive which is provided on the above-mentioned insulating substrate according to the present invention, there may be mentioned an adhesive comprising a polyester as the main component, an adhesive comprising an epoxy resin as the main component, an adhesive comprising a phenol resin as the main component, an adhesive comprising a polyvinyl acetate as the main component, and an adhesive comprising a diene type synthetic rubber as the main component. The adhesive comprising a diene type synthetic rubber as the main component is particularly desirable for the reason that a superior firm adhesion is thereby obtainable. As the adhesive containing such a diene type synthetic rubber, there are, for instance, a butadiene polymer, a butadiene-acrylonitrile copolymer, an isoprene rubber, a chloroprene rubber, an acrylonitrile-butadiene-styrene copolymer or a mixture of two or more of these substances, or a proper mixture of these substances with a thermosetting resin such as an epoxy resin or a phenol resin or a reinforcing material such as silica gel, zirconium silicate or magnesium silicate. Thus, in the case where the adhesives containing these diene type synthetic rubbers are employed, a high adhesion is given to the circuit layer which is important for a printed circuit. The adhesives are applied to predetermined portions of the substrate in a form of a solution, and hardened by heating.</p>
<p id="p0014" num="0014">The method for roughening and imparting a hydrophilic property to the surface of the adhesive layer thus formed, may be a chemical or physical method. As the chemical method, there may be mentioned, roughening by etching with use of an oxidizing agent such as chromic acid, a chromate, a permanganate, chromic acid-sulfuric acid, or chromic acid-sulfuric acid-phosphoric acid. The chromic acid-sulfuric acid system is particularly desirable for the reason that the plated layer thereby obtained will give a strong adhesion. Further, as the physical method, there may be mentioned, a mechanical roughening method such as a liquid honing or a blast method, a ultraviolet ray radiation method, etching by sputtering, a discharge treatment method such as corona, or a plasma treating method.</p>
<p id="p0015" num="0015">As the light sensitive metal oxide semiconductor to be used in the present invention, there may be mentioned, titanium dioxide (Ti0<sub>2</sub>), zinc oxide (ZnO), tin dioxide (Sn0<sub>2</sub>) or silica (SiO<sub>z</sub>). In this case, the term "light sensitive" is meant in a broad sense for the sensitivity to a electromagnetic radiation such as a visible ray, a ultraviolet ray, a X-ray, or electron rays. It is assumed that the metal oxide semiconductor serves to catalytically assist the reaction of the light sensitive material which will be described hereinafter. Accordingly, the amount of its deposition may be very small and yet it is possible to facilitate the reaction of the light sensitive reducing agent to precipitate an adequate amount of metal catalytic nuclei even when the amount of light reaching the inner wall of the bore constituting the through hole is slight.</p>
<p id="p0016" num="0016">There are various possible methods to deposit the light sensitive metal oxide semiconductor on the inner wall of the bore constituting the through hole. However, a simple and practical method may be such that a powder of said semiconductor is dispersed in water to obtain a suspension, and the entire substrate is immersed in the suspension and then dried. At the time of dispersing it in water, a proper surface active agent may preferably be used. According to this method, a desirable phenomenon takes place such that during the process of drying after the immersing, the semiconductor powder deposits in a relatively thick state on the inner wall of the through hole or therearound. Further, the semiconductor powder deposits also on the entire surface of the substrate, and this does not bring about any problem.</p>
<p id="p0017" num="0017">The finer the powder of the light sensitive metal oxide semiconductor is, the more uniformly it can be deposited, and the better the dispersion and the floating condition become when it is dispersed to form a suspension. As such a semiconductor powder, there is, for instance, a commercially available powder having a particle size of about 0.03 to 0.5 urn, which is useful for the process of the present invention.</p>
<p id="p0018" num="0018">The amount of deposition of the light sensitive metal oxide semiconductor on the inner wall surface of the through hole may be very small. In the case where the substrate is immersed in the suspension as mentioned above, it will suffice to use a suspension wherein the semiconductor powder is dispersed in an amount of e.g. from 0.5 to 5 parts by weight into 100 parts by weight of water.</p>
<p id="p0019" num="0019">In the present invention, as the metal which is contained in the light sensitive material layer formed on the insulating substrate having deposited thereon the above-mentioned light sensitive oxide semiconductor and which is in a reducible oxidized state and serves as a catalyst for non-electrolytic plating, there may be used salts of gold, silver, platinum, palladium, copper, nickel, cobalt and iron. As the light sensitive reducing agent, there may be used aromatic diazo compounds, iron salts, anthraquinone derivatives, azido compounds, etc. Further, reduction facilitating agents, surface active agents or solvents such as pentaerythritol, or sorbitol, may properly be incorporated. The substrate is immersed in the above-mentioned light sensitive solution, and then dried to form a light sensitive material layer on the entire surface. Then, a ultraviolet ray is selectively radiated to this substrate with use of e.g. a negative film, to form plated catalytically active metal particles in a desired circuit pattern. The light source may be a <!-- EPO <DP n="4"> -->diffusion type light source or a parallel light source. However, in a case of forming fine patterns, the parallel light source is desirable.</p>
<p id="p0020" num="0020">In the present invention, the non-electrolytic plating to form, by precipitation, a conductive circuit along the selectively exposed portion, is carried out by the use of, for instance, a non-electrolytic copper plating solution, a non-electrolytic nickel plating solution or a non-electrolytic gold plating solution. Thus, as the non-electrolytic plating solution, a non-electrolytic copper solution is suitable, and as its composition, there may be mentioned, for instance, a copper sulfate-ethylenediaminetetraacetic acid- formaldehyde system, or the same system suitably incorporated with sodium hydroxide, dipyridyl, or polyethylene oxide as the case requires. Further, as the plating conditions, it is usual that the bath temperature is from 50 to 78°C and a pH is from 12.0 to 13.0.</p>
<p id="p0021" num="0021">As described hereinabove, according to the present invention, in the production of a printed circuit board by a photo-forming method, fine particles of the light sensitive metal oxide semiconductor are deposited on the inner wall surface of the through hole, whereby the sensitivity of the light sensitive material layer formed on the inner wall of the bore constituting the through hole is increased, and accordingly the photochemical reaction can adequately be proceeded even with a small amount of exposure. This is due to the fact that upon exposure, the light sensitive oxide semiconductor is capable of reductively precipitating the metal contained in the light sensitive solution in an oxidized state. Thus, it is possible to adequately precipitate metal particles seving as a plating catalyst at the inner wall of the through hole, and to eliminate the formation of plating voids.</p>
<p id="p0022" num="0022">Thus, the process of the present invention may be said to be a process for producing a highly dependable printed circuit board superior in the reliability of the connection of the through hole, based on the photoforming method.</p>
<p id="p0023" num="0023">Now, Examples of the present invention will be described below:</p>
<heading id="h0001">Example 1</heading>
<p id="p0024" num="0024">An adhesive having the following composition was applied to both sides of a paper-epoxy type laminated board, and heated at 110°C for 20 minutes and then at 170°C for further 40 minutes for hardening, whereby an adhesive hardened layer having a thickness of about 40 microns was formed. Then, a pass-through bore which constitutes a through hole was formed.</p>
<heading id="h0002">Composition of the adhesive:</heading>
<p id="p0025" num="0025">
<tables id="tabl0001" num="0001"><img id="ib0001" file="imgb0001.tif" wi="165" he="42" img-content="table" img-format="tif" inline="no"/>
</tables></p>
<p id="p0026" num="0026">The substrate formed with the above adhesive layer was immersed in an oxidizing agent solution comprising 75 g/I of chromic acid anhydride, 300 ml/I of concentrated sulfuric acid, the rest being water, for 15 minutes, whereby the entire surface was roughened by the oxidizing treatment. After this oxidizing treatment, the substrate was washed with water, and further immersed in a 3% sodium persulfite solution to neutralize the excess amount of chromium.</p>
<p id="p0027" num="0027">On the other hand, 10 parts by weight of a light sensitive titanium oxide (Trade name Tipaque W-10, produced by Ishihara Sangyo Kaisha, Ltd.), 1.5 parts by weight of a surface active agent (Trade name Nikkol OP-10, produced by Nikko Chemicals K.K.) and 100 parts by weight of water were introduced into a ball mill and mixed for 24 hours for dispersion. The aqueous dispersion of the light sensitive titanium oxide thus obtained was diluted 10 times with water, and the above neutralized insulating substrate was immersed in the diluted dispersion and dried to deposit fine particles of the light sensitive titanium oxide on the entire surface, and thereafter it was immersed in a light sensitive solution having the following composition, and then dried to form a light sensitive material layer.</p>
<heading id="h0003">Composition of the light sensitive solution:</heading>
<p id="p0028" num="0028">
<tables id="tabl0002" num="0002"><img id="ib0002" file="imgb0002.tif" wi="125" he="23" img-content="table" img-format="tif" inline="no"/>
</tables></p>
<p id="p0029" num="0029">A negative film was intimately overlaid on the light sensitive material layer thus provided, and a</p><!-- EPO <DP n="5"> -->
<p id="p0030" num="0030">ultraviolet ray (Strength: 30 mW/cm<sup>2</sup>) was radiated for 60 minutes. After washing with running water for from 30 to 60 seconds, the substrate was immersed in a non-electrolytic copper plating solution (pH 12.3, 60°C) having the following composition for 13 hours, whereby a printed circuit board having a conductor circuit layer having a thickness of 35 microns was obtained. Conduction resistance at the through hole was 0.3 mQ/hole or less, thereby giving also a practical sufficiency for good solderability. The through hole was observed by a cross section method, whereby no plating voids were found on the inner wall of the through hole and the plated state was satisfactory.</p>
<heading id="h0004">Composition of the non-electrolytic copper plating solution:</heading>
<p id="p0031" num="0031">
<tables id="tabl0003" num="0003"><img id="ib0003" file="imgb0003.tif" wi="157" he="36" img-content="table" img-format="tif" inline="no"/>
</tables></p>
<heading id="h0005">Comparative Example 1</heading>
<p id="p0032" num="0032">A printed circuit board with a conductor circuit layer having a thickness of 35 microns was prepared in the same manner as Example 1 except that the step of depositing fine particles of the light sensitive titanium oxide on the substrate was omitted. Conduction resistance at the through hole was 10' 0 or more, and the state of breaking was suggested. The through hole was observed by the cross section method, whereby numerous plating voids were observed on the inner wall surface of the through hole, and it was found that these plating voids caused the breaking.</p>
<heading id="h0006">Example 2</heading>
<p id="p0033" num="0033">A printed circuit board was prepared in the same manner as in Example 1 except that the following light sensitive solution composition was used. There was no plating void observed on the inner wall of the through hole, and it had a superior dependability of the connection of the through hole.</p>
<heading id="h0007">Composition of the light sensitive solution:</heading>
<p id="p0034" num="0034">
<tables id="tabl0004" num="0004"><img id="ib0004" file="imgb0004.tif" wi="129" he="23" img-content="table" img-format="tif" inline="no"/>
</tables></p>
<heading id="h0008">Comparative Example 2</heading>
<p id="p0035" num="0035">A printed circuit board was prepared in the same manner as in Example 2 except that the step of depositing fine particles of the light sensitive titanium oxide on the substrate was omitted. Conduction resistance was 1030 or more, resulting in bad connection. The through hole was observed by the cross section method, whereby numerous plating voids were observed on the inner surface of the through hole.</p>
<heading id="h0009">Example 3</heading>
<p id="p0036" num="0036">A printed circuit board was prepared in the same manner as in Example 1 except that aqueous dispersion of light sensitive zinc oxide as specified in the following was employed in place of the aqueous dispersion of light sensitive titanium oxide.</p>
<p id="p0037" num="0037">Introduced into a ball mill were 10 parts by weight of zinc oxide (Trade name: Sazex 1000, produced by Sakai Chemical Industry Co., Ltd.), 1.5 parts by weight of the same surface active agent as used in Example 1 and 100 parts by weight of water, which were mixed for 24 hours for dispersion. The aqueous dispersion thus obtained was diluted 10 times with water.</p>
<p id="p0038" num="0038">Conduction resistance at the through hole of the printed circuit board was 0.3 mQ/hole or less, thereby giving a practical sufficiency for good solderability. The through hole was observed by a cross section method, and it was found that the whole inner wall of the through hole was filmed with copper plating.</p>
</description>
<claims id="claims01" lang="en">
<claim id="c-en-01-0001" num="">
<claim-text>1. A process for producing a printed circuit board, comprising:
<claim-text>step (A) of providing an adhesive layer on one side or both sides of an insulating substrate;</claim-text>
<claim-text>step (B) of roughening, and imparting a hydrophilic property to, the surface of said adhesive layer by a physical or chemical method;</claim-text>
<claim-text>step (D) of forming on the substrate a light sensitive material layer containing a metal in a reducible <!-- EPO <DP n="6"> -->oxidized state capable of forming catalytic nuclei for non-electrolytic plating, and a light sensitive reducing agent;</claim-text>
<claim-text>step (E) of reductively precipitating metal particles constituting catalytic nuclei by selectively exposing said light sensitive material layer; and</claim-text>
<claim-text>step (F) of forming a conductive circuit layer by non-electrolytic plating after removing non-exposed portions of said light sensitive material layer;</claim-text></claim-text></claim>
<claim id="c-en-01-0002" num="">
<claim-text>wherein the improvement comprises providing, between the step (B) and the step (D), a step (C) of depositing fine particles of a light sensitive metal oxide semiconductor at least on the inner wall surface of a through hole.</claim-text></claim>
<claim id="c-en-01-0003" num="">
<claim-text>2. A process according to Claim 1, wherein said light sensitive metal oxide semiconductor is selected from the group consisting of titanium dioxide, zinc oxide, tin dioxide and silicon oxide.</claim-text></claim>
<claim id="c-en-01-0004" num="">
<claim-text>3. A process according to Claim 1, wherein said light sensitive metal oxide semiconductor is titanium dioxide.</claim-text></claim>
<claim id="c-en-01-0005" num="">
<claim-text>4. A process according to Claim 1, wherein the particles of said semiconductor are deposited on the inner wall of the through hole by immersing the entire substrate into a suspension in which the semiconductor powder is dispersed in an amount of from 0.5 to 5 parts by weight in 100 parts by weight of water and drying the same.</claim-text></claim>
<claim id="c-en-01-0006" num="">
<claim-text>5. A process according to Claim 4, wherein the semiconductor powder having a particle size of 0.03 to 0.5 pm is employed.</claim-text></claim>
</claims>
<claims id="claims02" lang="de">
<claim id="c-de-01-0001" num="">
<claim-text>1. Verfahren zur Herstellung einer gedruckten Schaltungsplatte mit den folgenden Schritten: Schritt (A) Vorsehen einer klebenden Schicht auf einer oder beiden Seiten eines isolierenden Substrats;
<claim-text>Schritt (B) Aufrauhen und Verleihen einer hydrophilen Eigenschaft einer Oberfläche der klebenden Schicht durch eine physikalische oder chemische Methode;</claim-text>
<claim-text>Schritt (D) Bilden auf dem Substrat einer lichtempfindlichen Materialschicht, enthaltend ein in einem reduzierbaren oxidierenden Zustand befindliches Metall, das zum Bilden katalytischer Kerne zur nichtelektrolytischen Plattierung fähig ist, und ein lichtempfindliches Reduktionsmittel;</claim-text>
<claim-text>Schritt (E) reduzierendes Ausfällen von Metallteilchen aus katalytischen Kernen durch selektives Belichten der lichtempfindlichen Materialschicht; und</claim-text>
<claim-text>Schritt (F) Bilden einer leitfähigen Schaltungsschicht durch nichtelektrolytisches Plattieren nach Entfernen nichtbelichteter Teile der lichtempfindlichen Materialshicht;</claim-text></claim-text></claim>
<claim id="c-de-01-0002" num="">
<claim-text>dadurch gekennzeichnet, daß zwischen dem Schritt (B) und dem Schritt (D) ein Schritt (C) Abscheiden feiner Teilchen eines lichtempfindlichen Metalloxidhalbleiters zumindest an der inneren Wandoberfläche eines Durchgangsloches vorgesehen ist.</claim-text></claim>
<claim id="c-de-01-0003" num="">
<claim-text>2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß der lichtempfindliche Metalloxidhalbleiter aus der Gruppe enthaltend Titandioxid, Zinkoxid, Zinndioxid und Siliziumoxid ausgewählt ist.</claim-text></claim>
<claim id="c-de-01-0004" num="">
<claim-text>3. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß der lichtempfindliche Metalloxidhalbleiter Titandioxid ist.</claim-text></claim>
<claim id="c-de-01-0005" num="">
<claim-text>4. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß die Teilchen des Halbleiters an der inneren Wand des Durchgangsloches durch Eintauchen des gesamten Substrats in eine Suspension abgeschieden werden, in welcher das Halbleiterpulver in einer Menge von 0,5 bis 5 Gewichtsteilchen in 100 Gewichtsteilchen Wasser dispergiert ist, und Trocknen derselben.</claim-text></claim>
<claim id="c-de-01-0006" num="">
<claim-text>5. Verfahren nach Anspruch 4, dadurch gekennzeichnet, daß das Halbleiterpulver mit einer Teilchengröße von 0,03 bis 0,5 um verwendet wird.</claim-text></claim>
</claims>
<claims id="claims03" lang="fr">
<claim id="c-fr-01-0001" num="">
<claim-text>1. Procédé de production d'une plaquette de circuit imprimé, qui comprend:
<claim-text>(A) un stade consistant à établir une couche adhésive sur une face ou les deux faces d'un substrat isolant;</claim-text>
<claim-text>(B) un stade où l'on rend rugeueuse la surface de ladite couche adhésive et on lui confère une propriété hydrophile, par une technique physique ou chimique;</claim-text>
<claim-text>(D) un stade consistant à former sur le substrat une couche de matière photosensible contenant un métal dans un état oxydé réductible, capable de former des germes catalytiques pour le placage non électrolytique, et un agent réducteur photosensible;</claim-text>
<claim-text>(E) un stade consistant à précipiter par réduction les particules métalliques constituant les germes catalytiques, par exposition sélective de ladite couche de matière photosensible; et</claim-text>
<claim-text>(F) un stade de formation d'une couche de circuit conducteur par placage non électrolytique après enlèvement des portions non exposées de ladite couche de matière photosensible;</claim-text></claim-text></claim>
<claim id="c-fr-01-0002" num="">
<claim-text>dans lequel le perfectionnement consiste à introduire, entre le stade (B) et le stade (D), un stade (C) de dépôt de fines particules d'un oxyde métallique semiconducteur photosensible sur au moins la surface de la paroi interne d'un trou traversant.</claim-text></claim><!-- EPO <DP n="7"> -->
<claim id="c-fr-01-0003" num="">
<claim-text>2. Procédé selon la revendication 1, dans lequel ledit oxyde métallique semiconducteur photosensible est choisi dans le groupe comprenant le bioxyde de titane, l'oxyde de zinc, le bioxyde d'étain et l'oxyde de silicium.</claim-text></claim>
<claim id="c-fr-01-0004" num="">
<claim-text>3. Procédé selon la revendication 1, dans lequel ledit oxyde métallique semiconducteur photosensible est le bioxyde de titane.</claim-text></claim>
<claim id="c-fr-01-0005" num="">
<claim-text>4. Procédé selon la revendication 1, dans lequel les particules dudit semiconducteur sont déposées sur la paroi interne du trou traversant par immersion du substrat tout entier dans une suspension dans laquelle la poudre de semiconducteur est dispersée à raison de 0,5 à 5 parties en poids dans 100 parties en poids d'eau, et séchage ultérieur du substrat.</claim-text></claim>
<claim id="c-fr-01-0006" num="">
<claim-text>5. Procédé selon la revendication 4, dans lequel on utilisé une poudre de semiconducteur ayant une granulométrie de 0,03 à 0,5 pm.</claim-text></claim>
</claims>
</ep-patent-document>