[0001] The present invention relates to an optical data recording and reproducing apparatus.
[0002] An optical disc coated with a recording material by spraying or vapor deposition,
is rotated, and a tiny spot of laser light beam, which is focussed so that the diameter
is less than 1 micrometer is applied on the optical disk. The intensity of the laser
light is modulated by a recording signal so that recording of a digital signal can
be effected as an optical characteristic change such as variation in refractive index,
for instance, phase variation by concave-convex portions of the optical disc, or variation
in reflection factor or in transmittance by light and shade variation or formation
of holes. The optical characteristic change on the disk will be detected to reproduce
prerecorded information. For example, an optical video disc is well known as an apparatus
for reproducing signals recorded in high density using the above-mentioned technique.
[0003] This technique of recording signals is also used by an apparatus for producing a
video disc master.
[0004] The recording signals may include a video signal, a sound signal or a digital signal.
[0005] In the optical recording and reproducing apparatus described above, signals are recorded
by radiating a laser beam on a recording material on the disc thereby to fuse and
evaporate the light-radiated portion of the disc or to change the reflection factor
or the transmission factor of the recording material. In other words, energy of the
laser beam is generally utilized thermally to change the optical characteristics of
the recording material.
[0006] Some difficulties are met when a signal is recorded at high density in the above-mentioned
disc capable of optical recording and reproduction with a simple apparatus.
[0007] First, the vibration of the apparatus poses a problem when the pitch of the recording
track is reduced. Another problem is a feed variation or nonuniform feeding of a feed
mechanism including a screw and a motor for effecting the relative feed of an optical
head and the disc. The Japanese Patent Lay-Open Publication No. 109601/78 discloses
an example of a method of recording at high density in small track pitches with such
a simple apparatus as mentioned above, in which the disc is provided with an optically
detectable guide track subjected to a well-known tracking control and signals are
recorded or reproduced along or on this guide track. By using a guide track optically
detectable as mentioned above, it is possible to produce a high-density optical recording
and reproducing apparatus affected less adversely by the vibration of the apparatus,
the feed variation of the feed mechanism or disc eccentricity.
[0008] This guide track is selected according to the nature of the data or signal recorded
and generally takes a spiral or concentric form with respect to the disc center.
[0009] In order to permit the recording/reproduction of digital data at a given location,
each track is provided with a specific track address data and is divided into data
sectors as recording or reproduction units for digital data. For this purpose, an
identification field (ID field) is formed in the track for identifying a track address
and the data sectors. The ID field is formed on the optical disc master at the same
time as the groove-like guide track in the form of its, and this master is duplicated
on an optical disc base material as a replica by the stamper technique. The optical
disc duplicated with the guide track and the identification field is deposited with
a recording material by evaporation and covered with a protective layer thereby to
produce an optical disc. The optical disc develops a defect due to a flaw or dust
during the processes of production of the optical disc master, a replica, deposition
by evaporation and forming of the protective film, with the result that it causes
dropout in the order of 10-3 to 10
-4 of error rate. A recording system highly resistant to the error is desired for the
ID field. Also, the ID field, the length of which affects the data capacity of the
data field for recording digital data in the optical disc, must be as short as possible
and requires a modulation system highly resistant to the error. On the other hand,
the ID field is not used for recording digital data and therefore reduces the data
recording efficiency of the optical disc.
[0010] For these reasons, a recording system for the ID field and the data field for recording
digital data is desired which is highly resistant to the defect of the optical disc
and does not reduce the data recording efficiency.
[0011] Accordingly, it is an object of the present invention to provide a recording and
reproducing system in which the identification field containing the identification
data such as the track address and sector address and the data field for recording
digital data are recorded by different modulation methods, thus reproducing an identification
field at high reliability and at high decoding rate on the one hand and recording
digital data in the data field at high density on the other hand.
[0012] Another object of the present invention is to provide a clock reproduction system
for reproducing the data field in a stable manner against the time variations caused
by the eccentricity of the optical disc or variations of rotation.
[0013] The above and other objects and features of the present invention will become apparent
when reading the following detailed description of the present invention and embodiments
thereof.
[0014] The present invention will be apparent from the following detailed description taken
in conjunction with the accompanying drawings, in which:
Fig. 1 is an outside view of an optical disc used for the present invention;
Fig. 2 is a diagram for explaining the construction of the groove-like guide track
of the optical disc;
Fig. 3 is a diagram showing a signal format of a sector;
Figs. 4 and 5 show an embodiment of modulation signals of the ID field and the data
field;
Fig. 6 is a block diagram showing a data modulation circuit of the data field;
Fig. 7 shows a waveform of the modulation signal for the data field;
Fig. 8 is a block diagram showing an embodiment of a separator circuit for the ID
field and the data field;
Fig. 9 shows signal waveforms produced at various parts in Fig. 8;
Fig. 10 is a block diagram showing a data demodulation circuit;
Fig. 11 shows an embodiment of a clock reproduction circuit;
Fig. 12 is a timing chart for explaining the operation mode of the clock reproduction
circuit;
Fig. 13 shows a construction of a data clock generator circuit;
Fig. 14 shows signal waveforms produced at various parts of the data clock generator
circuit;
Fig. 15 shows a waveform of an ordinary VCO input voltage; and
Fig. 16 shows waveforms of a VCO input voltage according to the present invention.
[0015] An example of an optical disc used in the present invention is shown in Fig. 1. An
optical disc 1 in Fig. 1 comprises data sectors S
1 to S
10 for recording data and a track address area TA. Spiral or concentric guide tracks
are cut in the optical disc 1. Fig. 1 shows an example of concentric tracks 2 cut
in the effective recording area W. Each track 2 is equally divided into data sectors
S
1 to S
10 at the angle β, so that recording and reproduction are effected by sector. Each sector
is distinguished by the sector marks s
1 to s
10 and an index mark i arranged on the concentric circle 3 on the inside of the optical
disc 1. The index mark i is aligned on the track 2 in the same angle a as the track
address area TA and is used for detection of the track address TA and the sector positions.
[0016] Fig. 2 is an enlarged view of the boundary A-A' of the track address TA of the track
2 and the sector S
1. Fig. 2(a) is a view of the track 2, and Fig. 2(b) is a sectional view thereof. The
track 2 includes the track address portion 4 and a guide track 5 making up sectors.
The guide track 5 forms a flat groove having the depth of 6 and width of w extending
along the disc periphery. The groove depth 6 is approximately 1/8 of the wavelength
to facilitate production of a tracking signal of a tiny spot of laser light. The track
address section 4 is cut at the time of production of the disc master and copied at
the same time by the well-known stamper technique. On the address section 4 and the
guide track 5 are deposited by evaporation with an amorphous metal film 6 as a recording
layer. The heat mode recording of data in the optical disc is well known and is performed
by forming holes in the recording layer 6 or by changing the reflection factor. A
recorded data or signal is read by the change of intensity of the reflected light
at an optical power of low level below the light-sensitive threshold of the recording
layer 6 as shown by a reproduction signal of Fig. 2(c). The track address section
4 is recorded with track address data by a phase construction. The minute spot light
of 1 µm in diameter is refracted by the phase variation at the concave-convex portions
of the track address section 4 and thus is reproduced by the variation of the intensity
of the reflected light in the same manner as the sectors. The track address section
4 and the guide track 5 do not have the same level of reproduction amplitude since
the recording method is different.
[0017] An embodiment of the construction of the sector signal according to the present invention
is shown in Fig. 3. A sector is comprised of an identification field (ID) 7 and a
data field 8. The ID field 7 is recorded with identification data for the track and
sector such as a track address and a sector address.
[0018] The ID field is cut at the time of production of the disc master and includes a flag
7a and an identification data 7b. The flag 7a is a special bit train for identifying
the start of the ID field 7. The ID field 7 is so constructed as not to require any
special pull-in data train for synchronization or clock reproduction circuit, and
thus, a modulation system such as FM or PE modulation is employed in that it always
includes one clock pulse in the bit cell of the modulation signal.
[0019] On the other hand, the data field 8 employs a modulation system different from that
for the ID field 7 and does not always include a clock pulse component in the bit
cell of the modulation signal. It is a modulation system having what is called a missing
clock such as MFM modulation or M
2FM modulation. Thus the clock reproduction is required to be effected by PLL (phase
locked loop), and the data field 8, which performs the pull-in of PLL, has a synchronization
section 8a. The data section 8c and the synchronization section 8a of the data field
8 are distinguished by the address mark 8b. The address mark 8b is most suitably a
combination of special bit trains not included in the data section 8b or the sync
section 8a.
[0020] Fig. 4 shows signal waveforms of the ID field 7 subjected to PE modulation. The identification
data of the ID field 7 is modulated in such a way as to rise at the center of the
data "1" and falls at the center of the data "0". The ID field modulation signal in
(c) of Fig. 4 always has a clock pulse at the bit cell intervals of 2T
l as shown and has no missing clock portion. It is thus possible to easily reproduce
data by use of the rise pulse of the modulation signal.
[0021] Fig. 5 shows an embodiment of the modulation signal for the data field 8. The data
train of the data field 8 shows an example of an LDC (low disparity code) subjected
to NRZ modulation by conversion of ill bits into an n-bit code word. Fig. 5 shows
the case in which m is 4 bits and n is 5 bits. Fig. 5 (a) shows data field data, and
the data field modulation signal of (b) in Fig. 5 includes a missing clock portion
not including a clock pulse in the sections of 2T
2, 3T
2 and 4T
2 (T
2: code bit cell width) as shown in (c) in Fig. 5. The reproduction of the clock pulse
in this missing clock section is required to be performed by PLL.
[0022] Each sector recorded by the modulation system explained with reference to Figs. 4
and 5 has the effects and features as mentioned below.
[0023] The ID field, in the absence of a missing clock, does not require a special clock
reproduction circuit, that is, a synchronization section for the clock reproduction,
so that the modulation frequency is reduced without reducing the format efficiency,
thus making possible a reliable ID field reproduction resistant to dropouts. Also,
the rapid demodulation permits a shorter interval with the data field, resulting in
a high-density format.
[0024] Further, the data field, separate from the ID field, can be increased in density
and employs a modulation system different from the ID field, thereby leading to the
advantage that a strong sync section, and an error detection and correction section
may be used without reducing the format efficiency.
[0025] Fig. 6 shows a block diagram of a modulation circuit for the data field 8. As shown
in Fig. 5, the data is applied in the form of data words divided into m bits as an
address signal 100 of the code conversion ROM 9, converted into a code 101 of n bits,
and then produced as a series modulation signal 103 from a shift register 11 by a
clock 102 of a clock generator circuit 10.
[0026] Fig. 7 shows an example of a code word accommodated in the code conversion ROM of
Fig. 6, which is used for the address mark 8b for the special purpose of distinguishing
the sync section 8a and the data section 8c. Fig. 7 shows an example involving m of
4 bits (m = 4 bits) and n of 5 bits (n = 5 bits). In this case, 24 = 16 combinations
are selected from 2 = 32 combinations. The remaining codes are used for the above-mentioned
special purposes such as an address mark. There are twenty 5-bit code words of which
the difference between the numbers of "0" and "1" is +1, from which 16 code words
corresponding to the data words are removed to leave four code words. According to
the present invention, a bit train at least one of "11100" and "11000" of the four
code words is used as an address mark so that "0" or "1" continues with at most four-fold
bit cell interval in the bit train of code words, thus dampening the expansion of
the spectrum of the data modulation signal.
[0027] Fig. 8 shows an embodiment of a separator circuit in which the modulation signal
for the ID field and the modulation signal for the data field are separated satisfactorily.
Fig. 9 shows signal waveforms produced at various parts of the circuit of Fig. 8.
[0028] In the modulation signal waveforms of Figs. 4 and 5, assume that T
1 is a minimum bit reversal interval of the modulation signal for the ID field and
4T
2 is a maximum bit reversal interval of the modulation signal for the data field. The
bit rate is set in such a manner that relation holds T
1 > 4T
2. By doing so, the reproduction pulse signal 104 obtained by waveform equalization
and pulse shaping of the reproduction signal from the optical disc is differentiated
at the differentiator circuit 12, and the rise and fall of the reproduction signal
are detected. This signal is applied to monostable multivibrators 13 and 14 of retrigger
type and a counter 15 thereby to separate the signals of the ID field and the data
field from each other. The pulse duration t
l of the monostable multivibrator 13 is selected in such a manner that t
1 is larger than 2T
1, and as shown in (b) in Fig. 9, an output 105 of high level is produced while the
signal for the ID field and the signal for the data field are produced. On the other
hand, the monostable multivibrator 14 is set in such a manner that a pulse duration
t
2 is smaller than T
1 and larger than 4T
2, thus producing an output 106 which include both pulses of "high" and "low" in the
case of the signal for the ID field but which makes up a "high" signal for the data
field.
[0029] The counter 15 is cleared by the output 106 of the monostable multivibrator 14 and
is for counting up the output of the differentiator circuit 12 as a clock input. Taking
advantage of the fact that the data field does not include a pulse train more than
T
1 in pulse duration, the counter 15 counts up the sync portion of the data field and
detects the data field at more than a certain value of the counter output 107. (Fig.
9 in (d)) The inverter 16 and the NAND gate 17 make up a logic circuit for prohibiting
the count when the output 107 of the counter 15 is at high state.
[0030] The ID field detection output 108 of (e) in Fig. 9 is an output of the AND gate 109
supplied with the output 105 of the monostable multivibrator 13 and the output 107
of the counter 15 as inverted by the inverter 18. The data field detection output
109 of (f) in Fig. 9, on the other hand, is an output of the AND gate 21 supplied
with the output 106 of the monostable multivibrator 14 and the ID field detection
output 108 as inverted by the inverter 20.
[0031] Fig. 10 shows a block diagram of a data demodulation system including a waveform
equalization circuit 22, a shaping circuit 23, a demodulation circuit 24 and a clock
reproduction circuit 25. The waveform equalization circuit 22 is for correcting the
frequency deterioration and waveform deformation of the optical disc reproduction
signal 110 caused by the frequency characteristic of the optical disc and the optical
system. The reproduction signal equalized in waveform is converted into a pulse signal
at the shaping circuit 23 and applied as a reproduction pulse signal 104 to the demodulation
circuit 24 and the clock reproduction circuit 25. The clock reproduction circuit 25
forms a PLL (phase lock loop) in such a manner that a clock sync is established rapidly
at the sync section 8a shown in Fig. 3 and the change of the rotational speed of the
disc is stably followed up. The demodulation circuit 25 is for demodulating and producing
the data 111 by sampling the output 104 of the shaping circuit 23 by the clock 112
reproduced at the clock reproduction circuit 25. Thus if the clock is ill-timed, "0"
may be sampled as "1" leading to a decoding error.
[0032] The optical disc shown in Fig. 1, in particular, reproduces the track address area
TA and the sectors S
1 to S
10 in burst manner, and therefore, in the clock reproduction system for phase-locking
the oscillation output of an ordinary voltage control oscillator (VCO) and the edge
pulse of the reproduction pulse signal,
(a) In view of an unrecorded part existing, the VCO runs free during this period and
the oscillation frequency drifts at specified numbers of PLL and LPF.
(b) If there is a burst-like dropout such as a flaw or defect of the optical disc
or the track address area (TA) of the modulation frequency or modulation system different
from the sectors, VCO follows the edge of such a false signal, with the result that
the operating range of PLL is exceeded thus requiring a long time for the clock pull-in
for the succeeding sector. In this way, the pull-in for clock sync at the sector requires
an excessive time, thus making it impossible to establish a clock sync at the period
of the sync section 8a shown in Fig. 3.
[0033] Fig. 11 shows a block diagram of an embodiment of a clock reproduction circuit according
to the present invention. The clock reproduction circuit reproduces a clock of the
period T
2 from the reproduction pulse signal 104 produced from the shaping circuit 23 of Fig.
10. The following description deals with a modulation system having a clock of minimum
pulse period of T
2 of the reproduction pulse signal 104, such as 4/5 MNRZi or 8/9 MNRZi. In spite of
this, the present invention is of course applicable with equal effect also to a modulation
system requiring the reproduction of T
2/2 clock such as MFM or ZM (zero modulation).
[0034] Generally, the reproduction pulse signal 104 has a pulse T
2 or more in duration, so that the clock is produced by PLL during the missing clock
period (shown in Fig. 14) containing no clock component. PLL has also the function
to reproduce a clock required for data production following the time variation of
the reproduction pulse signal 104 in response to clock synchronization.
[0035] In Fig. 11, reference numeral 26 designates a multiplexer (MPX), numeral 27 a differentiator
circuit, numeral 28 a T
2/2 delay circuit, numeral 29 a data clock generator circuit, numeral 30 a phase comparator,
numeral 31 a low-pass filter (LPF), numeral 32 a voltage control oscillator (VCO),
numeral 33 a multiplexer (MPX), numeral 34 an inverter, numeral 35 a detector circuit
for the recorded sectors, numeral 36 a circuit for detecting the sync section 8a from
the recorded sectors, and numeral 37 an LPF switching circuit for switching the band
of the LPF 31.
[0036] Waveforms produced at various parts of the clock reproduction circuit of Fig. 11
are shown in Fig. 12. As shown in Fig. 12, the clock reproduction circuit is comprised
of three control loops of ①, O2 and ③. The first one is a sync loop represented by
the period ① in Fig. 12. PLL is a loop for clock pull-in of
PLL at the sync section 8a as a simplification loop. In other words, the R input 118
of the phase comparator 30 is applied as a signal'produced from the reproduction pulse
signal. This R input pulse 118 takes the form of a differentiation pulse 114 as converted
into a pulse of T
2/2 duration at the delay circuit 28 and has the function to attain the maximum margin
of +T
2/2 of the detection window at the time of demodulation. The V input 119 of the phase
comparator 30, on the other hand, is the reproduction clock 112 from VCO as inverted
by the inverter 34. MPX 26 and MPX 33 select inputs by the sector envelope signal
116 produced from the recorded sector detector circuit 35 and the data field detection
signal 109 produced from the sync section detector circuit 35 respectively.
[0037] The second one is a data loop represented by the period ② in Fig. 12. This is such
a loop that after the establishment of clock sync at the sync loop ①, PLL operates
correctly for the toothless pulse (missing clock period) of the data section 8c, during
which the data is demodulated. The R input 118 of the phase comparator 30 takes the
same form as the sync loop ①. On the other hand, the V input 119 takes the form of
the data clock 115 produced from the data clock generator circuit 29 from the edge
pulse 114 of the reproduction pulse signal 104 and the reproduction clock 112 instead
of the inverted input of the reproduction clock 112.
[0038] Fig. 13 is a detailed diagram of the data clock generator circuit 29 including an
inverter 38 and a D latch 39. Fig. 14 shows waveforms produced from the various parts
of the circuit of Fig. 13. The data clock 115 is generated as the D latch 39 is set
by the edge pulse 114 at the rise and fall of the reproduction pulse signal 104 and
reset by the rise of the reproduction clock 112.
[0039] Fig. 3 shows a gap loop for the period ③ in Fig. 12. This period concerns an unrecorded
portion free of the reproduction pulse signal 104, the burst dropout or the track
address (TA) of a modulation system different from the sector modulation system. The
recorded sector detector circuit 35 detects a recorded sector from the features of
the sector modulation system and produces a sector envelope signal 116. Since PLL
exceeds the operation region of the input voltage 120 of the VCO 32 following the
false signal, the delay of the clock pull-in at the next sector is prevented. On the
other hand, in the absence of the sector envelope signal 116, PLL is in free-run state.
Especially when only the one sector is recorded in the track, the frequency of the
reproduction clock 112 is displaced, thus making the clock pull-in unstable.
[0040] Fig. 15 is a diagram for explaining such a state and concerns the case in which the
track address region (TA), unlike the sector modulation system, has a frequency lower
than the sector. In Fig. 15, the clock is out of phase at the long dropout and the
track address region (TA). Especially at the track address region (TA), the input
voltage 120 of VCO is completely off, and the pull-in at the next sector fails to
end in the sync section 8a of the sector.
[0041] In order to solve this problem in the gap loop, in the absence of the sector envelope
signal 116, the modulation clock 113 of the sector modulator is applied to the R input
l18 of the phase comparator 30 instead of the reproduction pulse signal 104 so as
to hold constant the reproduction clock l12 produced from the VCO 32. The frequency
difference between the modulation clock 113 and the clock for the reproduction pulse
signal 104 is caused by the disc eccentricity or rotational variations and is very
small, so that the pull-in improvement by PLL is very effective.
[0042] Fig. 16 shows examples of waveforms of the input voltage 120 applied to the VCO 32
of the clock reproduction circuit shown in Fig. ll. This diagram shows the case in
which the sector envelope signal 116 is produced also at the track address region
TA and the operation of the recorded sector detector circuit 35 is not sufficient.
In the absence of the sector envelope signal 116, a gap loop is formed and therefore
even when an out-of-phase condition ocurs at the track address region TA, a pull-in
state is immediately attained to permit stable clock reproduction as shown. The sync
section detector circuit 36 of Fig. 11 produces a data field detection signal 109
indicating the detection of the sync section 8a of the sector. After completion of
the pull-in of PLL, the data field detection signal 109 is produced and applied to
the LPF switching circuit 37 thereby to switch the response speed of LPF 31. In other
words, when the data field detection signal 109 is not detected, rapid pull-in is
attained with the operation of PLL as a high speed response, and when the data field
detection signal 109 is produced, the PLL operation is switched to low speed response
so that only the slow clock change such as disc rotation variation is followed. PLL
response speed is changed by switching the cut off frequency of LPF 31 and LPF switch
37. By so doing, the rapid pull-in and the stable clock generation are accomplished
at the same time.
[0043] Though obvious from the foregoing description, the effects of the present invention
will be briefly described again below.
[0044] The modulation systems for the ID field and the data field are changed, and in addition,
the modulation system for the ID field having no missing clock portion in the bit
cell is employed. In this way, the ID field is detected with a high reliability free
of the effect of the dropout, and the demodulation is effected rapidly for lack of
the clock reproduction by PLL or the like. Also, the ID field is short in length,
and the interval between the ID field and the data field is shortened, resulting in
a high format efficiency. Further, the employment of an ordinary high-density modulation
system in the data section contributes to a higher density.
[0045] By selecting the maximum bit reversal interval of the data field and the minimum
bit reversal interval of the ID field, these signals are easily separated thereby
to facilitate reproduction without:erroneous operation.
[0046] It is obvious that the same advantage is obtained also when the modulation clock
frequency of the ID field and the data field are changed.
[0047] Further, according to the present invention, in the clock reproduction for recording
and reproduction of data by sector in an optical data carrier having no erasing function
by means of laser beam, the increase of the clock pull-in time and the unstable clock
reproduction caused at the unrecorded section, the dropout section of the track address
region of a modulation system different from the data areas are obviated at the same
time by switching the input to the clock reproduction circuit using PLL between the
reproduction pulse signal, the modulation clock and the LPF cut off frequency of PLL
depending on the presence or absence of the sector envelope signal of the recorded
sector detector circuit and the data field detection signal of the sync section detector
circuit.
1. An optical data recording and reproducing apparatus comprising an optical disc
(1) having guide tracks (2), wherein a plurality of burst signals with at least selected
one of different modulation systems and different modulation clock frequencies are
recorded and/or reproduced in the same track of said guide tracks.
2. An optical data recording and reproducing apparatus according to Claim 1, wherein
said guide tracks (2) are comprised of a plurality of data sectors (S1 - S10)' and identification fields (7) for said data sectors are recorded by a modulation
system always including clock data for each bit cell.
3. An optical data recording and reproducing apparatus according to Claim 1, wherein
at least one track address data (4) is included in said guide track (2), said track
address being recorded by a modulation system always including clock data for each
bit cell.
4. An optical data recording and reproducing apparatus according to Claim 2, wherein
the minimum bit reversal interval of said identification field (7) is larger than
the maximum bit reversal interval of the data field (8) for said data sector.
5. An optical data recording and reproducing apparatus according to Claim 4, wherein
said data field (8) is comprised of four bits of data word and five bits of code word,
and said maximum bit reversal interval covers 4 bit cells.
6. An optical data recording and reproducing apparatus according to Claim 5, wherein
said data field (8) is comprised of a sync section (8a) and a data section (8c), and
at least one of the bit trains of "11100" and "11000" is inserted between said sync
section and said data section.
7. An optical data recording and reproducing apparatus according to Claim 1, wherein
a recorded part and an unrecorded part of the guide track (2) are detected by a reproduction
signal of the optical disc and, as an input to a phase comparator of clock reproduction
for the data field, said reproduction signal and the modulation clock for the data
field are switched.
8. An optical data recording and reproducing apparatus according to Claim 7, wherein
said data field (8) is comprised of a sync section (8a) and a data section (8c), and
the response speed for clock reproduction of said data section is lower than the response
speed of said sync section.