(19)
(11) EP 0 070 822 A1

(12)

(43) Date of publication:
09.02.1983 Bulletin 1983/06

(21) Application number: 81901599.0

(22) Date of filing: 02.02.1981
(51) International Patent Classification (IPC): 
G11C 29/ 50( . )
(86) International application number:
PCT/US1981/000136
(87) International publication number:
WO 1982/002792 (19.08.1982 Gazette 1982/20)
(84) Designated Contracting States:
AT CH DE FR GB LI LU NL SE

(71) Applicant: MOSTEK CORPORATION
Carrollton, TX 75006 (US)

(72) Inventors:
  • O'TOOLE, James E.
    Carrollton, TX 75006 (US)
  • PROEBSTING, Robert J.
    Carrollton, TX 75007 (US)

   


(54) SEMICONDUCTOR MEMORY CELL MARGIN TEST CIRCUIT