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(11) | EP 0 104 865 A3 |
(12) | EUROPEAN PATENT APPLICATION |
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(54) | Code confirmation circuit |
(57) A code confirmation circuit includes input means comprising a number of switches
(KI to Kn) each representing a different code value. A counter (CT) has a number of
outputs energisable in sequence from a datum state and each representing a different
code value. Circuit means interconnect the switches and the outputs of the counter
such that the operation of a switch having the same code value as the energised counter
output causes an amplifier (A1) to clock the counter (CT) so as to energise the next
counter output in sequence. Resetting means comprising a second amplifier (A2) are
responsive to the operation of an incorrect switch to cause the counter to be reset.
The energisation of the last counter output in the sequence indicates the correct
sequence of operation of the switches. |