(19)
(11) EP 0 137 992 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
21.01.1987 Bulletin 1987/04

(43) Date of publication A2:
24.04.1985 Bulletin 1985/17

(21) Application number: 84110211

(22) Date of filing: 28.08.1984
(84) Designated Contracting States:
DE FR GB

(30) Priority: 29.09.1983 JP 18114083
30.12.1983 JP 24824283

(71) Applicant: FUJITSU LIMITED
 ()

(72) Inventor:
  • Nakano, Motoo
     ()

   


(54) Lateral bipolar transistor formed in a silicon on insulator (SOI) substrate


(57) A lateral bipolar transistor formed on a silicon on insulator (SOI) substrate, having a base electrode of heat resistive polycrystalline silicon of first conductivity type, formed on a base region of first conductivity type, all the bottom plane of the transistor region is in contact with the insulating layer of the SOI substrate. The base electrode is extended laterally over a part of a collector region to provide a relatively large base electrode width, which allows a small width of the base region, enhancing the current amplification factor of the transistor. The base region has a vertical doping profile which has a minimum value between the base electrode and the insulator layer of the substrate, reducing the recombination of carriers in the base region. Fabricating methods utilizing self-alignment-diffusion process are provided.





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