A multiple window display system

Abstract

 A multiple window display system is provided for displaying data from different applications in a multi-tasking environment. The display system includes plural screen buffers (12, to 12_n) for storing character codes and attribute codes of data which may be displayed on the display screen. Task selection means (26) selectively couples the output of a single selected one of the plural screen buffers to the character generator (16) and attribute logic (18) at any given time. Address modification means (20, to 20_n, 22, to 22_n) permits changes to be made in the display windows. The software driver includes screen control blocks (32), window control blocks (34), presentation space control blocks (36), presentation spaces (38), and a screen matrix (40) in system memory. The presentation spaces (38) receive application data for plural windows of the displayable area. Each window defines the whole or a subset of a corresponding presentation space. The screen matrix (40) is mapped to the display screen and filters data from the windows of the presentation spaces to the screen buffer to designate which of the data will be shown in corresponding positions on the display screen.

Description

[0001] The present invention is generally related to a multiple window display system and more particularly to hardware and software implementations that display multiple data windows on cathode ray tube (CRT), gas panel, liquid crystal displays (LCD) and other like displays commonly used in computer and data processing systems. The invention has its primary application in multi-tasking computer environments wherein each window displays data from a different one of the tasks.

[0002] Generation of video data for a raster scanned CRT is well understood. Figure 1 shows a typical implementation. A CRT controller 10 is used to generate memory addresses for a display refresh buffer 12. A selector 14, interposed between the controller 10 and the buffer 12, is used to provide an alternate source of addressing so that the contents of the refresh buffer can be modified. Thus, the selector 14 may pass the refresh address from the controller 10 or an address on the system address bus to the display refresh buffer 12. By time division multiplexing (TDM) the refresh buffer bandwidth, interference between refresh and system accesses can be eliminated. For an alphanumeric character display, the display refresh buffer usually contains storage for a character code point and associated attributes. The character code point is used to address the character pel generator 16. Outputs from the character generator 16 are produced in synchronism with the scan line count output from the CRT controller 10. Attribute functions such as reverse video, blink, underscore, and the like are applied to the character generator outputs by the attribute logic 18, and the resultant pels are serialised to the video monitor.

[0003] A number of operating system (OS) programs and application programs allow a computer to carry on multiple tasks simultaneously. For example, a background data processing task might be carried on with a foreground word processing task. Related to the background data processing task might be a graphics generation task for producing pie or bar charts from the data generated in the data processing task. The data in all these tasks might be merged to produce a single document. The multi-tasking operating may be performed by a single computer such as one of the more popular micro computers now on the market, or it may be performed by a micro computer connected to a host computer. In the latter case, the host computer generally carries out the background data processing functions, while the micro computer carries out the foreground operations. By creating a composite display refresh buffer, the system shown in Figure 1 can also be used to display windows from multiple tasks. Each task is independent of the others and occupies non-overlapping space in the system memory. User-definable windows for the tasks resident in system memory can be constructed so as to display, within the limits imposed by the screen size, data from each of the tasks being processed. Figures 2A and 2B illustrate this concept. From the user perspective, windows can be displayed as either non-overlapping, as shown in Figure 2A, or layered or overlapping, as shown in Figure 2B. It will be understood by those skilled in the art, however, that an overlapping display of the type shown in Figure 2B does not imply lost data in the system memory. On the contrary, it is necessary to preserve the data for each task so that as an occulting window is moved about the display screen or even removed from the display screen, the underlying display data can be viewed by updating the refresh buffer.

[0004] While the implementation shown in Figure 1 is adequate for a class of use, it can become performance limited as the number of display windows and tasks is increased or as the display screen size is increased. As the time required to update the display refresh buffer significantly increases, system response time increases and therefore throughput decreases. Slower system response times can result from the following factors:

1. The display refresh buffer must be updated each time a task updates a location within system memory being windowed to the display screen. Control software, usually the OS, must monitor and detect the occurrence of this condition;

2. Scrolling data within one or more of the display windows requires the corresponding locations in the display refresh buffer to be updated. This may be better appreciated with reference to Figure 3 which shows the case of non-overlapping windows as in Figure 2A. Scrolling is accomplished by moving the viewable window within the system memory. A corresponding technique is used when scrolling data in overlapping windows as in Figure 2B; and

3. Whenever window sizes or positions are changed, the display refresh buffer must be updated with the appropriate locations for the system memory.

[0005] It is therefore an object of the present invention to provide a multiple data window display on a computer display that does not adversely effect the system response times as the number of data windows is increased or, in other words, to provide a multiple data window display that is especially effective for use in multi-tasking environments.

[0006] The foregoing can be attained by providing a multiple window display system including a repeatedly scanned display device, a screen buffer having display data element locations mapped directly onto the display areas of the display device and accessing means traversing the display data element locations in synchronism with the traverse of the display areas of the display device and a facility for compiling, from, potentially, a plurality of windows generated independently by individual respective users, an aggregate of data elements to be displayed, characterised in that the compiling facility is controlled by a picture matrix having compile control locations mapped directly onto the display areas of the display device and is directly responsive to the contents of the control locations to automatically filter the available data elements from the various windows, display area by display area.

[0007] The term "user" is adopted to span task, processor or operator since to the display there is no apparent difference between these.

[0008] The above can be achieved by both hardware and software arrangements. With respect to hardware implementation, plural screen buffers are simultaneously read out in a cyclic manner, and task selection means couples the output of a single one of the buffers to video output at any given time. For any given point on the screen, the data displayed originates from a selected buffer appropriate to the over-all composition producing a screen picture compiled from more than one of the screen buffers. The task selection means may be a separate task selection buffer and decoder, in which case the task selection buffer is synchronously addressed with the screen buffers and the decoder enables the read out of a single one of the screen buffers for any point on the display screen. Alternatively, one of the screen buffers may be designated to perform the operation of the task selection buffer. The display data in the designated screen buffer is non-transparent in the sense that it cannot, at a location corresponding to a given screen location, also be used for display data for that screen location, since that buffer location is loaded with unique selection code used to indicate one of the other buffers from which the data for that location is to be taken. The absence of one of these selection codes at the accessed non-transparent buffer location allows the data at that location to be displayed, as a default condition, at the corresponding screen location. In this way, it will be apparent how the display is compiled from data, in part, from the non-transparent buffer and, in part, from the other screen buffers.

[0009] Software implementation makes extensive use of system memory. The system memory provides presentation spaces for receiving application data for plural windows of the displayable area. Each window defines the whole or a subset of a corresponding presentation space. A window priority matrix mapped to the display screen filters the data from the windows of the presentation spaces to the screen buffer to designate which of the data will be shown in corresponding positions of the display screen. In a hybrid version, display data filtering can be performed both on loading a screen buffer and also on selective read out of the screen buffers where more than one such is provided

[0010] The present invention will be described further by way of example with reference to various embodiments of the invention as described hereinafter and illustrated in some of the accompanying drawing, others of which illustrate the prior art arrangements. In the drawings:-

Figure 1 is a block diagram of a prior art raster scanned CRT display generator;

Figure 2, in sections A and B, illustrates the relationship of system memory to multiple window displays for non-overlapping and overlapping windows, respectively, as produced by the prior art raster scanned CRT display generator of Figure 1;

Figure 3 illustrates the technique for producing scrolling of data in a non-overlapping window display;

Figure 4 is a block diagram of one hardware embodiment of a raster scanned CRT display generator according to the present invention;

Figure 5 illustrates the buffer maps and resultant display of a simple case of a two task display with the screen divided vertically;

Figure 6 is a block diagram of an alternative hardware embodiment of the raster scanned CRT display generator according to the invention;

Figure 7 is a functional block diagram of one form of software driver for the raster scanned CRT display generator according to this invention;

Figure 8 is a sketch of a flow chart illustrating the process of updating the windows of the presentation spaces indicated in Figure 7; and

Figure 9 is a sketch of a flow chart illustrating the process of building the screen matrix shown in Figure 7.

[0011] The arrangements described, whether prior art or according to the present invention, are for use with a CRT display. However, CRT displays are but one of many types of display, including gas panels and liquid crystal displays, to which the present invention may be applied. Therefore, those skilled in the art will understand that the mention of CRT displays is by way of example only. It follows therefore that the term refresh buffer, while having a particular meaning as applied to CRT displays, is fully equivalent to either a hardware or software screen buffer for storing data to be displayed.

[0012] The problems of slow system response time for multiple display windows in a multi-tasking environment are overcome by utilising the implementation shown in Figure 4 wherein the same reference numerals designate the same or similar circuits as in Figure 1. Each task is given a dedicated refresh buffer which can be directly addressed by the task. However, those skilled in the art will understand that this does not logically preclude including these addresses within a system memory map. Thus, there are provided screen refresh buffers 12₁ to 12_n, one for each task and directly loadable thereby. Each refresh buffer has a corresponding selector 14₁ to 14 _n but the refresh address from the CRT controller 10 is not supplied directly to these selectors as in the prior art arrangement illustrated in Fig. 1. Instead, the current refresh address from the CRT controller 10 is supplied to one of the operand inputs of adders 20₁ to 20_n. The other operand input of each of these adders is supplied by corresponding offset registers 22₁ to 22_n. An effective refresh address for any one of the refresh buffers is generated by adding the current address provided by the CRT controller 10 with a value previously stored in the associated offset address register 22₁ to 22_n. Because a common refresh address is used in the example shown in Figure 4, the width of the formatted data must be the same for all the refresh buffers. Those skilled in the art will recognise that by separately addressing each of the refresh buffers and providing additional hardware to maintain synchronism in the read out of the buffers, it is possible to have different widths of formatted data in each of the refresh buffers. This added flexibility is achieved at the expense of greater complexity, and for purposes of providing a better understanding of the invention, only the simpler case is described.

[0013] For display refresh purposes, all the refresh buffers are accessed in parallel. A task selection memory 24, having a location for each screen display area so that the contents of the task selection memory can be referred to as a screen matrix, is also accessed in parallel, via its selector 26, using the CRT controller produced address, to enable the output of a single selected refresh buffer. This is accomplished by means of decoder 28 which responds to the contents, which are essentially codes, read out of the locations as they are scanned in synchronism with the screen buffers, and, of course, the display itself, to generate enable outputs 1 to n. These enable outputs are provided to the corresponding refresh buffers 12₁ to 12_n so that at any given time only one of the refresh buffers is enabled to supply an output to the character generator 16 and attribute logic 18. This means that the effect of the task selection memory and its screen matrix contents is to filter the display requirements of the various tasks by filtering the outputs of the corresponding task related refresh buffers.The operation may be better appreciated with reference to Figure 5 which shows the maps of the refresh buffers and task selection memory for the simple case of the display of two tasks with the screen divided vertically on a 16 row CRT with 16 characters per row. An 8-bit adder is assumed for this example. Refresh buffer 1 has numeric character data, while refresh buffer 2 has alpha character data. The offset register for refresh buffer 1 is loaded with the hexadecimal address F8'x', and the offset register for refresh buffer 2 is loaded with the hexadecimal address 10'x'. The task selection memory is mapped to display the data from task 2 in the left half of the screen and the data from task 1 in the right half of the screen. This produces the resultant CRT display illustrated.

[0014] The main features of this scheme may be summarise as follows:

1. Each task is totally independent of the others.

2. Refresh buffer updates are independently controlled solely by the corresponding tasks, thereby eliminating the need for separate refresh buffer rewriting each time any task wishes to create a display change.

3. Scrolling, on a task basis, is simply accomplished by updating the value in the corresponding address offset register.

4. Multiple window display with multi-layering is achieved through the use of the selection memory without affecting refresh buffer contents.

5. The system memory bus utilisation is reduced.

[0015] A simplified variation of the system shown in Figure 4 can be implemented as is shown in Figure 6. The task selection memory 24 is eliminated by designating one of the refresh buffers to be non-transparent and effectively take the place of the task selection memory. In the case shown in Fig. 6, refresh buffer 12₁ is so designated. The decoder 28 is retained and a gate 30 is added. Unique filter codes, loaded into the non-transparent refresh buffer, can then be used as the selection mechanism for the remaining transparent refresh buffers 12₂ to 12 . The absence of of one of these selection 2 n buffer code points at the currently accessed location in buffer 12₁, as detected by the decoder 28, causes the gate 30 to pass the data stored in that location, if any, to the character generator 16. This modification trades off a reduction in hardware against the performance loss caused by having one of the buffers non-transparent.

[0016] In the implementation illustrated in Figure 7, only two discrete hardware buffers 12₁ and 12₂ are used, though extensive use of defined areas of homogeneous system memory is made and the filtering function, still determined by a screen matrix (referenced 40 and maintained in memory) is split between selection of what is loaded into one of the buffers, relatively speaking a "one-time-function" and which of the two buffers is to provide the current output to the screen, as in the previous embodiments. The effect is the same. Though more work is done in manipulating memory, this is offset by the reduction in the frequency at which it is performed.

[0017] In the specific case illustrated, a micro computer connected to a host computer is assumed with buffer 12₂ being the micro computer buffer, but it will be understood by those skilled in the art that the pre-buffer filtering under the control of the screen matrix can be applied also to a single computer with a single buffer, provided there is sufficient system memory available. As shown, this implementation employs screen control blocks 32, window control blocks 34, presentation space control blocks 36, presentation spaces 38, and a screen matrix 40. There may be, for example, ten screen control blocks and ten sets of window control blocks, one each for each screen layout. A given screen control block 32 points to a corresponding set of window control blocks 34. Each presentation space 38 has at least one window per screen layout. The presentation spaces, but not the windows, are common to all screens. The window control block 34, corresponding to a given presentation space 38 in that screen layout, defines the origin (upper left hand corner) of the window in the presentation space, the width and height of that window in the presentation space and the origin of the window on the display screen. The screen matrix 40 is a map of the data to be displayed and, in one embodiment, maps, on a one-to-one basis by character, that which is to be displayed on the CRT screen, but the mapping could be on a pel or any other basis. All display output from the several tasks is directed to memory and, specifically, to the presentation spaces 38 rather than to the hardware refresh buffer. In the arrangement illustrated in Fig.7, a micro computer, such as the IBM (R.T.M.) Personal Computer (PC), is assumed to be attached to a host computer such as an IBM 3270 computer via a controller such as an IBM 3274 controller. For this case, the PC hardware buffer 12₂ acts as the PC presentation space. Each presentation space is assigned an identification tag and has an associated window defined by the operator or an application program as to size and screen location. When the human operator or application program adjusts the windows relative to one another, the system builds an image in the screen matrix 40 consisting of the identifying tag aligned in the appropriate locations. The matrix 40 may be created in a reverse order from that appearing on the CRT screen allowing overlapping windows to be built up by overwriting. Alternatively, by using a compare function, the matrix 40 can be created by beginning with the uppermost window and so on, down through the overlay. The choice of the method of creating the matrix 40 is based on desired system performance. The system directs display output to the refresh buffer by filtering all screen updates through the screen matrix 40, allowing a performance increment in an overlapped window system by only allowing those characters that actually need to be changed or displayed on the screen to reach the refresh buffer.Those characters that are not currently required,do not reach the refresh buffer, will not cause an unnecessary redraw. The absence of these unnecessary redraws removes the requirement for continual updates of all windows whenever the contents of one is altered.

[0018] In order to write a character, the IBM 3274 controller, a supervisor application or the PC writes character code into presentation space 38 at locations designated by that presentation space's cursor value control block. No other updates are required. the new character will be displayed or not according to whether it falls within the window designated by the corresponding window control block 34 and the portion of that window designated for display by the screen matrix 40. To use the PC buffer 12₂, a window control block is established for the PC the same as any other window control block 34 including width, height, presentation space origin, and screen origin. The screen matrix 40 is updated, and data from the window in the PC buffer defined by the window control block 34 will, to the extent allowed by the screen matrix 40, appear on the CRT screen. Data within a window may be scrolled by decrementing or incrementing the X or Y value of the window origin. No other control updates are needed. Only the corresponding window in the screen buffer is rewritten or, if a PC window, the offset register is changed. A window can be relocated on the screen by changing the origin coordinates in the window control block 34 for that window. The screen matrix 40 is updated, and the entire non-PC screen buffer is rewritten with data for non-PC tasks and codes (hexadecimal FF) for the PC. To enlarge the visible portion of a presentation space without scrolling, the window control block 34 for that presentation space 38 is first updated by altering the width and/or height. This adds to the right or bottom of window only unless there is also a change in the origin of the window. Ordinarily, there is no change in the origin unless there is an overflow off the presentation space or screen, in which case, the corresponding origin is altered. Next, the screen matrix 40 is updated by over-writing window designator codes of the matrix, starting with the lowest priority window control block. Then, all windows to non-PC refresh buffer 12 are rewritten with data from the presentation space for the non-PC windows and the hexadecimal code FF for the PC window.

[0019] Figure 8 illustrates the general shape of the process for window updating. In block 42, the presentation space (PS) row is set to the first PS row needing update; the screen row is set to the row on the display screen of the PS row; the PS column is set to the first PS column needing update; the screen column is set to the column on the screen of the PS column; the number of rows is set to the number of PS rows to be updated; and the number of columns is set to the number of PS columns to be updated. Then, the procedure which follows is done for the number of rows to be updated. For the number of columns to be updated, the matrix 40 is checked to determine if the screen row and column is within the window to be updated. This is indicated by the decision block 44. A test is made for the PC, since hardware buffer 12₂ is the presentation space for the PC, and the hexadecimal code FF is used to denote the PC window. If the decision of block 44 is yes, then the screen row and column are set to the PS row and column as indicated by block 46, and the screen column and the PS column are incremented as indicated by block 48; otherwise, the screen column and PS column are incremented without setting the screen row and column to the PS row and column. When this process is complete for the number of columns to be updated, the PS column is updated to the first PS column needing update as indicated by block 50. Then, the PS row is incremented, and the screen row is incremented as indicated by block 52.

[0020] Figure 9 illustrates the general shape of the process for building the screen matrix 40. First, the window is set to the bottom window as indicated in block 54. Then for all windows not known to be hidden, the following procedure is performed. In block 56, the column is set to the first window column on the screen, and the row is set to the first window row on the screen. For the number of window rows, the procedure indicated within block 58 is followed, and this procedure includes the procedure indicated within block 60 for the number of window columns. In block 60, the matrix row and column is set to the window identification as indicated in block 62. Next, the column is incremented as indicated by block 64. Exiting block 60 but still within block 58, the column is set to the first window column on the screen as indicated by block 66. Then, the row is incremented as indicated by block 68. Now exiting block 58, the window is incremented to the next window as indicated by block 70.

[0021] The function which draws the multiple window display is driven by any one of the following:

1. A PC cursor register update;

2. A PC text/graphics node register update;

3. A change in the window control block, screen control block, or presentation space control block; or

4. A change in the presentation space data.

[0022] Application programs may cause the draw function to occur for cases 3 and 4 above by using the following functional calls:

[0023] These functional calls are set forth in detail below:

[0024] Those skilled in the art will realise that the invention has been described by way of example making reference to but one preferred embodiment while describing or suggesting alternatives and modifications. Other alternatives and modifications will be apparent to those skilled in the art. Various hardware and software trade-offs may be made in the practice of the invention without departing from the scope of the invention as defined in the appended claims. For example, in the system shown in Figure 7, the hardware buffer 12₂ could be eliminated by providing a presentation space in system memory for the PC. Also, while character box display buffers have been assumed in the example described, the principles of the invention are equally applicable to all points addressable (APA) buffers for support of graphical displays.

Claims

1. A multiple window display system including a repeatedly scanned display device, a screen buffer (12) having display data element locations mapped directly onto the display areas of the display device and accessing means traversing the display data element locations in synchronism with the traverse of the display areas of the display device and a facility for compiling, from, potentially, a plurality of windows generated independently by individual respective users, an aggregate of data elements to be displayed, characterised in that the compiling facility is controlled by a screen matrix (24,40) having compile control locations mapped directly onto the display areas of the display device and is directly responsive to the contents of the control locations to automatically filter the available data elements from the various windows, display area by display area.

2. A display system as claimed in claim 1 wherein there are plural screen buffers (12₁-12_n), traversed in synchronism with each other, with the display areas and with the screen matrix, available for assignment to individual users, the filtering in response to the picture matrix contents being performed on the outputs from the various buffers to the display device.

3. A display system as claimed in claim 2 including address generating means (14₁-14_n) for simultaneously supplying addresses to each of said plural screen buffers, the address generating means including plural offset means (22₁ 22_n), one for each buffer, for modifying the addresses supplied to that buffer.

4. A display system as claimed in claim 3 wherein the task selection memory means is arranged to receive addresses in synchronism with addresses supplied to the plural screen buffers and further includes decoding means (28) for decoding codes generated by the task selection memory means in response to such addresses, the decoding means producing an enable signal for a selected one of the plural screen buffers at any given time.

5. A display system as claimed in claim 2 or claim 3 wherein the picture matrix is maintained in one of the buffers (12₁) and its compile control locations may contain either control codes or display data elements, but not both in any one location, the compiling facility being arranged to respond thereto by accepting the picture matrix data element, if stored in the currently accessed control location, or the data element from the indicated other buffer, if a control code is stored in the currently accessed control location in the picture matrix.

6. A display system as claimed in claim 2 or claim 3 including a character generator and wherein the task selection memory means includes one of the plural screen buffers (121) which is designated as a non-transparent screen buffer, such non-transparent screen buffer having stored therein unique code points which are used to select among the remaining screen buffers, the data in the plural screen buffers being read out in synchronism with refresh addresses supplied thereto,the task selection memory means further comprising decoding means connected to the output of the non-transparent screen buffer for decoding the unique code points and producing an enable signal for a selected one of the plural screen buffers at any given time in response to the decoding of the currently accessed code point and gating means connected to the output of the non-transparent screen buffer and responsive to the decoding means to pass the current output from the non-transparent screen buffer as a character code to the character generator when such output is decoded by the decoding means as not being a code point.

7. A display system as claimed in claim 1 including means (32,34) for establishing user associated presentation spaces (38) in homogeneous storage for receiving display data from the associated user and means for establishing windows in the respective presentation spaces, the compiling facility including control means, responsive to the picture matrix, for controlling the loading of the screen buffer by presentation space selection thus filtering the data from the various windows into the screen buffer and hence compiling the picture actually displayed on the display device.

8. A display system as claimed in claim 7 including at least one additional dedicated screen buffer (12₂) of immediate access to one user (PC), the picture matrix mapping, in addition to the data to be loaded into the one screen buffer, which screen buffer is to supply the current output to the display device, the control means enabling only one of the screen buffers for read out at any given time.

9. A display system as claimed in claim 8 in which the window control block means indicate the coordinates and dimensions of each of the windows and means, responsive to the window control blocks, are provided for creating and adjusting, in response to changes in the window control block configuration, the screen matrix and thereby establishing window priority at screen buffer locations.

10. A display system as claimed in claim 8 or claim 9 wherein each additional dedicated screen buffer stores display data for the associated user and constitutes the presentation space for that user.

Drawing