(19)
(11) EP 0 160 077 A1

(12)

(43) Date of publication:
06.11.1985 Bulletin 1985/45

(21) Application number: 84904041.0

(22) Date of filing: 22.10.1984
(51) International Patent Classification (IPC): 
H01L 27/ 092( . )
H01L 29/ 06( . )
 H01L 27/ 118( . )
(86) International application number:
PCT/US1984/001708
(87) International publication number:
WO 1985/002062 (09.05.1985 Gazette 1985/11)
(84) Designated Contracting States:
DE FR GB

(30) Priority: 31.10.1983 US 19830547549

(71) Applicant: STORAGE TECHNOLOGY PARTNERS
Louisville, CO 80028 (US)

(72) Inventors:
  • ZASIO, John, J.
    Sunnyvale, CA 94087 (US)
  • CHIANG, Michael, M.
    Cupertino, CA 95014 (US)
  • LEE, James, M.
    Cupertino, CA 95014 (US)

   


(54) CMOS INTEGRATED CIRCUIT CONFIGURATION FOR ELIMINATING LATCHUP