This invention relates to a method of synthesizing a given signal, typical of that received from sources in a real ocean environment, the method being of the kind comprising generating a noise signal, and so filtering the noise signal in accordance with linear prediction coefficients as to replicate the given signal, and to corresponding apparatus.

Acoustic trainers are required which produce signatures characteristic of signals received from sources in a real ocean environment. Traditionally, the broadband and harmonic spectral contents of targets and the broadband content of background noise have been emphasized for replication, as described in Chapter 7 and 10 of "Principles of Underwater Sound for Engineers", 2nd Edition, 1975, published by MacGraw Hill, New York. Recently, active echoes and reverberation have been added to the trainer repertoire, as described in a report entitled "Multi Application Sonar Trainer" by Raytheon Company, 1st October 1982. An additional component of the acoustic environment which is required for purposeful training is the set of transient signatures. These include occasional and also continuous biologic emissions, hatch openings and closings, ice fractures in the arctic environment, undersea seismic disturbances, and the noise of submerged wrecks moving with currents - just to name a few. The synthesis of these transients has typically resided in an instructor controlled analog tape recorder. The disadvantage of this approach is the large number of tapes required and/or the problem of and time required for locating a particular sound amongst a number of sounds on a long tape. In addition, the control of the tape recorder and its connection are cumbersome.

In a paper entitled "The Application of Linear Prediction Techniques to Background Noise Generation for Sonar Trainers" published for the International Conference on Acoustics, Speech and Signal Processing, 1983, Boston, Massachusetts, by IEEE, Charles E. Schmid describes the generation of broad band background noise by passing white noise through an all-pole filter to create the desired spectrum. Background noise changes very slowly and in this known technique a pseudo-random noise generator supplied white noise to a linear prediction coefficient filter feeding a single stage deemphasis filter coupled through a digital to analog convertor to a low-pass filter which produced the analog output. The linear prediction coefficient filter used twelve reflection coefficients representing the best fit to the desired spectrum according to least square error criteria. The article refers to an experiment conducted to test the audibility of transitions between noise condition, such as shifting sea states or ship's speeds, and concludes that in general, immediate spectral level changes greater than 1dB were perceptible and should be changed gradually in time to maintain realism.

FR-A-2 510 288 also describes a linear prediction coefficient system of synthesizing submarine sonar sounds, in particular, the sounds of propellors, diesel engines, and other such sources from which the type of ship or engine can be recognised. FR-A-2 510 288 is particularly concerned with the transients that arise in the synthesized output when one set of linear prediction coefficients is replaced by another set of linear prediction coefficients, and discloses as a solution to this problem the use of an interposed set or sets of linear prediction coefficients derived from the autocorrelation function or functions corresponding to one or more transfer functions calculated from linear interpolation between the squares of the respective initial and final transfer functions corresponding to the two sets of linear prediction coefficients between which the change is to take place. Thereby a smooth transition in the simulated sound is obtained.

In contrast to the prior art, it is an object of the present invention to provide a method and apparatus for synthesizing a transient signal.

According to one aspect of the present invention there is provided a method of the kind defined hereinbefore at the beginning, characterised in that the noise signal is a pseudo-random noise signal which changes at a sample rate, the linear prediction coefficients are derived from the covariance matrix of a respective block of consecutive signal samples of the given signal and are changed at a block rate, the given signal being divided into a set of contiguous frames and each block of the samples being obtained from a respective frame, the gain of the filtering is derived from the covariance matrix coefficients and the linear prediction coefficients and is changed in synchronism with the coefficients, and the given signal is a transient signal.

According to another aspect of the invention there is provided apparatus for synthesizing a given signal, comprising means for generating a noise signal, and a filter for so filtering the noise signal in accordance with linear prediction coefficients as to replicate the given signal, characterised in that the noise signal generating means comprises a pseudo-random noise generator the output of which changes at a sample rate, the filter is a recursive filter including multiplying means for multiplying the noise signal with the said linear predictive coefficients (b_i) and a gain coefficient (A), and means for changing the gain and linear prediction coefficients (A, b_i) in synchronism at a block rate, the linear prediction coefficients (b_i) being derived from the covariance matrix of a respective block of consecutive signal samples of the given signal, the gain coefficient (A) being derived from the covariance matrix coefficients (a_i) and the linear prediction coefficients (b_i), and the given signal being a transient signal.

A preferred embodiment of this invention provides a computer controlled synthesis system providing transient audio signals. The system is not cumbersome and is easy to use in the selection of different stored transient sounds. The digital synthesizer has denser packaging (smaller volume) for storing a large repertoire of audio sound signals, and is more reliable than the instructor controlled analog tape recorder. The method of synthesis utilizes linear prediction coding techniques to derive time-varying-filter coefficients. These coefficients are stored in digital form and are used to program a recursive filter which is driven by white noise. The resulting signatures are then an inherent part of the trainer and are generated under complete computer control. The system approximates the desired transient signature by the storage of sets of coefficients of a recursive digital filter, which coefficients are updated periodically thereby resulting in an output from the recursive filter which is a close approximation of the actual transient signature. It is assumed that an autoregressive model will provide an adequate description of the desired transient signature. The signature which is desired to be synthesized is most easily obtained from a recording of the signature which is later to be synthesized. Because the spectral content of the transient signature is time varying, the auto-regressive model is nonstationary and must be updated periodically. Therefore, the transient signature is synthesized by considering the signal to be comprised of a serial sequence of blocks of the signal. Each block of the signal has its amplitude sampled to provide 1024 samples of digital data. The autocorrelation function of the 1024 amplitude samples provides the 12 most significant autocorrelation values and a gain value which is obtained through the normalization of the autocorrelation values. A matrix equation is obtained relating the autocorrelation values of the actual signal to the unknown coefficients of a recursive filter. The system of equations of the matrix is solved for each block of data and the filter coefficients are stored. Through the synthesizer signature the coefficients are periodically updated in real-time by a control processor. The coefficients are recovered fro memory in real-time and provided to the recursive filter circuitry whose output is provided to a digital to analog converter to produce audible sound replicating the original transient signature. There is thus provided the synthesis of audio signals from stored digital data and more particularly a synthesizer in which the stored data are sets of the coefficients of a recursive filter and where each set is applied to the filter for a fixed time period, the periods totaling the duration of the synthesized audio signal.

The aforementioned aspects and other features, objects and advantages of the method and apparatus of this invention will be apparent from the following detailed description taken in conjunction with the accompanying drawings wherein:

FIG. 1 shows the waveform of the original transient audio signal which is reproduced by the synthesizer of this invention;

FIG. 2 shows a flow diagram of a time-varying recursive filter;

FIG. 3 is an analog representation of an embodiment of the synthesizer of this invention; and

FIG. 4 is a digital implementation of a preferred embodiment of the synthesizer of this invention.

The transient analog signal 10 of figure 1 which is to be simulated by the apparatus of this invention is operated upon by first partitioning the analog signal into a sequence of frames 11. The time duration of each frame is determined by examining the power spectral characteristics of the signal over a multiple of frame durations and then choosing the maximum duration over which those spectral characteristics are essentially constant. The greater the frequency extent of the power distribution, the shorter is the time period for that frame. The signal within each frame is then periodically sampled at a rate T_c exceeding the Nyquist rate and stored in digital form. The set of samples 12 which is stored for each signal frame is a block of digital data. One block of data results for each signal frame. The number of sample points per block is determined by the frame duration and by the highest frequency contained in the data signal waveform which is to be synthesized. At least two and preferably four data points are obtained within a signal frame for each cycle of the highest frequency component within that frame. The sample data points contained within each block are autocorrelated and a selected number of the autocorrelation coefficients are determined. The number of autocorrelations values which are used is equal to the least number required to reduce the autocorrelation coefficient recursive prediction residual to an acceptable fraction of the zero lag autocorrelation value. An acceptable fraction is commonly 0.01. The autocorrelation values are normalized by a factor R which provides unity value of the autocorrelation coefficient at zero displacement. For the waveforms and block times utilized in embodiments of this invention, it is found that twelve autocorrelation coefficients are adequate to produce synthesized audio signals which are indistinguishable from the original signal from which the autocorrelation functions were obtained. The autocorrelation function coefficients have been designated by the letters a₀, a₁, ... a_m with the subscript indicating the relative lag displacement in the autocorrelated data block. The unity value coefficient a₀ is the normalized autocorrelation coefficient at zero relative displacement.

The covariance matrix is next employed to determine the values for the multiplication factors "b" applied to the output of each of the delay units of the recursive filter as shown in FIG. 2. The covariance matrix is given below where "a" with subscripts are the normalized autocorrelation coefficient values. "b" with subscripts are the linear prediction coefficients obtained from the covariance matrix and are the multiplying factors which are applied to the multipliers of the recursive filter in addition to the gain factor A.

The transient signatures are generated by feeding "white" (uncorrelated) noise samples S(n) through a time-varying recursive digital filter. The transfer function of this filter, G(Z), is given as
${\text{G(Z) = -A/(1 - b₁z}}^{\text{-}}{\text{¹ - b₂z}}^{\text{-}}{\text{² ..., - b}}_{\text{m}}{\text{z}}^{\text{-m}}\text{)}$
where A is the filter gain, and the b's are the multiplier coefficients. A flow diagram of the recursive filter 20 is shown in FIG. 2. The random noise signal S(n) produces an amplitude modulated signal which changes its amplitude from one level to another at the same rate as that at which the original analog signal was sampled. The random noise signal is multiplied in multiplier 22 by the factor A, where A is determined from the normalization of the autocorrelation function as explained earlier and is constant during each block. The output of multiplier 22 is applied to an adder 23 which provides the output y(n) (n = total number of samples of the signal being simulated) of the recursive filter 20 and also provides y(n) to the first delay stage 24' having a delay which is equal to the intersample interval. The output y(n-1) of the delay unit 24' is transferred to a second delay unit 24" and also is provided to a multiplier 25' which multiplies the output y(n-1) by the coefficient b₁ obtained from the covariance matrix. The output of multiplier 25' is provided as an input to the adder 23. The process of delaying the earlier sampled values y(n-2), ..., y(n-m) continues in the remaining delay units 24 whose outputs are respectively multiplied by the coefficients b₂, b₃, b₄... bm (constant during each block) in multipliers 25 whose outputs are in turn applied as inputs to adder 23. The transfer function of the recursive filter 20 of FIG. 2 is that given by the transfer function of the preceding equation.

Referring now to FIG. 3, there is shown an analog representation of a circuit for the implementation of the synthesizer of this invention. The analog synthesizer 50 comprises a pseudo-random noise generator 51 which produces an analog output signal having a value between zero and one which changes with every clock pulse input, the clock pulses having a period T_c which is the same period as that at which the original signal 10 was sampled. The clock pulses are provided by clock pulse generator 52 which also provides the clock pulses to the counter 53 having a modulo F where F is the number of samples of the analog signal in one block time. The counter 53 provides block pulses whose period T_fis equal to the period of the clock pulses T_c multiplied by the number of samples F, T_f = T_c · F. At the end of each block a pulse having period T_f is applied to the memory 54 to produce a new set of analog numbers A₁, -b₁, ..., -b_m. The memory 54 is represented as a multi-pole switch having n + 1 poles with the switch arms 55 moving by one switch position in response to each energization of the switch coil 56 by the pulse T_f. Each set of coefficients appears at a selected position of switch arms 25. As shown in FIG. 2, the initial position of the switch arm provides the set of coefficients A, -b₁, ..., -b_m. The second switch arm position which would exist as a result of one pulse T_fwould provide a different set of coefficients for the second block time; namely, A', -b₁ʼ, ..., b_m'. The last set of coefficients corresponding to the last block of the sampled input signal is provided by the memory 54 as A^k, b₁^k, ..., -b_m^k, where k is the number of blocks.

The output of the pseudo-random noise generator 51 is provided to a multiplier 57 whose other input during a block time is the amplitude coefficient A. The output of multiplier 57 is provided at one input of the summing circuit 58. The output of the summing circuit 58 is provided as the input to a delay unit 59₁ whose output is provided to delay unit 59₂ and to multiplier 57₁. The other input to multiplier 57₁ is the coefficient -b₁ provided by the memory 54 during the first time block. The output of multiplier 57₁ is provided at another input to the summing circuit 58. The time delay provided by delay 59₁ is equal to the interpulse period T_cof the clock pulses provided by generator 52. The circuit 50 has a cascade of delay elements 59₂ , ..., 59_m connected serially to the delay 59₁ The output of the summer circuit is the desired simulated signal which corresponds to the original signal which is being simulated. This simulated signal is designated as y(n). The output of each delay unit 59₁. 59₂, ..., 59_m is correspondingly y(n - 1), y(n - 2), ..., y(n - m). The circuit 50 will, therefore, provide an output y(n) in accordance with the equation presented earlier which sounds like the original audio signal which was sampled to provide coefficients b in the manner described earlier and stored in memory 54.

Referring now to the block diagram of FIG. 4 showing an embodiment of the invention, the coefficients which have been computed in the manner detailed in the preceding paragraphs are stored in sequential addresses of a RAM or ROM coefficient memory 31. In the example of the embodiment of this invention, it will be assumed that seven coefficients b₁ through b₇ of FIG. 2 together with the gain factor A are adequate for the synthesis and are stored in the first eight addresses 0, ..., 7 of memory 31. Addresses 8, ..., 15 will contain the coefficients A', -b₁', ..., -b₇'. Successive groups of eight addresses of RAM 31 have successive groups of coefficients A, -b₁ through -b₇, (one group for each block of signal data) with the total number of groups of coefficients equaling the number of blocks of the original audio signal which is to be simulated by the synthesizer 30 of FIG. 4. The address generator 32 comprises a counter 33 of modulo m (m = 8 for the group of eight addresses), a counter 34 of modulo L (L = number of sample points per block), a block counter 341 responsive to the Lth count of counter 34 and a buffer register 35. Counter 33 has clock input pulses provided by clock pulse generator 61 having a period T_c/m equal to the sampling period of the original audio signal divided by the number of coefficients "m" in a group (m = 8 in this example). Counter 34 has input clock pulses having a period T_c obtained from the modulo eight output line 44 of counter 33. Counter 34 is of modulo L, where L is the number of samples per block of input signal. The output pulse of counter 34 at the count of L increments by one the block counter 341. The output count of counter 341 is provided to the more significant bits (MSB) of buffer register 35 which provide the block address to the memory 31. The output count on line 33' of counter 33 is provided as the least significant bits (LSB) of register 35. Therefore, the output address of address generator 32 on line 321 will initially produce (through adder 65 and register 66) the sequential addresses 0, ..., 7 to the memory 31 repetitively for the number of samples L in the block, followed by the addresses 8, ..., 15, repeated L times, etc. Therefore, the memory 31 output will be a group of sequential coefficients A, -b₁, ..., -b_m at a period T_c/8 (for addresses 1 through 8) repeated L times because of the modulo L of counter 34. Block counter 341 which is incremented by one changes the MSB of register 35 so that the addresses 8, ..., 15 of memory 31 provide the next group of coefficients A', -b'₁, ..., -b'_mrepeated L times also. This process of providing successive groups of coefficients to synthesize blocks of a signal continues until the memory 31 addresses contain no coefficients.

The pseudo-random noise generator 36 produces a 16-bit word for every 16-bit coefficient provided by memory 31. The word produced by noise generator 36 is stored in a 16-bit register 37. The memory 31 also produces the coefficients as 16-bit digital words and stores the words in register 38. Registers 37 and 38 provide digital inputs to multiplier 39 which provides a 32-bit output word to adder 40. Adder 40 provides an input to accumulator register 41 whose output is provided as a second input to adder 40 and whose output is provided also as an input to switch 42. Switch 42 is open except when closed in response to a pulse on line 44 provided by the modulo m output of counter 33 to the random access memory 45. The counter 33 of modulo 8 provides clock pulses T_c on line 44 as an input to counter 47 which increments a write address to memory 45 at a time such that the switch 42 provides the output y(n) as an input to memory 45. Switch 46 is also responsive to clock pulses at the period T_c provided by counter 33 on line 44. Closing of switch 46 by a pulse on line 44 allows the 16-bit number from random number generator 36 to be provided to the register 37 at that time as stated earlier. Since pulses in lines 44 only occur during the eighth count of counter 33, during the remaining seven other outputs of counter 33, switch 46 has an input 461 connected to the output of memory 45. The write address provided by counter 47 at output 48 is provided as one input to subtract circuit 49. The other input to subtractor 49 is the output count from counter 33 on line 33'. The read address is provided at the time that the switch 46 input line 461 is providing a signal corresponding to that address from memory 45 to the register 37.

In operation, the circuit of FIG. 4 provides a newly calculated value of y(n) at intervals corresponding to the original sampling period T_c. Initially, the RAM 31 generates an amplitude coefficient A which is stored in register 38 and multiplied in multiplier 39 by the output x(n) of the random noise generator 38 provided to register 37 through closed switch 46. The product A · x(n) is stored in accumulation register 41. Switch 42 is open and no output appears to be read into memory 45 through its input register 60. At the next occurrence of clock pulse T_c, the switch 46 connects register 37 with the output of memory 45. Subtractor circuit 49 has an input address 48 and an input 33' which causes the next read address presented to memory 45 to be the address next preceding that at which the output y(n) has been written in by write address counter 47. This address will cause the value y(n - 1) to be read out to the register 37. At the same time, the address generator 32 is indexed to the second address of memory 31 and the value -b₁ will be read out and provided to register 38. The resulting product provided by multiplier 39, $\text{-b₁y(n - 1),}$ is added in adder 40 to the previously stored value Ax(n) in register 41 and the sum $\text{(Ax(n) - b₁y(n - 1))}$ is then stored in accumulation register 41. The next timing pulse T_c/m causes the read address provided to memory 45 to be decremented by one and provide the output y(n - 2) to the register 37 through switch 46. At the same time, the address provided to memory 31 is incremented by one to provide the coefficient -b₂ to register 38. The contents of the registers 37, 38 are multiplied in multiplier 39 to provide $\text{-b₂y(n - 2)}$ which is added in adder 40 to the exiting contents $\text{(Ax(n) - b₁y(n - 1))}$ of accumulation register 41 and the result $\text{(Ax(n) - b₁y(n - 1) - b₂y(n - 2))}$ is then stored in register 41. This process continues until the last coefficient b₇ at the eighth address of memory 31 is provided to register 38 and the contents of memory 45 at the address containing y(n - 7) are multiplied, added and accumulated in register 41 which is then cleared and read out through switch 42 by a pulse on line 44 to input register 60. Register 60 then contains the output y(n + 1) (which becomes the new value of y(n)) which is written into the next sequential address of memory 45 inasmuch as the write address counter 47 responsive to a pulse at the rate l/T_con line 44 from counter 33 has caused the write address on line 48 to be incremented by one. When the new value of y(n) appears at the output of register 41, switch 42 is caused to close by a pulse on line 44 to thereby provide a new y(n) output and to provide this new value as the input to the memory 45 at the incremented address. The output y(n) of switch 42 is in digital form and is converted to an analog signal Y(n) in digital-to-analog converter 62. Signal Y(n) is smoothed in filter 63 to remove the sampling frequency components, centered at frequencies 1/T_c and multiples thereof, and to thereby provide the synthesized analog signal y(t) that is desired corresponding to the blocks of coefficients selected by the initial address provided by start address register 64 which is added in adder 65 to the output of buffer register 35 and stored in register 66 before being provided to coefficient memory 31. The computer 67 is programmed to provide one or a series of start addresses at predetermined time intervals to register 64 in response to a START command to thereby produce one or a series of timed, different synthesized audio output signals y(t), each corresponding to a different start address.

Having described a preferred embodiment of the invention, it will be apparent to one of skill in the art that other embodiments incorporating its concept may be used. It is believed, therefore, that this invention should not be restricted to the disclosed embodiment but rather should be limited only by the scope of the appended claims.