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(11) | EP 0 238 113 A3 |
(12) | EUROPEAN PATENT APPLICATION |
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(54) | Data display |
(57) A logic processor-controlled data display apparatus having a display memory in which
pixel data representing text for display is stored in bit-map form. The pixel data
is produced for each display from character data stored in a background memory. When
the character data is stored in bit-map form it can be read directly from the background
memory bit-by-bit and written into the display memory as the pixel data. However,
this process takes a large number of programme steps, so that the transfer of the
data is relatively slow. The present invention provides for the storage in the background
memory of character data in the form of machine code sub-routines. The sub-routine
for a character contains instructions for identifying the shape-defining pixels (dots)
of the character relative to a base dot position and the sub-routine is run to write
these pixels into the display memory following location of the base dot position in
the display memory. Figures 2 and 4 exemplify the invention. |