(19)
(11) EP 0 279 231 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
03.07.1991 Bulletin 1991/27

(43) Date of publication A2:
24.08.1988 Bulletin 1988/34

(21) Application number: 88101084.7

(22) Date of filing: 26.01.1988
(51) International Patent Classification (IPC)4G09G 1/16
(84) Designated Contracting States:
DE FR GB IT

(30) Priority: 12.02.1987 US 13849

(71) Applicant: International Business Machines Corporation
Armonk, N.Y. 10504 (US)

(72) Inventors:
  • Mansfield, Robert Lockwood
    Austin Texas 78727 (US)
  • Spencer, Alexander Koos
    Austin Texas 78727 (US)
  • St. Clair, Joe Christopher
    Round Rock Texas 78681 (US)

(74) Representative: Bailey, Geoffrey Alan 
IBM United Kingdom Limited Intellectual Property Department Hursley Park
Winchester Hampshire SO21 2JN
Winchester Hampshire SO21 2JN (GB)


(56) References cited: : 
   
       


    (54) A graphics function controller for a high performance video display system


    (57) A processing system is provided that includes an external device connected to a processor. The external device has the capability of responding to external device commands wherein each of these external device commands is performed within at least one fixed time period. The processor provides these external device commands and further includes the means for executing instructions that not only specify the external device commands but also specify at least one internal command to be performed internally by the processor simultaneously with the performance of the external commands by the external device. In the disclosed embodiment, a graphics display system is provided that includes a system processor, a graphics processor, a graphics memory and a display device. The graphics processor receives instructions from the system processor. These instructions specify commands to be executed in both the graphics processor and in the graphics memory. The commands executed in the graphics memory are executed within a fixed time period. The commands executed by the graphics processor are also executed within this fixed time period simultaneously with the execution of the commands in the graphics memory. The graphics processor further includes control circuitry for controlling the execu­tion of the graphics processor commands. The control circuitry is connected to several registers in the graphics processor which receive instructions from the system processor. These system processor instructions specify commands from both the graphics memory and the graphics processor. The control circuitry provides for the execution of these instructions in these registers in a serial loop fashion.







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