|
(11) | EP 0 297 918 A3 |
(12) | EUROPEAN PATENT APPLICATION |
|
|
|
|
|||||||||||||||||||||||||||
(54) | Digital synchronisation |
(57) A method and apparatus for detection of a digital synchronisation word, or sequence
of words, uses a state machine. The state diagram is implemented in a detector memory
with feedback of the memory output through a latch to constitute part of the next
memory address. The input data is used bit by bit as another part of the detector
memory address. A decoder memory decodes the state information in the detector memory
output and produces synchronisation information. A particular state diagram for sync acquisition includes feedback paths. A particular state diagram for lock maintenance enables lock to be maintained depending on the number of errors in the successive detected syne words. |