[0001] This invention relates to the field of error amplifiers for use with autonomous parallel
operated voltage or current regulators with transconductance type power amplifiers;
e.g., current-mode controlled DC/DC converters. More particularly, this invention
relates to error amplifiers with asymmetrical output current capabilities ganged together
to enable fully redundant, autonomous control of parallel operated systems for modularly
increased current capability and for higher reliability.
[0002] A common practice among designers of current-mode controlled DC to DC voltage converters
is to design a modular system with parallel operated power cells. Then, in order to
develop a system for specific applications, the designer need only gang together an
appropriate number of these cells to achieve the desired power level.
[0003] Fig. 1 shows a converter cell having a transconductance type power amplifier used
as a voltage regulator. The supply voltage V
S is connected to input node 1 providing power for the transconductance amplifier 2.
The error amplifier 3 compares the reference voltage V
ref 4 with a fraction V
frac 9 of output voltage V
out 10 and controls the voltage on control terminal 8 of the transconductance amplifier
2 so that the output current 11 generates the required output voltage V
out 10 on the resistor load 7. Typically, V
ref is approximately equal to V
frac. The fraction V
frac 9 of the output voltage V
out 10 is typically generated by a voltage divider network formed across a pair of resistors
R₁ and R₂ coupled between the output of the transconductance amplifier 2 and ground.
[0004] Fig. 2 shows the prior art of parallel connection of multiple transconductance cells
which is used to increase the system's output current capability. The system of Figure
2 comprises three converter cells 30a, 30b and 30c; of course more or less such cells
may be used as appropriate. Each of cells 30a, 30b and 30C is comprised of a transconductance
type power-amplifier (DC converter) 32, an error amplifier 34 and a reference supply
V
ref 36. Each identifying number for the elements of each cell is shown with an a, b or
c subscript as appropriate. Where a cell element is referred to without an alphabetic
modifier it is understood that all similar elements in each cell is being described.
[0005] A supply voltage to be converted is applied to the DC input terminal 38 which is
electrically coupled to the input 40 of each DC converter 32. The DC converter outputs
42 are electrically coupled together at the node 44. The node 44 is also coupled to
voltage divider resistor 46, load 50 and the output node 52. Voltage divider resistor
46 is also coupled to the node 48. The node 48 is coupled to the voltage divider resistor
54. The voltage divider resistor 54 and the load 50 are each coupled to ground.
[0006] The node 48 is coupled to the error amplifier input 56a. The voltage at the error
amplifier input 56a is compared to the reference V
ref 36a to determine whether an error has occurred. Any error in the DC voltage on node
44 is amplified by the error amplifier 34a and applied to error amplifier output 58a.
The voltage on the error amplifier output 58a is applied to each input 64 of each
transconductance type power amplifier 32. The signal applied to the control input
64 drives the output currents I
out 43 of the transconductance type power amplifiers 32 to produce the required output
voltage on the load 50 so that the sense voltage 56a is always approximately equal
with reference voltage 62a. The sum of the output currents 43 of the individual cells
gives the output current 45 of the system. If the transconductance of the transconductance
amplifier 32 in each cell 30 is nearly equal to each other then the cells will approximately
equally share the output current 45 because the control voltage 64 is common for each
cell. If the output current of each cell is limited to I
max, by the allowed power dissipation, the total output current of a system of n cells
is n * I
max. In this case n = 3 for the three cells. One disadvantage of this system is that
it uses only one of the error amplifiers. The cell with the active error amplifier,
34a, controls the whole system and is normally called the master. If the master error
amplifier 34a fails, the whole system will fail, i.e., the system is not fully redundant.
The other disadvantage of this solution is that two control connection points (or
pins in case of integrated solutions) per cell are needed to achieve the parallel
operation (64, 58).
[0007] It is an object of the present invention to provide an error amplifier circuit for
use in high reliability fully redundant masterless modular applications.
[0008] It is another object of the present invention to provide this feature with preferably
only one control access per module.
[0009] The invention is defined by the independent claims.
[0010] The invention disclosed in this patent is an error amplifier system for use with
multiple parallel operated voltage or current regulators with transconductance type
power amplifiers. The error amplifiers may be used for example with linear voltage
regulators or dc to dc converters. The system includes a plurality of error amplifiers.
Each of the error amplifiers has an output means, a means for electrically coupling
each of the output means to every other such output means and a means for establishing
an asymmetrical current capability for each of the output means. The asymmetrical
current capability has a current supplying or source current capability greater than
a current consuming or sink current capability. Furthermore, each amplifier has an
internal sense circuitry to sense when the amplifier is operating in saturation on
the sink side, outside of its linear range and changes the voltage on its reference
input by a small amount so that the resulting feedback is positive, consequently creating
a small hysteresis to ensure oscillation-free transition between the amplifier's active
and inactive state.
Figure 1 shows a voltage regulator cell using a transconductance type power amplifier.
Figure 2 shows a block diagram of the prior art.
Figure 3 shows a block diagram of the present invention.
Figure 4 and Figure 5 each show a first and second circuit implementation of the error
amplifier of the present invention.
[0011] Like numerals will be used for identical elements shown in the various figures and
their circuits to facilitate understanding.
[0012] The block diagram of the preferred embodiment shown in Figure 3 is similar to the
block diagram of the prior art showed in Figure 2, except for the following items.
The node 48 which is coupled between voltage divider resistors 46 and 54 and error
amplifier input 56a is also coupled to error amplifier inputs 56b and 56c. The error
amplifier 58 outputs are internally connected to the control inputs 64 of the transconductance
amplifiers 32. Each error amplifier output 58a, 58b and 58c is coupled to one another
and to form a common control node 78. A resistor 72 is included in series with the
reference voltage circuit along with an error amplifier current control node 74.
[0013] Each of the error amplifiers 34a, 34b and 34c of the present invention are designed
so that only one error amplifier will operate at any given time. Only the error amplifier
which has the highest voltage on its reference input 62 will be active. All the other
error amplifiers will be inactive, and thus sinking their maximum sink current. The
asymmetrical output current capability of the error amplifiers enables the only active
error amplifier one to source a current larger than the sum of all the inactive amplifiers
and thereby to control the voltage on node 78 and through this voltage the output
current and voltage of the whole system.
[0014] Each error amplifier has an internal sense circuitry to sense when it is inactive.
The current control node 74 sinks a small amount of current in the amplifier's inactive
state. The current on node 74 causes a small voltage drop on resistor 72 which lowers
the potential of the reference input 62 of the inactive error amplifiers ensuring
that an inactive amplifier does not turn on and off due to secondary effects, including
loading effects on the output of the active error amplifier due to its finite output
impedance, noise and drift.
[0015] The circuit shown in Figure 4 is one circuit implementation of such an error amplifier.
The error amplifier of Figure 4 is a conventional design except for the current limit
circuitry and transistor 150. This circuit has a voltage supply node 81 and a ground
node 82. The input stage of the circuit consist of a differential amplifier 91. The
differential amp 91 has inverting input 84 coupled to the base of PNP transistor 86
and non-inverting reference input 88 coupled to the base of PNP transistor 90. The
collectors of transistors 86 and 90 are coupled into the collectors of a two transistor
NPN current mirror 93. The collector of PNP transistor 86 is coupled to the collector
of NPN transistor 92. The collector of PNP 90 is coupled to the collector of NPN transistor
94. The bases of transistors 92 and 94 are coupled together and also to the collector
of transistor 92. The emitters of transistors 92 and 94 are coupled to ground 82.
[0016] The emitter of transistor 86 is coupled to a resistor 96. The emitter of transistor
90 is coupled to another resistor 98. The resistors 96 and 98 are each coupled to
the collector of a transistor 100. The transistors 100 and 102 are a current mirror
PNP pair 101 used to bias the differential amplifier 91. The bases of transistors
100 and 102 are coupled together. The emitter of transistor 102 is coupled to the
supply voltage 81 through resistor 104.
[0017] The emitter of transistor 100 is coupled to the supply voltage 81 through resistor
106. The collector of transistor 102 is coupled to the bases of transistor 102 and
100 and also to a resistor 108. The resistor 108 is also coupled to ground 82. As
will be described below, the emitter of transistor 100 plays a role in the sinkside
current limit. The emitter of transistor 100 is coupled to the collector of NPN transistor
110. The emitter of transistor 110 is coupled to ground 82. The base of transistor
110 is coupled to the base and collector of NPN transistor 112.
[0018] The emitter of transistor 112 is coupled to ground 82. The collector of transistor
112 is also coupled to sink current sense resistor 114 and to the collector of PNP
transistor 116. The sink current sense resistor R
sink 114 is also coupled to ground. The emitter of transistor 116 is coupled to the output
118 of the error amplifier. The base of transistor 102 also drives the base of PNP
transistor 120. The emitter of transistor 120 is coupled to resistor 122. Resistor
122 is also coupled to the voltage supply 81. The collector of transistor 120 is coupled
to the collector and base of NPN transistor 124 and the base of output high drive
transistor 126.
[0019] The collector of transistor 94 is coupled to the base of transistor 128, capacitor
130 and positive electrode of diode 132. The collector of transistor 128 is coupled
to the voltage supply 81. The emitter of transistor 128 is coupled to the base of
transistor 134 and to the resistor 136. The resistor 136 is also coupled to ground
82. The collector of transistor 134 is coupled to the negative terminal of diode 132,
the base of transistor 138, to the second terminal of capacitor 130. The emitter of
transistor 134 is coupled to resistor 140. The other terminal of resistor 140 is coupled
to ground 82.
[0020] The collector of PNP transistor 138 is coupled to the base of transistor 138 and
to the collector of transistor 134 and the base of transistor 116. The emitter of
transistor 138, coupled to the emitter of NPN transistor 124. The collector of transistor
126 is coupled to the base of PNP transistor 142 and to the source current sense resistor
144. Source current sense resistor 144 is also coupled to the voltage supply 81. The
emitter of PNP transistor 142 is coupled to the voltage supply 81. The collector of
transistor 142 is coupled to the collector and base of transistor 146 and to the base
of transistor 148. The emitters of transistors 146 and 148 are coupled to ground 82.
The collector of transistor 148 is coupled to the emitter of transistor 120.
[0021] The base of NPN transistor 150 is connected to the bases of transistors 110 and 112,
its emitter is connected to the ground 82, and its collector to the amplifier's noninverting
input 88.
[0022] The sink-side current limit works as follows. The sink direction load current flows
through sense resistor R
sink 114. As long as the voltage drop on this resistor is lower than V
BE (∼700mV at room temp) the transistors 110 and 150 are off, so that their collector
current is approximately zero. As the current sunk by the amplifier increases, the
voltage drop across transistor 110 exceeds V
be and turns on and pulls down the emitter of transistor 100. This decreases the bias
current of the differential amplifier 101 transistors 86 and 90, the available base
current of the main amplifier transistors 128 and 134 and ultimately the available
base-current of output transistor 116 in effect limiting the available output sink
current. The sink current-limit loop-gain can be influenced by the emitter area ratio
of transistors 110 and 112. If the sink current limit is active, the transistor 110
conducts current and so does the transistor 150 because its base-emitter diode is
connected in parallel with the one of transistor 110. The current sunk by the collector
of 150 in this case flows into node 88 and causes a voltage drop on any resistor connected
externally to this node as was said in connection with Figure 3.
[0023] The trigger level for the source side current limit must be higher than the sum of
the maximum sink currents of the maximum number of parallel operated systems. The
circuit operates similarly as the low side limit. If the voltage drop on the resistor
144 source current sense resistor exceeds 1 V
BE voltage drop, the transistor 142 turns on, its current is turned around by transistors
146-148 of the current mirror and pulls down the emitter of transistor 120 thereby
limiting the collector current of the transistor 120 and the available base current
of the transistor 126 output transistor.
[0024] Figure 5 shows another possible implementation of the error amplifier. The asymmetrical
output current capability is an inherent characteristic of the emitter-follower output
stage, the maximum sink current being limited by the pull-down current 222 while the
maximum source current is limited by the pullup current 218 multiplied by the gain
factorα of the output transistor 220.
[0025] If the output stage sinks its maximum current the main amplifier transistor 214 is
nearly in saturation and 216 turns on sinking some current from node 226 (the noninverting
input of the amplifier) thereby creating positive feedback. The amount of current
is limited by resistor 228.
[0026] The present invention is described with respect to a preferred embodiment. Various
modifications which become apparent to one skilled in the art after studying this
document are deemed to be within the spirit and scope of the present invention.
1. An error amplifier system for use with a transconductance type power amplifier
comprising:
a. a plurality of error amplifiers, each of said error amplifiers having an output
means;
b. means for electrically coupling each of said output means to every other said output
means;
c. means for establishing an asymmetrical current capacity for each of said output
means, said asymmetrical current capacity having a current sourcing capability greater
than a current sinking capability.
2. The error amplifier system according to claim 1 wherein each one of said plurality
of error amplifier further comprises:
a. a reference voltage supply;
b. a first amplifier input coupled to said reference voltage supply;
c. a second amplifier input coupled to the second amplifier input of every other said
amplifier in the system;
d. an asymmetrically limited output current having a maximum sinking output current
level;
e. a sense circuit for sensing operation of the amplifier at the maximum sinking output
current level and forming a signal; and
f. positive feedback means for changing the reference voltage supply in response to
said signal.
3. The error amplifier system according to claim 2 wherein said current sourcing capability
is greater than a sum of all of said current sinking capabilities.
4. The error amplifier system according to claim 3 wherein said error amplifier comprises
an operational amplifier.
5. The error amplifier system according to claim 4 wherein said transconductance type
power amplifier comprises a plurality of supply stages electrically coupled to one
another.
6. The error amplifier system according to claim 5 wherein each of said supply stages
includes an error amplifier.
7. The error amplifier system according to claim 6 wherein the transconductance type
power amplifier is a dc to dc converter.
8. The error amplifier system according to claim 6 wherein the transconductance type
power amplifier is a linear voltage regulator.
9. An error amplifier system for use with a dc voltage to dc voltage converter comprising:
a. a plurality of dc converter stages electrically coupled for increased current capability;
b. a plurality of error amplifiers, each of said error amplifiers comprising an operational
amplifier;
c. each of said stages having one of said error amplifiers;
d. each of said error amplifiers having:
(1) a current sourcing means;
(2) a current sinking means;
(3) an output means coupled to said current sourcing means and to said current sinking
means;
e. means for electrically coupling each of said output means to every other said output
means;
f. means for establishing an asymmetrical current limit for each of said error amplifiers,
having a first current carrying capability for said source current means greater than
a second current carrying capability for said sink current means,
whereby said first current carrying capability for each of said error amplifiers is
greater than a combined value of all of said second current carrying capabilities.
10. An error amplifier comprising:
a. plurality of differential amplifiers, each said amplifier having:
(1) a first input, wherein each said first input of each said amplifier is coupled
to every other said first input;
(2) a second input, wherein each said second input of each said amplifier is coupled
to every other said second input;
(3) an output, each said output of each said amplifier is coupled to every other said
output;
(4) an output source current capability;
(5) an output sink current capability; and
(6) an asymmetrical current output current capability; and
b. a reference voltage coupled to said second inputs
whereby each said source current capability can source a sum of all said sink current
capabilities.
11. The error amplifier according to claim 10 wherein each said amplifier further
comprises:
a. a maximum sink current output level;
b. a sense circuit for sensing whether the amplifier is operating at its maximum sink
current output level;
c. response means for generating a signal if the sense circuit senses that the amplifier
is operating at its maximum sink current output level; and
d. means for changing said reference voltage in response to said signal resulting
in positive feedback.