Semiconductor integrated circuit and method of making the same

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EP 0 404 180 A3

(12)	EUROPEAN PATENT APPLICATION

(88)	Date of publication A3:
	11.09.1991 Bulletin 1991/37

(43)	Date of publication A2:
	27.12.1990 Bulletin 1990/52

(21)	Application number: 90111880.2

(22)	Date of filing: 22.06.1990

(51)	International Patent Classification (IPC)⁵: H01L 27/105, H01L 27/06

(84)	Designated Contracting States:
	DE FR GB

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Priority:

22.06.1989 JP 160055/89

(71)	Applicant: KABUSHIKI KAISHA TOSHIBA
	Kawasaki-shi, Kanagawa-ken 210 (JP)

(72)	Inventors:
	Taguchi, Minoru, c/o Intellectual Property Div. Minato-ku, Tokyo 105 (JP) Mochizuki, Hiroshi, c/o Intellectual Property Div Minato-ku, Tokyo 105 (JP)

(74)	Representative: Lehn, Werner, Dipl.-Ing. et al
	Hoffmann, Eitle & Partner, Patentanwälte, Postfach 81 04 20 81904 München 81904 München (DE)

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References cited: :

(54)	Semiconductor integrated circuit and method of making the same

(57) For providing a semiconductor integrated circuit device including CCD type, bipolar type and MOS type integrated circuit in only one chip, island-shaped epitaxial layers (4) of opposite conductivity type are disposed in a semiconductor substrate (1) of one conductivity type having a low impurity concentration. A field oxide layer (2) is provided so as to surround a periphery of an exposed surface of each epitaxial layer (4). A buried layer (3) of opposite conductivity type having a high impurity concentration is interposed between the semiconductor substrate (1) and each epitaxial layer (4) in such a manner that at least one edge thereof terminates to the lower surface of the field oxide layer (2). The CCD type integrated circuit is provided in the semiconductor substrate (1) and the bipolar type and MOS type integrated circuits are arranged in the epitaxial layers (4).

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