BACKGROUND OF THE INVENTION
[0001] The present invention generally relates to a display device and more particularly,
to a method of driving a display device, for example, a capacitive flat matrix display
panel (referred to as a thin film EL display device hereinafter), etc.
[0002] Fig. 8 is a block diagram showing overall construction of a conventional thin film
EL display device, which generally includes a display panel 1, a data side switching
circuit 2, a scanning side switching circuit 5, a drive circuit 8, and a drive logic
circuit 11 coupled to each other as illustrated.
[0003] In the known arrangement of Fig. 8, the display panel 1 is composed of a thin film
EL element. In the case where this thin film EL element is, for example, of a double
insulated type thin film EL element, it includes belt-like transparent electrodes
arranged in a parallel relation on a glass substrate, a dielectric substance applied
thereover, an EL layer further applied thereover, and another dielectric substance
further applied thereon to provide a three-layered structure, and belt-like back electrodes
further applied thereover so as to extend parallely in a direction intersecting at
right angles with said transparent electrodes referred to above.
[0004] In the display panel 1 as described above, the transparent electrodes of the thin
film EL element are set to be the data side electrodes x1 to x8, while the back electrodes
of said thin film EL element are adapted to be the scanning side electrodes y1 to
y4.
[0005] The data side switching circuit 2 is intended to apply OV or V
M as a modulation voltage individually to the respective data side electrodes x1 to
x8, and includes a group of data side output ports 3 individually connected to the
respective data side electrodes x1 to x8, and a logic circuit 4 which receives display
data corresponding to the respective data side electrodes x1 to x8 so as to turn on
or off the data side output ports 3 according to said display data.
[0006] Meanwhile, the scanning side switching circuit 5 is a circuit for impressing Vw1
or -Vw2 (in a relation Vw1=Vw2+V
M, and represented as Vw1≧Vth, Vw2≦Vth when light emitting threshold voltage of the
thin film EL element is denoted by Vth) to the respective scanning side electrodes
y1 to y4 according to the line sequence thereof as a writing voltage, and includes
a group of scanning side output ports 6 individually connected to the respective scanning
side electrodes y1 to y4, and a logic circuit 7 for turning on or off the group of
the scanning side output ports 6 according to the line sequence of the scanning side
electrodes y1 to y4.
[0007] The drive circuit 8 is arranged to generate a high voltage for driving the display
panel 1 from a predetermined constant reference voltage V
D, and is provided with a modulation drive circuit 9 for supplying modulation voltage
Vm to the data side output ports 3, and a write drive circuit 10 for supplying write
voltages Vw1 and -Vw2 to the scanning side output ports 6.
[0008] The drive logic circuit 11 is a circuit for generating various timing signals necessary
for driving the display panel 1, based on input signals such as a display data signal
D, a data transfer clock CK, a horizontal synchronizing signal H, and a vertical synchronizing
signal V, etc.
[0009] The fundamental driving for the display of the thin film EL display device as described
above is effected by applying OV or V
M to the data side electrodes x1 to x8 as modulation voltages corresponding to the
display data which determine light emission or non-light emission, with a section
extending over first and second two frames being set as one period, and also, by applying
the write voltage Vw1 to the scanning side electrodes y1 to y4 at the first frame,
and the write voltages -Vw2 thereto at the second frame by line sequence.
[0010] By the above display function, a superposing effect or offset effect of the write
voltage Vw1 or -Vw2 and the modulation voltage OV or V
M is produced at the portions of picture elements where the data side electrodes x1
to x8 and the scanning side electrodes y1 to y4 intersect each other, and a voltage
Vw1 higher than a light emitting threshold voltage Vth or a voltage Vw2 lower than
the light emitting threshold voltage Vth is applied to each picture element as an
effective voltage, whereby the respective picture elements are brought into the light
emitting state or non-light emitting state to provide the predetermined display. Accordingly,
with respect to one image element, effective voltage inverted in its polarity between
the first frame and the second frame respectively is alternately impressed, and thus,
with the two frames set as one period, symmetrical A.C. driving ideal for a thin film
EL element is to be effected.
[0011] Conventionally, in the thin film EL display device as described above, as a driving
method for varying brightness of the respective picture elements in a plurality of
stages, i.e. for effecting gradation display, there have been known an amplitude control
system for controlling amplitude of the modulation voltage V
M to be impressed to the data side electrodes x1 to x8, a pulse width modulation system
for varying pulse width of the modulation voltage V
M, and a frequency modulation system for thinning out the display data of either the
first frame or second frame.
[0012] However, in the driving methods of the amplitude modulation system or pulse width
modulation system as described above, there has been such a problem that, if it is
intended to increase the number of stages in the gradation, the amplitude or pulse
width of the modulation voltage V
M must be controlled very finely during one scanning period, and in order to effect
such a control at a high accuracy, circuit construction is undesirably complicated,
thus resulting in cost rise.
[0013] Furthermore, when the gradation display is to be effected by the driving method of
the known frequency modulation system as referred to above, there has also been such
a disadvantage that, in the case where the display data is cut in the first frame
or in the second frame, the effective voltages to be applied to the picture element
is the same in the one period consisting of the first frame and second frame, and
after all, the gradations which can be displayed are limited only to three gradations
for light emission, non-light emission and intermediate tone, with limitation to the
increase in the number of stages for the gradations.
SUMMARY OF THE INVENTION
[0014] Accordingly, an object of the present invention is to provide a driving method of
a display device, which is so arranged that the number of stages for gradation display
may be increased through a simple circuit construction.
[0015] Another object of the present invention is to provide a driving method of a driving
device of the above described type, which may be readily effected by the driving device
with simple construction.
[0016] In accomplishing these and other objects, according to one preferred embodiment of
the present invention, there is provided a method of driving a display device with
a plurality of scanning side electrodes (y1 to y4) and a plurality of data side electrodes
(x1 to x8) which are disposed in directions intersecting each other, and a dielectric
layer means interposed between said scanning side electrodes and said data side electrodes,
and including steps of applying modulation voltages corresponding to display data
to said data side electrodes, and also applying writing voltages of positive or negative
nature to said scanning side electrodes through line sequence, so as to cause picture
elements composed of said dielectric layer means to emit light.
[0017] The driving method further comprises steps of thinning out the display data, and
applying a plurality of kinds of modulation voltages different in amplitude according
to each frame, thereby to cause the picture elements to effect gradation display of
different brightness in multi-stages.
[0018] In the method of the present invention as described above, since the amplitude of
the modulation voltage differs for each frame, brightness of the intermediate tone
to be displayed also differs according to the different frame to be cut in the display
data, thus making it possible to effect gradation display in more than three stages.
BRIEF DESCRIPTION OF THE DRAWINGS
[0019] These and other objects and features of the present invention will become apparent
from the following description taken in conjunction with the preferred embodiment
thereof with reference to the accompanying drawings, in which;
Fig. 1 is a block diagram showing general construction of a thin film EL display device
to which a driving method according to one preferred embodiment of the present invention
may be applied,
Fig. 2 is a block diagram showing construction of a data signal processing circuit
included in a drive logic circuit of the thin film EL display circuit of Fig. 1,
Fig. 3 is also a block diagram showing construction of a modulation drive circuit
of the thin film EL display device of Fig. 1,
Fig. 4 is a timing chart showing four gradation display driving of any desired picture
elements for the thin film EL display device of Fig. 1,
Fig. 5 is a timing chart showing functioning of the modulation drive circuit in the
four gradation display driving,
Fig. 6 is also a timing chart showing three gradation display driving of any desired
picture elements for the thin film EL display device of Fig. 1,
Fig. 7 is a timing chart showing functioning of the modulation drive circuit in the
three gradation display driving, and
Fig. 8 is a block diagram showing general construction of a thin film EL display device
to which a conventional driving method is applied (already referred to).
DETAILED DESCRIPTION OF THE INVENTION
[0020] Before the description of the present invention proceeds, it is to be noted that
like parts are designated by like reference numerals throughout the accompanying drawings.
[0021] Referring now to the drawings, there is shown in Fig. 1, a block diagram showing
general construction of a thin film EL display device E to which a driving method
according to one preferred embodiment of the present invention may be applied.
[0022] As shown in Fig. 1, the thin film EL display device E has the construction generally
similar to the thin film EL display device as described earlier with reference to
Fig. 8 for the conventional driving method, and includes a display panel 21, a data
side switching circuit 22, a scanning side switching circuit 25, a drive circuit 28,
and a drive logic circuit 31 as described hereinafter.
[0023] In Fig. 1, the display panel 21 is composed of a double insulated type thin film
EL element, and includes belt-like transparent electrodes arranged in a parallel relation
on a glass substrate, a dielectric substance applied thereover, an El layer further
applied thereover, and another dielectric substance further applied thereon to form
a three-layered structure, and belt-like back electrodes further applied thereover
so as to extend parallely in a direction intersecting at right angles with said transparent
electrodes.
[0024] In the display panel 21 as described above, the transparent electrodes of the thin
film EL element are set to be the data side electrodes x1 to x8, while the back electrodes
of said thin film EL element are adapted to be the scanning side electrodes y1 to
y4.
[0025] The data side switching circuit 22 is a circuit intended to apply OV, 1/2V
M or V
M as a modulation voltage individually to the respective data side electrodes x1 to
x8, and includes a group of date side output ports 23 individually connected to the
respective data side electrodes x1 to x8, and a logic circuit 24 which receives display
data D corresponding to the respective data side electrodes x1 to x8 so as to turn
on or off the data side output ports 23 according to said display data D.
[0026] Meanwhile, the scanning side switching circuit 25 is a circuit for impressing Vw1
or-Vw2 (in a relation Vw1=Vw2+VH, and represented as Vw1≧Vth, Vw2≦Vth) to the respective
scanning side electrodes y1 to y4 according to the line sequence thereof as a writing
voltage, and includes a group of scanning side output ports 26 individually connected
to the respective scanning side electrodes y1 to y4, and a logic circuit 27 for turning
on or off the group of the scanning side output ports 26 according to the line sequence
of the scanning side electrodes y1 to y4.
[0027] The drive circuit 28 is arranged to generate a high voltage for driving the display
panel 21 from a predetermined constant reference voltage V
D, and is provided with a modulation drive circuit 29 for supplying a modulation voltage
1/2V
M and V
M to the data side output ports 23, and a write drive circuit 30 for supplying write
voltages Vw1 and -Vw2 to the scanning side output port 26.
[0028] The drive logic circuit 31 is a circuit for generating various timing signals necessary
for driving the display panel 21, based on input signals such as display data signals
[D1,DO] of 2 bits, a data transfer clock CK, a horizontal synchronizing signal H,
and a vertical synchronizing signal V, etc., and includes therein a data processing
circuit 32 for processing the above described 2 bit display data signals [D1, DO].
These 2 bit display data signals [D1,DO] are arranged to correspond so as to designate
brightness levels in four gradations as shown in Table 1 below.
[0029] Referring also to Fig. 2, there is shown circuit construction of the data signal
processing circuit 32 referred to above, which includes an AND gate 12 having as two
inputs, the lower order bit signal DO of the display data signals [D1, DO] and a frame
inversion signal PNF, another AND gate 13 having as two inputs, the higher order bit
signal D1 of the display data signal [D1,DO] and signal in which the frame inversion
signal PNF is inverted by an invertor 14, and an OR gate 15 connected to outputs of
said AND gates 12 and 13 as two inputs, with the output of said OR gate 15 being applied,
as the display data D, to the logic circuit 24 of the data side switching circuit
22 of Fig. 1. Here, one period for driving is set to be closed by the first frame
and second frame, and the above frame inversion signal PNF is applied as the signal
which assumes a high level (referred to as H level hereinafter) in the first frame,
and a low level (referred to as L level hereinafter) in the second frame.

[0030] Referring further to Fig. 3 showing circuit construction of a modulation voltage
generating function section of the modulation drive circuit 29 referred to earlier,
the input terminal IN of the reference voltage Vs(=1/2V
M is connected to the output terminal OUT through a diode 16, with two transistors
17 and 18 being connected in series between the input terminal IN and ground. Moreover,
between a junction of the two transistors 17 and 18 and the output terminal OUT, a
capacitor 19 is connected. To the gate of the transistor 17, a signal MVT for on/off
control of said transistor is applied, while, to the gate of the other transistor
18, a signal MVU for on/off control thereof is applied through an AND gate 20, with
a PNF signal being applied to the AND gate 20 as the other input thereof. The signals
MVD and MVU are each pulses having one scanning period as a cycle.
[0031] Fig. 4 is a timing chart showing driving of any desired picture elements for the
thin film EL display device of Fig. 1, in which Fig. 4-(1) shows the waveform diagram
of writing voltage to be applied to the scanning side electrodes, Fig. 4-(2) represents
the waveform diagram of modulation voltage to be applied to the data side electrodes,
Fig. 4-(3) indicates the waveform diagram of effective voltage of the display of brightness
levels at 0 and 3, Fig. 4-(4) denotes the waveform diagram of effective voltage during
driving of the display of brightness level 2 (i.e. higher side brightness of the intermediate
tone), and Fig. 4-(5) shows the waveform diagram of effective voltage during driving
of the display of brightness level 1 (i.e. lower side brightness of the intermediate
tone).
[0032] Meanwhile, Fig. 5 is a timing chart representing driving of the modulation driving
circuit 29 referred to earlier, in which Fig. 5-(1) shows the waveform diagram for
the MVD signal, Fig. 5-(2) denotes the waveform diagram for the PNF signal, Fig. 5-(3)
represents the waveform diagram for the MVU signal, Fig. 5-(4) indicates the waveform
diagram of the output signal of the AND gate 20, and Fig. 5-(5) shows the waveform
diagram of the modulation voltage to be outputted from the modulation drive circuit
29 respectively.
[0033] Subsequently, functioning for the four gradation display driving by the thin film
EL display device of Fig. 1 will be described with reference to the timing charts
of Figs. 4 and 5.
[0034] As shown in Fig. 4-(1), in the scanning side electrodes y1 to y4, according to the
line sequence thereof, the writing voltage Vw1 (=Vw2+V
M) is impressed in the first frame, while the writing voltage -Vw2 is applied in the
second frame.
[0035] On the other hand, in the data side electrodes x1 to x8, according to the display
data D, OV or V
M is applied as the modulation voltage in the first frame, while OV or 1/2V
m is impressed in the second frame. The modulation voltage V
M in the first frame, and the modulation voltage 1/2V
M in the second frame are supplied from the modulation drive circuit 29 in the manner
as described hereinafter.
[0036] As shown in Fig. 5-(1), in a short period at the beginning of each scanning period,
the MVD signal becomes "High" to turn on the transistor 17, and therefore, the capacitor
19 is charged by an amount equivalent to 1/2V
M (Fig. 3). In the remaining whole period of the scanning period subsequent thereto,
the MVD signal becomes "Low", while the MVD signal becomes "High" as shown in Fig.
5-(3). Accordingly, in the first frame in which the PNF signal assumes "High" as shown
in Fig. 5-(2), the output of the AND gate 20 becomes "High" as shown in Fig. 5-(4),
and the transistor 18 is turned on, with the potential of the capacitor 19 at the
side of the junction between the transistors 17 and 18 becomes 1/2 V
M, and at this time, the output of the modulation drive circuit 29 becomes V
M as represented in Fig. 5-(5).
[0037] Meanwhile, as shown in Fig. 5-(2), in the second frame in which the PNF signal becomes
"Low", the output of the AND gate 20 becomes "Low" as in Fig. 5-(4) irrespective of
the MVU signal, with the transistor 18 held in the off state, and therefore, the output
of the modulation drive circuit 29 becomes 1/2 V
M as illustrated in Fig. 5-(5).
[0038] Furthermore, in the data signal processing circuit 32 of the drive logic circuit
31, the 2 bit display data signal [D1,DO] to be inputted is converted into the 1 bit
display data D in the manner as described hereinbelow.
[0039] In the first place, in the case where the display data signals [D1,DO] are of [L,L]
equivalent to the brightness level 0 (non-light emission), both of the outputs of
the AND gates 12 and 13 (Fig. 2) become "Low" level, and thus, the output of the OR
gate 15, i.e. the display data D becomes "Low" level as shown in Table 1 both in the
first frame and second frame. In the case where the display data signals [Dl,DO] are
of [H,L] equivalent to the brightness level 1 (lower side brightness in the intermediate
tone), the output of the AND gate 12 becomes "Low" level both in the first frame and
the second frame, while the output of the AND gate 13 becomes "High" level only in
the second frame, and accordingly, the display data D becomes "Low" level in the first
frame, and "high" level in the second frame as shown in Table 1. When the display
data signals [D1,DO] are of [L,H] corresponding to the brightness level 2 (i.e. higher
side brightness of the intermediate tone), the output of the AND gate 12 becomes "High"
level only in the first frame, while output of the AND gate 13 becomes "Low" level
both in the first frame and second frame, and accordingly, the display data D becomes
"High" level in the first frame, and "Low" level in the second frame as shown in Table
1. In the case where the display data signals [D1,DO] are of [H,H] equivalent to the
brightness level 3 (total light emissions, the output of the AND gate 12 becomes "High"
level only in the first frame, while the output of the AND gate 13 becomes "High"
level only in the second frame, and accordingly, the display data D becomes "High"
level both in the first and second frames as shown in Table 1.
[0040] In the logic circuit 24 of the data side switching circuit 22, on/off state of the
group of data side output ports 23 is controlled according to the display data D.
More specifically, in the first frame, when the display data D is of "High" level,
OV is selected as the modulation voltage to be applied to the data side electrodes
x1 to x8 (shown in the solid line in Fig. 4-(2)), and when the display data D is
of "Low" level, V
M is selected as the modulation voltage (shown in the dotted line in Fig. 4-(2)).
[0041] On the other hand, in the second frame, when the display data D is of "High" level,
1/2V
M is selected as the modulation voltage (shown in the solid line in Fig. 4-(2)), and
when the display data D is of "Low" level, OV is selected as the modulation voltage
(shown in the dotted line in Fig. 4(2)).
[0042] The modulation voltage corresponding to the case where the display data D shown in
the dotted line in Fig. 4-(2) is of "Low" level, is a modulation voltage which acts
to offset the writing voltages Vw1 and -Vw2 shown in Fig. 4-(1), and corresponds to
the non-light emission in the case of 01 display (two stage display for light emission
or non-light emissions. Conversely, the modulation voltage corresponding to the case
where the display data D shown in the solid line in Fig. 4-(2) is of "High" level,
is a modulation voltage which acts to be superposed on the writing voltages Vwl and
-Vw2, and corresponds to the light emission in the case of 01 display.
[0043] The effective voltage to be applied to the picture elements is equivalent to the
difference between the writing voltages Vwl and -Vw2 (Fig. 4-(1)) to be applied to
the scanning side electrodes corresponding to the picture elements and the modulation
voltages OV, 1/2V
M and V
M to be applied to the data side electrodes corresponding to said picture elements,
and represented by the waveform shown in Fig. 4-(3). In Fig. 4-(3), the polarities
of the effective voltage are given based on the data side electrodes as the reference).
In other words, in Fig. 4-(3), the solid line represents the case of the brightness
level 3 (total light emissions, while the dotted line shows the case of the brightness
level 0 (non-light emission).
[0044] As described so far, in the case of the display of the brightness level 2, the display
data D is of "High" level in the first frame (accordingly, the modulation voltage
is OV), and "Low" level in the second frame (accordingly, the modulation voltage is
OV), and therefore, the effective voltage to applied to the picture elements becomes
a voltage Vw1 (=Vw2+V
M) corresponding to the total light emission in the first frame, and a voltage -Vw2
corresponding to the non-light emission in the second frame as shown in Fig. 4-(4).
In other words, display driving equivalent to that in which the display data signals
[D1,DO] for the total light emission are cut at the second frame, is to be effected.
[0045] Meanwhile, in the case of the display for the brightness level 1, the display data
D is of "Low" level (accordingly, the modulation voltage is V
M) in the first frame, and is of "High" level (accordingly, the modulation voltage
is 1/2V
M) in the second frame, and therefore, the effective voltage becomes the voltage Vw2
corresponding to the non-light emission in the first frame, and the voltage -(Vw2+1/2V
M) corresponding to the total light emission in the second frame as shown in Fig. 4-(5).
In other words, display driving equal to that in which the display data signals [D1,D0]
for the total light emission are cut in the first frame, is to be effected.
[0046] As is seen from the comparison between Fig. 4-(4) and Fig. 4-(5), the effective voltage
to be impressed to the picture elements in one period in which the first and second
frames are combined, becomes larger in the case of the display for the brightness
level 2 than in the case of the display for the brightness level 1. In other words,
the intermediate tone is to be displayed in two stages, thus effecting the display
in four gradations on the whole.
[0047] It should be noted here that in the foregoing embodiment, although the description
has been given with respect to the case where the display in four gradations are effected
through employment of the thin film EL display device, with the intermediate tone
divided into two stages, the present invention is not limited in its application to
the above alone, but may be so modified, for example, as to effect the display in
three stages of non-light emission, intermediate tone, and total light emission through
employment of the same display device.
[0048] Fig. 6 is a timing chart showing driving of any desired picture element in the case
of the display of the three gradations referred to above, in which Fig. 6-(1) shows
the waveform diagram of writing voltage to be applied to the scanning side electrodes,
Fig. 6-(2) represents the waveform diagram of modulation voltage to be applied to
the data side electrodes, Fig. 6-(3) indicates the waveform diagram of effective voltage
to be applied to the picture elements during driving of the display for the non-light
emission and total light emission, Figs. 6-(4) and 6-(5) denote the waveform diagrams
of effective voltages during driving of the display of the intermediate tone.
[0049] Meanwhile, Fig. 7 is a timing chart representing driving of the modulation driving
circuit 29 in the case of the above three gradation display, in which Fig. 7-(1) shows
the waveform diagram for the MVU signal, Fig. 7-(2) represents the waveform diagram
for the MVU signal, and Fig. 7-(3) shows the waveform diagram of the modulation voltage
to be outputted from the modulation drive circuit 29 respectively.
[0050] Subsequently, functioning for the three gradation display driving by the thin film
EL display device of Fig. 1 will be generally described with reference to the timing
charts of Figs. 6 and 7.
[0051] As shown in Fig. 6-(1), in the scanning side electrodes y1 to y4, according to the
line sequence thereof, the writing voltage Vw1 (=Vw2+V
M) is impressed in the first frame, while the writing voltage Vwl (=Vw2+V
M) is impressed in the first frame, while the writing voltage -Vw2 is applied in the
second frame in the similar manner as in the four gradation display described earlier.
[0052] On the other hand, in the data side electrodes x1 to x8, according to the display
data D, OV or V
M is applied as the modulation voltage (similarly both in the first and second frames).
This modulation voltage V
M is supplied from the modulation drive circuit 29 in the manner as described hereinafter.
[0053] As shown in Fig. 7-(1), in a short period at the beginning of each scanning period,
the MVD signal becomes "High level, and in the remaining whole period of the scanning
period subsequent thereto, the MVU signal becomes "High, in the similar manner as
in the four gradation display. Here, as one input of the AND gate 20, instead of the
PNF signal, the signal assuming "High" level all through the first and second frames
is applied. Accordingly, the output of the AND gate 20 becomes equal to the MVU signal
through the first and second frames, and the transistor 18 is turned on per each scanning
period in any of the frames, and thus, one kind of modulation voltage VH is outputted
from the modulation drive circuit 29 per each scanning period as shown in Fig. 7-(3).
[0054] Meanwhile, in the data signal processing circuit 32 of the drive logic circuit 31,
data conversion processing similar to that in the four gradation display as referred
to earlier is effected. In this case, the display data signals [D1,DO] are set to
either of the state of brightness level 1 or 2 in the case of the four gradation display,
as the signals corresponding to the intermediate tone (Any of such states is acceptable).
[0055] In the logic circuit 24 of the data side switching circuit 22, on/off state of the
group of data side output ports 23 is controlled in the similar manner as in the four
gradation display according to the display data D applied from the data signal processing
circuit 32. More specifically, in the first frame, when the display data D is of "High"
level, OV is selected as the modulation voltage to be applied to the data side electrodes
x1 to x8 (shown in the solid line in Fig. 6-(2)), and when the display data D is of
"Low" level, V
M is selected as the modulation voltage (shown in the dotted line in Fig. 6-(2)).
[0056] On the other hand, in the second frame, when the display data D is of "High" level,
V
M is selected as the modulation voltage (shown in the solid line in Fig. 6-(2)), and
when the display data D is of "Low" level, OV is selected as the modulation voltage
(shown in the dotted line in Fig. 6-(2)).
[0057] In the above case, the effective voltage to be impressed to the picture elements
takes the form as shown in the solid line in Fig. 6(3) (corresponding to the modulation
voltage shown in the solid line in Fig. 6-(2)) in the case of the total light emission
display, while it takes the form as shown in the dotted line in Fig. 6-(3) (corresponding
to the modulation voltage shown in the dotted line in Fig. 6-(2)) in the case of non-light
emission display. Meanwhile, when the display data signals [D1,DO] are set in the
state of brightness level 2 in the 20 four gradation display, the display data D is
of "High" level in the first frame (accordingly, the modulation voltage is OV), and
of "Low" level in the second frame (accordingly, the modulation voltage is OV), and
therefore, the effective voltage to be applied to the picture elements becomes the
voltage Vw1 (=Vw2+V
M) corresponding to the total light emission in the first frame, and the voltage -Vw2
corresponding to the non-light emission in the second frame as shown in Fig. 6-(4).
In other words, display driving equivalent to that in which the display data signals
[D1,DO] for the whole light emission are cut at the second frame, is to be effected.
[0058] On the other hand, when the display data signals [D1,DO] are set in the state of
the brightness level 1 in the four gradation display for the intermediate tone display,
contrary to the above case, the display data D is of "Low" level (accordingly, the
modulation voltage is V
M) in the first frame, and is of "High" level (accordingly, the modulation voltage
is V
M) in the second frame, and therefore, the effective voltage becomes the voltage Vw2
corresponding to the non-light emission in the first frame, and the voltage -Vw1(=-(Vw2+V
M)) corresponding to the total light emission in the second frame as shown in Fig.
6-(5). In other words, display driving equal to that in which the display data signal
[D1,DO] for the total light emission are cut in the first frame, is to be effected.
[0059] As is seen from the comparison between Fig. 6-(4) and Fig. 6-(5), the effective voltage
to be impressed to the picture elements in one period in which the first and second
frames are combined, becomes equal in any of the intermediate tone display, and thus,
the three gradation display for the non-light emission, intermediate tone, and total
light emission is to be effected.
[0060] It should be noted here that in the foregoing embodiment, although the driving method
of the present invention is described with reference to the case of the gradation
display by the thin film EL display device, the concept of the present invention is
not limited in its application to such thin film EL display device alone, but may
be readily applied to other display devices, for example, to a liquid crystal display
device and the like as well.
[0061] As is clear from the foregoing description, in the driving method of the display
device according to the present invention, since it is so arranged to thin out the
display data, and also, to vary the amplitude of the modulation voltage for each frame,
gradation display in more than three stages may be effected through a simple circuit
construction.
[0062] Although the present invention has been fully described by way of example with reference
to the accompanying drawings, it is to be noted here that various changes and modifications
will be apparent to those skilled in the art. Therefore, unless other wise such changes
and modifications depart from the scope of the present invention, they should be construed
as included therein.
[0063] There are described above novel features which the skilled man will appreciate give
rise to advantages. These are each independent aspects of the invention to be covered
by the present application, irrespective of whether or not they are included within
the scope of the following claims.