(57) An image information control apparatus includes a partial write detector having at
least two types of memory units for detecting and storing addresses accessed to a
VRAM in units of lines in a scanning direction, thereby repeating the detection and
the storage at different cycles, a circuit for performing calculations to recognize
partial write information from contents of each of the memory units, memory units
for storing the respective calculation results, a circuit for comparing the memory
contents to determine a size relationship between partial write areas, a partial write
ID signal controller for controlling a partial write ID signal on the basis of the
size relationship between partial write areas and externally outputting the signal,
and a circuit for, even when partial writing is being executed, forcibly interrupting
the partial writing in accordance with a state of an external refresh control signal,
starting refresh, and restarting the partial writing in accordance with a partial
write state and a change in state of the refresh control signal.
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