Driving method and apparatus for liquid crystal display device

Abstract

 Scanning electrodes (L) constituting a ferroelectric liquid crystal panel (20) are divided into a plurality of scanning electrode groups, and a selective voltage (VCA) is applied sequentially to the scanning electrodes constituting the scanning electrode group over two group fields. In a first group field, a signal voltage (VSC) for changing picture elements on the selected scanning electrode from the bright display state to the dark display state, or a signal voltage (VSE) for not changing the bright and dark display states is applied to the signal electrodes. In a second group field, a signal voltage (VSD) for changing the picture elements on the selected scanning electrode from the dark display state to the bright display state, or a signal voltage (VSE) for not changing the bright and dark display states is applied to the signal electrodes. Uniting the two group fields together, changes in display state of the picture elements constituting the scanning electrode group are responded. Thereby, as long as the display state of the picture elements is not changed, the change in effective voltage waveform applied to the picture element can be kept smaller than the change in effective voltage waveform due to switching of the driving voltage combination corresponding to the two group fields.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

[0001] The present invention relates to a driving method and apparatus for liquid crystal display device in which a ferroelectric liquid crystal (hereinafter abbreviated as FLC) is used.

2. Description of the Prior Art

[0002] Fig. 1 is a cross-sectional view showing a schematic configuration of an FLC panel. Two sheets of glass substrates 5a, 5b are disposed in opposition to each other. A signal electrode S consisting of indium tin oxide(hereinafter abbreviated as ITO) is arranged plurally in parallel on the surface of one glass substrate 5a, and a transparent insulating film 6a consisting of SiO₂ is covered thereon. On the surface of the other glass substrate 5b opposing to the signal electrode S, a scanning electrode L consisting of ITO is arranged plurully in parallel in a direction orthogonal to the signal electrode S, and is covered by a transparent insulating film 6b consisting of SiO₂ thereon.

[0003] On the insulating films 6a, 6b, orientation films 7a, 7b consisting of polyvinyl alcohol and the like and treated by rubbing processing are formed respectively. The two glass substrates 5a, 5b are bonded together with a sealing agent 8 partially leaving an injection port, which is sealed by the sealing agent 8 after an FLC 9 is introduced into a space between the orientation films 7a, 7b by the vacuum injection these through. The two glass substrates 5a, 5b thus bonded together are clamped between two polarizing plates 10a, 10b arranged such that respective polarizing axes intersect orthognally.

[0004] Fig. 2 and Fig. 3 are plan views showing the configuration of an FLC display (hereinafter abbreviated as FLCD) 1, in which a scanning side driving circuit 11 is connected to the scanning electrode L of the FLC panel having a simple matrix configuration aforementioned, and a signal side driving circuit 12 is connected to the signal electrode S. The scanning side driving circuit 11 is a circuit for applying voltages to the scanning electrodes L, and the signal side driving circuit 12 is a circuit for applying voltages to the signal electrodes S.

[0005] Here, for the purpose of simplification, the case wherein the number of the scanning electrodes L are 32 and the number of the signal electrodes S are 16, on the case of FLCD 1 which is constituted by picture elements of 32 x 16 is shown, and the respective electrodes of the scanning electrodes L are distinguished by adding an index i ( i = 1 to 32) to the symbol L, and respective electrodes of the signal electrodes S are distinguished by adding an index j (j = 1 to 16) to the symbol S. In the following description, a picture element at intersection of any scanning electrode Li and any signal electrode Sj is represented by a symbol Aij.

[0006] Fig. 4 is a block diagram schematically showing the configuration of display device using the FLCD 1 aforementioned. In this display device, information necessary for the image display are obtained from digital signals outputted to a CRT display 3 from a personal computer 2, the digital signals are transformed into drive signals for image display on the FLCD 1 in a control circuit 4, thereby the image display is effected on the FLCD 1.

[0007] Fig. 5 is a waveform diagram of respective signals outputted to the CRT display 3 from the personal computer 2 aforementioned. Fig. 5 (1) is a horizontal synchronizing signal HD- which gives period of one horizontal scanning section of image information outputted to the CRT display 3, Fig. 5 (2) is a vertical synchronizing signal VD- which gives period of one picture screen of the information, and Fig. 5 (3) shows the information which is collected as display data Data for every horizontal scanning section, index numerals corresponding to the scanning electrodes Li of the FLCD 1.

[0008] Fig. 5 (4) is a waveform diagram showing one horizontal scanning section of the horizontal synchronizing signal HD- which is expanded, Fig. 5 (5) is a waveform diagram of one horizontal scanning section of the display data Data which is expanded, index numerals corresponding to the signal electrodes Sj of the FLCD 1, and Fig. 5 (6) is a waveform diagram showing a data transfer clock CLK for every picture element of the data transfer clock CLK.

[0009] A driving method of the FLCD 1 is disclosed in Japanese Patent Application Laid Open No. Sho 64-59389 (1989), and a display control method is disclosed in Japanese Patent Application No. Hei 1-342512 (1989).

[0010] Fig. 6 is a waveform diagram showing an example of respective impressed voltage waveforms to the scanning electrodes L and the signal electrodes S used in a conventional driving method. A waveform shown in Fig. 6 (1) is the waveform of the selective voltage A which is applied to the scanning electrodes L for rewriting the memory state of the picture elements thereon or the luminous state displayed, and a waveform shown in Fig. 6 (2) is the waveform of a non-selective voltage B which is applied to the other scanning electrodes L for not rewriting the display state of the picture elements on the scanning electrodes L.

[0011] A waveform shown in Fig. 6 (3) is the waveform of a dark rewriting voltage C which is applied to the signal electrodes S for rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied into the "dark" luminous state, a waveform shown in Fig. 6 (4) is the waveform of a bright voltage D which is applied to the signal electrodes S for rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied into the "bright" luminous state, and a waveform shown in Fig. 6 (5) is the waveform of a non-rewriting voltage E which is applied to the signal electrodes S for not rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied.

[0012] Fig. 6 (6) to Fig. 6 (11) show waveforms of an effective voltage applied to the picture element Aij. A waveform A-C in Fig. 6 (6) shows the voltage waveform applied to the picture element Aij, when the selective voltage A is applied to the scanning electrode Li and the dark rewriting voltage C is applied to the signal electrode Sj, a waveform A-D in Fig. 6 (7) shows the voltage waveform applied to the picture element Aij, when the selective voltage A is applied to the scanning electrode Li and the bright rewriting voltage D is applied to the signal electrode Sj, a waveform A-E in Fig. 6 (8) is the voltage waveform applied to the picture element Aij, when the selective voltage A is applied to the scanning electrode Li and the non-rewriting voltage E is applied to the signal electrode Sj, a waveform B-C in Fig. 6 (9) is the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the dark rewriting voltage C is applied to the signal electrode Sj, waveform B-D in Fig. 6 (10) shows the voltage waveform applied to the picture element Aij when the non-selective voltage B is applied to the scanning electrode Li and the bright rewriting voltage D is applied to the signal electrode Sj, and a waveform B-E in Fig. 6 (11) shows the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the non-rewriting voltage E is applied to the signal electrode Sj.

[0013] In case the display state of the picture element Aij of the FLCD 1 in Fig. 3 is rewritten by the driving method described above, the selective voltage A in Fig. 6 (1) is applied to the scanning electrode Li and the non-selective voltage B shown in Fig. 6 (2) is applied to all of the remaining scanning electrodes Lk (k ≠ i, k = 1 to 32), in case the picture element Aij is rewritten into the "dark" display state, the dark rewriting voltage (shown in Fig. 6 (3) is applied to the signal electrode Sj, in case the picture element Aij is rewritten into the "bright" display state, the bright rewriting voltage D shown in Fig. 6 (4) is applied to the signal electrode Sj, and when the dark or bright display state in a preceding frame of the picture element Aij may be remained as it is, the non-rewriting voltage E shown in Fig. 6 (5) is applied to the signal electrode Sj.

[0014] For example, in the FLCD 1 of Fig. 3, in case a state wherein Japanese characters meaning "FERROELECTRIC" are shown on the picture screen by the picture elements Aij of the "dark" display state indicated by oblique lines, is rewritten into a state wherein Japanese characters meaning "ORDINARY DIELECTRIC" are displayed as shown in Fig. 2, when the picture elements Aij which are rewritten into the "dark" display state from the "bright display state are represented by a symbol C responsive to the dark rewriting voltage C. the picture elements Aij which are rewritten into the "bright" display state from the "dark" display state are represented by a symbol D responsive to the bright rewriting voltage D, and the picture elements Aij which remain as the "dark" or " bright" display state are represented without any symbol, though it should be represented by a symbol E responsive to the bright non-rewriting voltage E, a displacement state of the entire picture screen may be represented as shown in Fig. 7.

[0015] Fig. 8 shows respective voltage waveforms applied then to the scanning electrodes L1, L2, L5, signal electrodes S5, S6 and picture elements A15, A16, A25, A56. Fig. 8 (1), as a reference, shows a waveform of a transfer clock YCK- of the selective signal YI in a shift register in the scanning side driving circuit 11, Fig. 8 (2) shows a waveform of the selective signal YI, Fig. 8 (3) shows an impressed voltage waveform to the scanning electrode L1, Fig. 8 (4) shows an impressed voltage waveform to the scanning electrode L2, Fig. 8 (5) shows an impressed voltage waveform to the scanning electrode L5, Fig. 8 (6) shows an impressed voltage waveform to the signal electrode S5, Fig. 8 (7) shows an impressed voltage waveform to the signal electrode S6, Fig. 8 (8) shows an effective voltage waveform applied to the picture element A15, Fig. 8 (9) shows an effective voltage waveform applied to the picture element A16, Fig. 8 (10) shows an effective voltage waveform applied to the picture element A25, and Fig. 8 (11) shows an effective voltage waveform applied to the picture element A56.

[0016] In the aforesaid driving method, as it is understood from the effective voltage waveform of the picture element A16 shown in Fig. 8 (9) and the effective voltage waveform of the picture element A56 shown in Fig. 8 (11), the voltages applied to the picture elements Aij are substantially equal whether or not the scanning electrode Li is selected, as far as its display state is not rewritten. Thereby, even in the case of low-speed driving wherein the time required for applying the selective voltage A, after applying to a certain scanning electrode Li, to the same scanning electrode next, or the one frame period is longer than 33.3 milliseconds (corresponds to 30 Hz), it can be displayed without feeling any flickers.

[0017] Strictly speaking, however, between the effective voltage waveform of the picture element A16 show in Fig. 8 (9) and the effective voltage waveform of the picture element A56 shown in Fig. 8 (11), there is a difference in cases wherein the voltage waveform A-E is applied to the picture element A16 and the voltage waveform B-E is applied to the picture element A56. The flickers produced by the difference in effective voltage waveforms were not so problematic, when a contrast ratio of the "dark" and "bright" display states of the FLCD is low, and when only a few scanning electrodes, to which the selective voltage is applied to rewrite the display contents in the case of applying the conventional display control method, are adjoined.

[0018] However, when the contrast ratio of the FLCD rises and a large number of scanning electrodes to which the selective voltage is applied to rewrite the display contents are adjoined, in order to apply the selective voltage to these scanning electrode without being noticed, as the impressed voltage waveforms to the scanning electrodes L and the signal electrodes S used in the driving method disclosed in Japanese Patent Application Laid Open No. Sho 64-59389 (1989), the waveform diagrams of Fig. 9 and Fig. 10 must be applied in lieu of the waveform diagram of Fig. 6 (descriptions on Fig. 9 and Fig. 10 will be omitted since it is similar to Fig. 6).

[0019] In the impressed voltage waveforms shown in Fig. 9, however, the possibility of rewriting the picture elements into the "dark" display state by the waveform A-C of Fig. 9 (6) is lower than the possibility of rewriting the picture elements into the "dark" display state by the waveform A-C of Fig. 6 (6), thereby deteriorating the rewriting characteristic of the FLCD, and in the impressed voltage waveforms shown in Fig. 10, the influence exerted on the amount of light transmitting the picture elements in "dark" and "bright" display states by the waveforms B-C, B-D, B-E in Fig. 10 (9) to Fig. 10 (11) is larger than the influence exerted on the amount of light transmitting the picture elements in "dark" and "bright" display states by the waveforms B-C, B-D, B-E in Fig. 6 (9) to Fig. 6 (11), results in deteriorating the contrast ratio of the FLCD.

SUMMARY OF THE INVENTION

[0020] Taking into consideration of such problems and improving a driving method disclosed in Japanese Patent Application Laid Open No. Sho 64-59389 (1989), it is an object of the present invention to provide a driving method and apparatus for liquid crystal display device, in which the contrast ratio of an FLCD is raised and even when as number of scanning electrodes to which a selective voltage is applied to rewrite the display contents are adjoined, the rewriting characteristic and contrast ratio of the FLCD are not deteriorated.

[0021] The invention is directed to the driving method for the liquid crystal display device characterized by, in the driving method of the liquid crystal display device, in which a ferroelectric liquid crystal is interposed between a plurality of scanning electrodes and signal electrodes which are arranged in a direction intersecting each other, intersecting areas of the scanning electrodes and the signal electrodes are formed into picture elements, a selective voltage for rewriting the picture elements on the electrode is applied to one of the plural scanning electrodes, a non-selective voltage for not rewriting the picture elements on the electrode is applied to the remaining scanning electrodes, and a signal voltage is applied to the signal electrodes responsive to data to be displayed on the picture elements on the scanning electrodes to which the selective voltage is applied, dividing the scanning electrodes constituting the liquid crystal display device into a plurality of scanning electrode groups, applying sequentially the selective voltage to the scanning electrodes constituting the scanning electrode group over two group fields, applying, in a first group field, the signal voltage to the signal electrodes responsive to whether the picture elements on the selected scanning electrode are changed into the dark display state from the bright display state, or the dark and bright display states are not changed, applying, in a second group field, the signal voltage to the signal electrodes responsive to whether the picture elements on the selected scanning electrode are changed into the bright display state from the dark display state, or the bright and dark display states are not changed, and uniting the two group fields together, bringing the picture elements on the scanning electrodes to respond to change to the dark display state from the bright display state, or to the bright display state from the dark display state, or not to change the bright and dark display states.

[0022] The invention is directed to the driving method for ferroelectric liquid crystal panel characterized by, interposing a ferroelectric liquid crystal between a plurality of scanning electrodes and signal electrodes which are arranged in a direction intersecting each other, intersecting areas of the scanning electrodes and the signal electrodes being formed into picture elements, applying a selective voltage for rewriting the picture elements on the electrode to one of the plural scanning electrodes, applying a non-selective voltage for not rewriting the picture elements on the electrode to the remaining scanning electrodes, and applying the signal voltage to the signal electrode responsive to data to be displayed by the picture elements on the scanning electrode to which the selective voltage is applied.

[0023] (1) The scanning electrodes constituting the ferroelectric liquid crystal panel are divided into a plurality of scanning electrode groups, and the selective voltage is applied to the scanning electrodes constituting the scanning electrode groups over two group fields.

[0024] In the first group field, the signal voltage for changing the picture elements on the selected scanning electrode into the dark display state from the bright display state, or the signal voltage for not changing the bright and dark display states is applied to the signal electrodes.

[0025] In the second group field, the signal voltage for changing the picture elements on the selected scanning electrode into the bright display state from the dark display state, or the signal voltage for not changing the bright and dark display states is applied to the signal electrodes.

[0026] Uniting the two group fields together, the picture elements on the scanning electrodes constituting the scanning electrode group are brought to respond to change to the dark display state from the bright display state, or change to the bright display state from the dark display state, or not to change the bright and dark display states.

[0027] Thereby, the difference between the effective voltage waveform applied to the picture element Aij when the selective voltage is applied to the scanning electrode Li and the non-rewriting voltage is applied to the signal electrode Sj, and the effective voltage waveform applied to the picture element Aij when the non-selective voltage is applied to the scanning electrode Li and the dark rewriting voltage or bright rewriting voltage or non-rewriting voltage is applied to the signal electrode Sj is restricted to only a phase shift, and the changes of effective voltage waveform applied to the picture elements is kept lower than the changes of effective voltage waveform due to switching of the combination of the driving voltages corresponding to the two group fields to solve the problems stated above.

[0028] (2) It is preferable to have a display control device of the ferroelectric liquid crystal panel, in which, particularly as the display control device for realizing the driving method described in (1), the display control device having a display memory for storing one picture screen of data to be displayed next, a discriminating memory for storing whether or not data in the display memory has changed for every scanning electrode in the lump, and a holding memory for storing one picture screen of the state of picture elements displayed at present on the ferroelectric liquid crystal panel is used, and when storing data to be displayed in the display memory in advance, whether or not the data in the display memory has changed is stored simultaneously in the discriminating memory for every scanning electrode in the lump, and when rewriting the display picture screen of the FLCD, the scanning electrode group including the picture elements in which data to be displayed has changed is known by checking the stored value of the discriminating memory, and by applying the selective voltage to the scanning electrodes constituting the scanning electrode group mainly including the picture elements in which data to be displayed has changed, the time required for applying the selective voltage to a number of scanning electrodes constituting the scanning electrode group in which the data to be displayed has not changed can be saved

[0029] When applying the selective voltage A to the scanning electrode Li, the non-selective voltage B to the scanning electrode Lk (i≠k), the dark rewriting voltage C or bright rewriting voltage D to the signal electrode Sj and the non-rewriting voltage E to the signal electrode Sh (h≠j), the following relationship is established between the voltage Vij applied to the picture element Aij, the voltage Vih applied to the picture element Aih, the voltage Vkj applied to the picture element Akj and the voltage Vkh applied to the picture element Akh,

[0030] Therefore, the flicker may be eliminated if the effects of the picture elements of "dark" or "bright" display state exerted on the transmission light quantity, when applying the voltage Vih to the picture element and the voltage Vkj or Vkh to the picture element are made equal. That is, the voltage Vij may be allotted equally to the voltage Vih and Vkh, and the magnitudes and polarities of the voltage waveforms of the voltage Vih, Vkj and Vkh may be made equal to change phases (used in the driving method disclosed in Japanese Patent Application Laid Open No. Sho 64-59389 (1989)).

[0031] However, when only the dark rewriting voltage C and the non-rewriting voltage E are applied to the signal electrode, or just the bright rewriting voltage D and the non-rewriting voltage E are applied thereto, it is easy to drive while satisfying the aforesaid conditions and avoiding deterioration of the rewriting characteristic and contrast, for instance, by using only the first half 3t0 and the second half 3t0 of the voltage waveform combination of Fig. 10, but in case the dark rewriting voltage C, bright rewiring voltage D and non-rewriting voltage E are applied to the signal electrode, in order to satisfy the conditions stated above the rewriting characteristic and contrast may be deteriorated as the voltage waveform combination of Fig. 9 and Fig. 10.

[0032] By alternately driving by only applying the dark rewriting voltage C and the non-rewriting voltage E to the signal electrode, and applying only the bright rewriting voltage D and the non-rewriting voltage E to the signal electrode, the driving method capable of applying the dark rewriting voltage C, bright rewriting voltage D and non-rewriting voltage E to the signal electrode, while avoiding the deterioration of the rewriting characteristic and contrast and satisfying the conditions aforementioned can be realized.

[0033] In particular, when the non-selective voltage B is applied to the scanning electrode Li and the dark rewriting voltage C, bright rewriting voltage D and non-rewriting voltage E are applied to the signal electrode Sj, and the selective voltage A is applied to the scanning electrode Li for the voltage waveforms B-C, B-D, and B-E applied to the picture element Aij, non-rewriting voltage E is applied to the signal electrode Sj, the luminous variation by the voltage waveform A-E applied to the picture element Aij can be kept smaller than the luminous variation by switching the driving by combination of two sets of voltage waveforms whenever selecting the plural scanning electrodes, and by making the switching period constant above 60 Hz, the driving method without flickers can be realized.

[0034] Also, the invention is directed to a driving apparatus for the liquid crystal display device, comprising; the liquid crystal display device in which a ferroelectric liquid crystal is interposed between a plurality of scanning electrodes and signal electrodes which are arranged in a direction intersecting each other, and intersecting areas of the scanning electrodes and the signal electrodes are formed into picture elements; a scanning electrode driving circuit in which a selective voltage for rewriting the picture elements on the electrodes is applied to one of the plural scanning electrodes, and a non-selective voltage for not rewriting the picture elements on the electrodes is applied to the remaining scanning electrodes; and a signal electrode driving circuit in which a signal voltage is applied to the signal electrode responsive to data to be displayed by the picture elements on the scanning electrodes to which the selective voltage is applied; the scanning electrode driving circuit dividing the scanning electrodes constituting the liquid crystal display device into a plurality of scanning electrode groups, and applying sequentially the selective voltage to the scanning electrodes constituting the scanning electrode group over the two group fields, the signal electrode driving circuit, in a first group field, applying the signal voltage to the signal electrodes responsive to whether the picture elements on the selected scanning electrode are changed into the dark display state from the bright display state, or the bright and dark display states are not changed, and in a second group field, applying the signal voltage to the signal electrodes responsive to whether the picture elements on the selected scanning electrode are changed into the bright display state from the dark display state, or the bright and dark display states are not changed, and uniting the two groups together, bringing the picture elements on the scanning electrodes to respond to change to the dark display state from the bright display state, or change to the bright display state from the dark display state, or not to change the bright and dark display states.

[0035] Furthermore, the invention comprises:
   a display memory for storing one picture screen of data to be displayed next;
   a discriminating memory for storing whether or not the data in the display memory has changed for every scanning electrode group in the lump; and
   a holding memory for storing one picture screen of the state of picture elements displayed, at present, on the liquid crystal display device, and is characterized by, when storing data to be displayed in the display memory in advance, storing simultaneously whether or not the data in the display memory has changed in the discriminating memory for every scanning electrode group in the lump, and in case the display screen is rewritten, checking the scanning electrode group including the picture elements in which data to be displayed has changed in response to the discriminating memory, and applying the selective voltage to the scanning electrode constituting the scanning electrode group including the picture elements in which data to be displayed has changed.

[0036] As described heretofore, according to the driving method of the display device of the invention, it is possible to display without flickers, even when display device having such a high contrast ratio as producing the flickers is used in the driving method disclosed in Japanese Patent Application No. Sho 64-59389 (1989).

[0037] Also, since variations in display of the display device are exerted on a plurality of adjoining scanning electrodes in many cases, even when the display variations are monitored for every scanning electrode group, the display device having the display speed which is substantially the same as the conventional display control method aforementioned can be realized.

BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Other and further objects, features, and advantages of the invention will be more explicit from the following detailed description taken with reference to the drawings wherein:

Fig. 1 is a sectional view showing the configuration of a ferroelectric liquid crystal panel used in a display device,

Fig. 2 is a view showing a state wherein Japanese characters meaning "ORDINARY DIELECTRIC" are displayed on the ferroelectric liquid crystal display,

Fig. 3 is a view showing a state wherein Japanese characters meaning "FERROELECTRIC" are displayed on the ferroelectric liquid crystal display,

Fig. 4 is a block diagram showing a schematic configuration of a display device using conventional driving method,

Fig. 5 is a waveform diagram showing an output signal from a personal computer in the display device,

Fig. 6 is a view showing impressed voltages used for driving a ferroelectric liquid crystal personal computer in the driving method,

Fig. 7 is a view showing the change from Japanese characters meaning "FERROELECTRIC" to "ORDINARY DIELECTRIC" in the ferroelectric liquid crystal display for every picture element,

Fig. 8 is a waveform diagram showing voltages applied to the ferroelectric liquid crystal panel in the driving method,

Fig. 9 and Fig. 10 are waveform diagrams showing separate impressed voltages used for driving the ferroelectric liquid crystal panel in the driving method,

Fig. 11 is a block diagram showing a schematic configuration of display device using the driving method of the invention,

Fig. 12 is a view showing a state wherein Japanese characters meaning "FERROELECTRIC" are displayed on the ferroelectric liquid crystal display panel used in the display device,

Fig. 13 is a circuit diagram showing a schematic configuration of a scanning side driving circuit used in the ferroelectric liquid crystal display panel,

Fig. 14 and Fig. 15 are waveform diagrams showing impressed voltages used for driving the ferroelectric liquid crystal panel in the driving method,

Fig. 16 is a waveform diagram showing voltages applied to the ferroelectric liquid crystal panel in the driving method,

Fig. 17 and Fig. 18 are waveform diagrams showing output signals from a control circuit in the display device in which the driving system is simply applied,

Fig. 19 is a block diagram showing a schematic configuration of a control circuit 22 in display device in which the driving method of the invention is applied, and

Fig. 20 and Fig. 21 are waveform diagrams showing output signals from the control circuit in the display device.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0039] Now referring to the drawing, preferred embodiments of the invention are described below.

"Embodiment 1"

[0040] Fig. 11 is a block diagram schematically showing a configuration of display device in which a driving method of the invention is applied. The configuration of the display device is schematically same as a conventional display device. Information necessary for image display is obtained from the digital signals outputted to a CRT display 3 from a personal computer 2, the digital signals are transformed into the driving signals for displaying images on an FLCD 20 in a control circuit 22, thereby the image display is effected on the FLCD 20.

[0041] The digital signals outputted to the control circuit 22 from the personal computer 2 are those shown in Fig. 5 aforementioned.

[0042] Fig. 1 is a sectional view showing a schematic configuration of an FLC panel. Two sheets of glass substrates 5a and 5b are arranged in opposition to each other. A signal electrode S consisting of indium tin oxide (hereinafter abbreviated as ITO) is arranged plurully in parallel on the surface of one glass substrate 5a, and a transparent insulating film 6a consisting of SiO₂ is covered thereon. On the surface of the other glass substrate 5b opposing to the signal electrode S, a scanning electrode L consisting of ITO is arranged plurully in parallel in a direction orthogonal to the signal electrode S, and is covered by a transparent insulating film b thereon.

[0043] On the insulating films 6a, 6b, orientation films 7a, 7b consisting of polyvinyl alcohol and the like and treated by rubbing processing are formed respectively. The two glass substrates 5a, 5b are bonded together with a sealing agent 8 leaving partially an injection port, which is sealed by the sealing agent 8 after an FLC 9 is introduced into a space between the orientation films 7a, 7b by the vacuum injection there through. The two glass substrates 5a, 5b thus bonded together are clamped between two polarizing plates 10a, 10b arranged such that respective polarizing axes intersect orthogonally.

[0044] In the FLCD 20 of this embodiment, polyimide treated by rubbing processing is used as the orientation films 7a, 7b, and as a ferroelectric liquid crystal ZLI-4237/000 by Melk Corp. is used.

[0045] Further, since an FLC molecule has two different stable states, the relationship between the glass substrates 5a, 5b and the polarizing axes is so adjusted that one of the two stable states becomes dark.

[0046] Fig. 12 is a plan view showing a configuration of the FLCD 20, wherein to the scanning electrodes L of the FLC panel of a simple matrix construction abovementioned, a scanning side driving circuit 21 is connected, and to the signal electrodes S, a signal driving circuit 12 is connected. The scanning driving circuit 21 is a circuit for applying the voltage to the scanning electrodes L, and the signal driving circuit 12 is a circuit for applying the voltage to the signal electrodes S. That is, there is only a difference in configuration of the scanning side driving circuit between the FLCD 20 and the FLCD 1 of Fig. 3.

[0047] Fig. 13 is a circuit diagram showing a schematic configuration of the scanning driving circuit 21 used in the FLCD 20 stated above. The scanning side driving circuit 21 is constituted by, a shift register consisting of 8 D-type flip-flops (hereinafter abbreviated as D-FF) 30 (two D-FFs are shown in the figure), 8 shift registers (only half-way to the second register is shown in the circuit diagram) consisting of 4 D-FFs 30, 10 NAND gates (only 4 NAND gates are shown in the circuit diagram) 32, and 32 sets of voltage switching analog switches (only 6 2-voltage switching analog switches are shown in the circuit diagram) 31. The scanning side driving circuit 21 is a circuit to which a group selective signal FI, selective signal YI. group clock FCK-, scanning side clock YCK-, selective voltage VCA and non-selective voltage VCB are inputted, and whereby the selective voltage VCA is applied sequentially by the selective signal YI to the scanning electrodes Li included in the scanning electrode group selected by the group selective signal FI, and the non-selective voltage VCB is applied to the other scanning electrodes Lk (k≠i, i=1 to 32).

[0048] Fig. 5 is a waveform diagrams of signals outputted to the CRT display 3 from the personal computer 2 stated above. Fig. 5 (1) shows a horizontal synchronizing signal HD- which is outputted to the CRT display 3 and gives one horizontal scanning section period of image information, Fig. 5 (2) shows a vertical synchronizing signal VD- which gives one picture screen period of the information, and Fig. 5 (3) shows the information, as display data Data, for every horizontal scanning section in the lump, index numerals corresponding to the scanning electrodes Li of the FLCD 20.

[0049] Fig. 5 (4) is a waveform diagram showing one horizontal scanning section of the horizontal synchronizing signal HD- which is expanded, Fig. 5 (5) is a waveform diagram showing one horizontal scanning section of the display data Data which is expanded, index numerals corresponding to the signal electrodes Sj of the FLCD 20, and Fig. 5 (6) is a waveform diagram showing a data transfer clock CLK for one picture screen of the display data Data.

[0050] Fig. 14 and Fig. 15 are views showing the voltage waveform combination for realizing the driving method of the invention. Fig. 14 shows the voltage waveform combination which changes the picture elements on the scanning electrode selected, in the first group field, into a dark display state from a bright display state, or does not change the dark and bright display states. A waveform shown in Fig. 14 (1) is the waveform of the selective voltage A which is applied to the scanning electrodes L for rewriting the memory state of the picture elements on the scanning electrodes L or the luminous state displayed, and a waveform shown in Fig. 14 (2) is the waveform of the non-selective voltage B, which is applied to the other scanning electrodes L for not rewriting the display state of the picture elements on the scanning electrodes L.

[0051] A waveform shown in Fig. 14 (3) is the waveform of the dark rewriting voltage C, which is applied to the signal electrodes S for rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied into the "dark" luminous state, a waveform shown in Fig. 14 (4) is the waveform of the bright rewriting voltage D, which is applied to the signal electrodes S, and by which the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied can not be rewritten into the "bright" luminous state, and a waveform shown in Fig. 14 (5) is the waveform of the non-rewriting voltage E which is applied to the signal electrodes S for not rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied.

[0052] Fig. 14 (6) to Fig. 14 (11) are views showing the waveforms of the effective voltage applied to the picture element Aij. A waveform A-C of Fig. 14 (6) is the voltage waveform applied to the picture element Aij, when the selective voltage A is applied to the scanning electrode Li and the dark rewriting voltage C is applied to the signal electrode Sj, a waveform A-D of Fig. 14 (7) is the voltage waveform applied to the picture element Aij, when the selective voltage A is applied to the scanning electrode Li and the bright rewriting voltage D is applied to the signal electrode Sj, a waveform A-E of Fig. 14 (8) is the voltage waveform applied to the picture element Aij, when the selective voltage A is applied to the scanning electrode Li and the non-rewriting voltage E is applied to the signal electrode Sj, a waveform B-C of Fig. 14 (9) is the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the dark rewriting voltage C is applied to the signal electrode Sj, a waveform B-D of Fig. 14 (10) is the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the bright rewriting voltage D is applied to the signal electrode Sj, and a waveform B-E of Fig. 14 (11) is the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the non-rewriting voltage E is applied to the signal electrode Sj.

[0053] Also, Fig. 15 shows the voltage waveform combination which changes the picture elements on the scanning electrodes selected in the second group field to the bright display state from the dark display state, or does not change the bright and dark display states. A waveform shown in Fig. 15 (1) is the waveform of the selective voltage A' which is applied to the scanning electrodes L for rewriting the memory state of the picture elements on the scanning electrodes L or the luminous state displayed, and a waveform shown in Fig. 15 (2) is the waveform of the non-selective voltage B' which is applied to the other scanning electrodes L for not rewriting the display state of the picture elements on the scanning electrodes L.

[0054] A waveform shown in Fig. 15 (3) is the waveform of the dark rewriting voltage C' which is applied to the signal electrodes S, and by which the display state of the picture elements on the scanning electrodes L to which the selective voltage A' is applied can not be rewritten, a waveform shown in Fig. 15 (4) is the waveform of the bright rewriting voltage D' which is applied to the signal electrodes S for rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A' is applied into the "bright" luminous state, and a waveform shown in Fig. 15 (5) is the waveform of the non-rewriting voltage E' which is applied to the signal electrodes S for not rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A' is applied.

[0055] Fig. 15 (6) to Fig. 15 (11) show wave forms of the effective voltage applied to the picture element Aij. A waveform A'-C' of Fig. 15 (6) shows the voltage waveform applied to the picture element Aij, when the selective voltage A' is applied to the scanning electrode Li and the dark rewriting voltage C' is applied to the signal electrode Sj, a waveform A'-D' of Fig. 15 (7) shows the voltage waveform applied to the picture elements Aij, when the selective voltage A' is applied to the scanning electrode Li and the bright rewriting voltage D' is applied to the signal electrode Sj, a waveform A'-E' of Fig. 15 (8) shows the voltage waveform applied to the picture element Aij, when the selective voltage A' is applied to the scanning electrode Li and the non-rewriting voltage E' is applied to the signal electrode Sj, a waveform B'-C' of Fig. 15(9) shows the voltage waveform applied to the picture element Aij, when the non-selective voltage B' is applied to the scanning electrode Li and the dark rewriting voltage C' is applied to the signal electrode Sj, a waveform B'-D' of Fig. 15 (10) shows the voltage waveform applied to the picture elements Aij, when the non-selective voltage B' is applied to the scanning electrode Li and the bright rewriting voltage D' is applied to the signal electrode Sj, and a waveform B'-E' of Fig. 15 (11) shows the voltage waveform applied to the picture element Aij, when the selective voltage B' is applied to the scanning electrode Li and the non-rewriting voltage E' is applied to the signal electrode Sj.

[0056] For rewriting the display state of the picture element Aij of the FLCD 2 in Fig. 12 by the driving method of the invention using the voltage waveforms stated above, in this embodiment, the scanning electrodes L1 to L32 are divided into eight sets of scanning electrode groups of L1 to L4, L5 to L8, ..., and L29 to L32, which are designated as the scanning electrode groups "1", "2", ..., and "8".

[0057] Then, for every scanning electrode group, the selective voltage A shown in Fig. 14 (1) is applied sequentially to all of the scanning electrode Li, for example, in order of L1, L2, L3 and L4, included in the scanning electrode group, to the all remaining scanning electrodes Lk (k≠i. k=1 to 32) the non-selective voltage B shown in Fig. 14 (1) is applied, and when rewriting, in synchronism therewith, the picture element Aij from the "bright" display state to the "dark" display state, the dark rewriting voltage C of Fig. 14 (3) is applied to the signal electrode Sj, when rewriting the picture element Aij from the bright display state into the dark display state (actually, it is impossible to rewrite at this voltage waveform), the bright rewriting voltage D shown in Fig. 14 (4) is applied to the signal electrode Sj, and when keeping the picture element Aij in the "bright" display state or "dark" display state, the non-rewriting voltage E shown in Fig. 14 (5) is applied to the signal electrode Sj.

[0058] After applying the selective voltage shown in Fig. 14 (1) to all of the scanning electrodes included in one scanning electrode group, then the selective voltage A' shown in Fig. 15 (1) is applied sequentially to the all scanning electrodes Li, for example, in order of L1, L2, L3 and L4, included in the scanning electrode group, to the all remaining scanning electrodes Lk (k≠i, k=1 to 32) the non-selective voltage B' shown in Fig. 15 (2) is applied, and when rewriting, in synchronism therewith, the picture element Aij from the "bright" display state to the "dark" display state (actually, it is impossible to rewrite at this voltage waveform), the dark rewriting C' shown in Fig. 15 (3) is applied to the signal electrode Sj, when rewriting the picture element Aij from the "dark" display state to the "bright" display state, the bright rewriting voltage D' shown in Fig. 15 (4) is applied to the signal electrode Sj, and when keeping the picture element Aij in the "bright" display state or "dark" display state, the non-rewriting voltage E' shown in Fig. 15 (5) is applied to the signal electrode Sj.

[0059] Fig. 16 shows the voltage waveforms applied to the scanning electrodes L1, L2, L5, signal electrodes S5, S6 and picture elements A15, A16, A25, A26, when, as same as the conventional example, rewriting a state wherein Japanese characters meaning "FERROELECTRIC" are displayed on a picture screen by the picture elements Aij which are in the dark display state indicated by oblique lines in the FLCO 20 of Fig. 12, into a state wherein Japanese Characters meaning "ORDINARY DIELECTRIC" are displayed as shown in Fig. 2. Fig. 16 (1), as a reference, shows a waveform of a transfer clock YCK -of the selective signal YI in a shift register in the scanning side driving circuit 21, Fig. 16 (2) shows a waveform of the selective signal YI, Fig. 16 (3) shows an impressed voltage waveform to the scanning electrode L1, Fig. 16 (4) shows an impressed voltage waveform to the scanning electrode L2, Fig. 16 (5) shows an impressed voltage waveform to the scanning electrode L5, Fig. 16 (6) shows an impressed voltage waveform to the signal electrode S5, Fig. 16 (7) shows an impressed voltage waveform to the signal electrode S6, Fig. 16 (8) shows an effective voltage waveform applied to the picture element A15, Fig. 16 (9) shows an effective voltage waveform applied to the picture element A16, Fig. 16 (10) shows an effective voltage waveform applied to the picture element A25 and Fig. 16 (11) shows an effective voltage waveform applied to the picture element A56.

[0060] That is, in the driving method of the invention, as it is clear from the effective voltage waveform applied to the picture element A16 shown in Fig. 16 (9), and the effective voltage waveform applied to the picture element A56 shown in Fig. 16 (11), the voltage applied to the picture element Aij when the scanning electrode Li is selected but the display state is not rewritten, is substantially as same as the voltage applied to the picture element Aij when the scanning electrode Li is not selected, the difference between the two is smaller as compared with Fig. 8 wherein the conventional driving method is applied. Besides, the difference between the case wherein the voltage waveform combination shown in Fig. 14 or Fig. 15 is continued, and the case of switching from the voltage waveform combination of Fig. 14 to that of Fig. 15, or from the voltage waveform combination of Fig. 15 to that of Fig. 14 is larger than the difference between the two.

[0061] Accordingly, even in the case of low-speed driving wherein the time required for applying the selective voltage A, after applying to a certain scanning electrode Li, to the same scanning electrode next, or the one frame period is longer than 33.3 milliseconds (corresponds to 30 Hz), it can be displayed without feeling any flickers by shortening the switching period of the two-voltage waveform combination below 33.3 milliseconds.

"Embodiment 2"

[0062] Now, when the invention is embodied simply, the drive signal outputted to the FLCD 20 shows the waveforms shown in Fig. 17 and Fig. 18. That is, Fig. 17 (1) and Fig. 18 (1) show a group selective signal FI, which is transferred through a shift register consisting of 8 D-FFs in the scanning side driving circuit 21 by a group clock FCK- shown in Fig. 17 (2) and Fig. 18 (2), and controls the selective signal YI shown in Fig. 17 (3) and Fig. 18 (3) to be inputted in which shift register consisting of 4 D-FFs among the 8 shift registers consisting of 4 D-FFs in the scanning side driving circuit 21.

[0063] Fig. 17 (4) and Fig. 18 (4) show a scanning side clock YCK-, which transfers the selective signal YI in the shift register selected by the group selective signal FI. Fig. 17 (5) and Fig. 18 (5) show display data DATA corresponding to picture elements of the FLCD 20, Fig. 17 (6) and Fig. 18 (6) show a latch clock LPK- which takes in and holds the display data DATA in a shift register, not shown, included in the signal side driving circuit 12, in a separate register, not shown, included in the same signal side driving circuit 12, Fig. 17 (7) and Fig. 18 (7) show whether a set of the voltages VCA, VCB, inputted to the scanning electrodes L have the voltage (which are indicated merely as VC in Fig.12,) waveforms A, B or A', B', and Fig. 17 (8) and Fig. 18 (8) are waveform diagrams showing whether a set of the voltages VSC, VSD, VSE, inputted to the signal electrodes S have the voltage (which are indicated merely as VS in Fig. 12,) waveforms C, D, E or C', D'. E'.

[0064] Fig. 17 (9) is a waveform diagram showing the expanded display data DATA for one selective time, Fig. 17 (10) is a waveform diagram showing the expanded latch clock LPK- for one selective time, and Fig. 17 (11) is a waveform diagram showing a data transfer clock XCK for sequentially transferring the display data DATA in the shift register, not shown, included in the signal side driving circuit 12. Fig. 18 (1) to Fig. 18 (8) show waveforms following the waveforms shown in Fig. 17 (1) to Fig. 17 (8).

[0065] As such, it is not desirable as the display control method for the FLCD having a large number of scanning electrodes, if the selective voltage is applied to all scanning electrodes L17 to L32 whose picture element display has not changed. Therefore, in order to carry out the invention, the display control method in which, as same as the conventional display control method, the selective voltage is not applied as much as possible to the scanning electrodes, the display state of picture elements on which do not change, and the display state of the FLCD is rewritten at high speed is required.

[0066] That is, in such a display control method, the scanning electrodes of the FLCD are divided into several sets of scanning electrode groups, whether or not the display state of picture elements on the scanning electrodes included in the respective scanning electrode groups has changed is stored for every scanning electrode group, and in response to this information, the selective voltage is applied to the scanning electrodes which are included in the scanning electrode group in which changes have occurred.

[0067] A block diagram of Fig. 19 schematically shows the configuration of the control circuit 22 of a display control apparatus used in the invention to realize the display control method specifically. A display memory 26 stores, as required, display data Data of one picture screen outputted from the personal computer 2 of Fig. 11. From the display memory 26, displacements data DF showing the difference between display data displayed, at present, on the screen of the FLCD 20, and display data to be displayed on the next frame, or the display data to be written now into the display memory 26, is outputted to a discriminating memory 27, display data stored in the display memory 26 is outputted to a drive control circuit 29 as data DD and to a holding memory 28 as data PDX.

[0068] The discriminating memory 27 stores, in response to the displacement data DF outputted from the display memory 26, whether or not there is even one picture element in which the display data displayed, at present, on the picture elements on the scanning electrodes of the FLCD 20 differs from the display data to be displayed on the next frame, as discrimination data for every scanning electrode group. In the discriminating memory 27, for storing the discrimination data for every scanning electrode, 1-bit memory capacity is allocated respectively and discrimination data SAME- is outputted to an output control circuit 24.

[0069] The holding memory 28 holds one picture screen of display data same as the display data displayed, at present, on the FLCD 20, and after outputting hold data RD to a drive-control circuit 29, stores display data PDX which includes same information as display data DD outputted to the drive-control circuit 29 from the display memory 26.

[0070] An input control circuit 23 controls, in response to the horizontal synchronizing signal HD-, vertical synchronizing signal VD- and clock CLK outputted from the personal computer 2, the input side operation of the display memory 26, discriminating memory 27 and holding memory 28 directly or indirectly through an input/output switching circuit 25.

[0071] An output control circuit 24 controls, in response to the discrimination data SAME- outputted from the discriminating memory 27 and an internal clock CK, the output side operation of the display memory 26, discriminating memory 27 and holding memory 28 directly or indirectly through the input/output switching circuit 25, and at the same time, instructs the display position of the display data DATA outputted from the drive control circuit 29 on the FLCO 20.

[0072] The input/output switching circuit 25 switches, in response to signals of the input control circuit 23 and the output control circuit 24, input/output control signals applied to the display memory 26, discriminating memory 27 and holding memory 28.

[0073] The drive control circuit 29 outputs image data DATA from the display data DD given from the display memory 26 and the hold data RD given from the holding memory 28, and in response to the signal given from the output control circuit 24, outputs a signal giving the position of the image data DATA on the FLCD 20, the selective voltage VCA, non-selective voltage VCB, dark rewriting voltage VSC, bright rewriting voltage VSD and non-rewriting voltage VSE to the FLCD 20.

[0074] Specific voltage waveforms of the selective voltage VCA and non-selective voltage VCB applied to the scanning electrodes L, and the dark rewriting voltage VSC, bright rewriting voltage VSD and non-rewriting voltage VSE applied to the signal electrodes S aforementioned are shown in Fig. 14 and Fig. 15, which are formed by switching the voltage waveform combination of Fig. 14 and the voltage waveform combination of Fig. 15 by the voltage waveform switching signal B-/W outputted from the output control circuit 24.

[0075] Fig. 20 and Fig. 21 are waveform diagrams showing a drive signal outputted to the FLCD 20 from the control circuit 22, in case the display state of Japanese characters meaning "FERROELECTRIC" of the picture elements Aij on the FLCD 20 in Fig. 12 is rewritten into the display state of Japanese characters meaning "ORDINARY DIELECTRIC" of the picture elements Aij on the FLCD 1 in Fig. 2, by the display control method using the control circuit 22 of Fig. 19 aforementioned. Fig. 20 (1) and Fig. 21 (1) show a group selective signal FI, which is transferred through a shift register consisting of eight D-FFs of the scanning side driving circuit 21 by a group clock FCK-shown in Fig. 20 (2), and Fig. 21 (2), and controls the selective signal YI shown in Fig. 20 (3) and Fig. 21 (3) to be inputted in which shift register consisting of four D-FFs among the 8 shift registers consisting of four D-FFs in the scanning side during circuit 21.

[0076] Fig. 20 (4) and Fig. 21 (4) show the scanning side clock YCK-, which transfers the selective signal Y1 in the shift register selected by the group selective signal FI. Fig. 20 (5) and Fig. 21 (5) show display data DATA corresponding to picture elements of the FLCD 20, Fig. 20 (6) and Fig. 21 (6) show a latch clock LPK- which takes in and holds the display data DATA in a shift register, not shown, included in the signal side driving circuit 12 in a separate register, not shown, included in the same signal side drawing circuit 12, Fig. 20 (7) and Fig. 21 (7) show whether the voltages VCA, VCB applied to the scanning electrodes L have the voltage waveforms A, B or A', B', and Fig. 20 (8) and Fig. 21 (8) are waveform diagrams showing whether the voltages VSC, VSD, VSE applied to the signal electrodes S have the voltage waveforms C, D, E or C', D', E'. Fig. 20 (9) is a waveform diagram showing the expanded display data DATA for one selective time, Fig. 20 (10) is a waveform diagram showing the expanded latch clock LPK- for one selective time, and Fig. 20 (11) is a waveform diagram showing a data transfer clock XCK for sequentially transferring the display data DATA in the shift register, not shown, included in the signal side driving circuit 12. Fig. 21 (1) to Fig. 21 (8) show waveforms following the waveforms shown in Fig. 20 (1) to Fig. 20 (8).

[0077] Describing the display control method of the invention along the waveform diagrams of Fig. 20 and Fig. 21, in a frame of the picture screen of the FLCD 20 wherein Japanese characters meaning "FERROELECTRIC " are displayed, display data stored in the display memory 26 and holding memory 28 are the state of picture elements of 32 x 16 of Fig. 12 itself, and discrimination data stored in the discriminating memory 27 are all "0".

[0078] In this state, the display data Data displaying Japanese characters meaning "ORDINARY DIELELCTRIC" are sent to the display memory 26 from the personal computer 1. At this time, it is preferable to confirm that all of the discrimination data stored in the discriminating memory 27 are "0", and to allow input of the data Data of Japanese characters meaning "ORDINARY DIELECTRIC" to the display memory 26. When it is allowed to input, displacement data DF of one picture screen which shows the difference between "FERROELECTRIC" and "ORDINARY DIELECTRIC" and as shown by symbols C, D in Fig. 7 are sent to the discriminating memory 27 from the display memory 26. The displacement data DF for one scanning electrode group are lumped together in the discriminating memory 27, and when there is even one data indicated by the symbol "C" or "D" of Fig. 17 in the displacement data DF included in the scanning electrode group, "1" is stored, and when there is none "0" is stored. That is, "1" is stored for the scanning electrode groups L1 to L4, L5 to L8, ..., and L13 to L16, and "0" is stored for the scanning electrode groups L17 to L20, ..... and L29 to L32.

[0079] The waveform diagrams of Fig. 20 and Fig. 21 illustrate the operation thereafter, in which from the output control circuit 24 an output side group address ABx "1" is outputted to the discriminating memory 27 through the input/output switching circuit 25, and at the same time an output side line address ALx "1" and an output side row address ASx "1" are outputted to the display memory 26, and the output side line address ALx "1" and output side row address ASx "1" are outputted to the holding memory 28. In the output control circuit 24, though it is checked whether the discrimination data SAME- which is the output signal of the discriminating memory 27 is "0" or "1" during "1" to "6" of the output side address ASx (this period corresponds to the period during which the display data DATA of Fig. 20 (9) is shown by the non-signal), since the value of discrimination data corresponding to the scanning electrode groups L1 to L4 is "0" as described above, when the output side row address SAx is "1", it is decided immediately to hold the output side group address ABx "1" as it is, and when the output side line address ASx is "2", the value of discrimination data corresponding to the scanning electrode groups L1 to L4 of the discriminating memory 27 is returned to "0" and waits as it is till the output side row address ASx becomes "7".

[0080] During the period of "7" to "1" of the output side address ASx (this period corresponds to the period during which the display data DATA of Fig. 20 (9) is shown by the symbols "1" to "16"), display data DD corresponding to the scanning electrodes L1 are outputted from the display memory 26, and hold data RD corresponding to the scanning electrodes L1 are outputted from the holding memory 28 to the drive control circuit 29.

[0081] Thereafter, the output side line address ALx is sequentially incremented to "2" to "4", and whenever the output side row address ASx becomes "7" to "10", the display data DD corresponding to the scanning electrodes L2 to L4 are outputted from the display memory 26 to the device control circuit 29, and the hold data RD corresponding to the scanning electrodes L2 to L4 are outputted from the holding memory 28 to the drive control circuit 29.

[0082] During the period mentioned above, the drive control circuit 29 outputs the "dark rewriting" signal to the signal side driving circuit 12 of the FLCD 20 as display data DATA when the hold data RD is "bright" and the display data DD is "dark", outputs the "bright rewriting" signal or "non-rewriting" signal as display data DATA when the hold data RD is "dark" and the display data DD is "bright", and in the other cases outputs the "non-rewriting" signal. Voltage waveforms A, B, C, D, E are outputted from the drive control circuit 29 so as the voltage waveform combination of Fig. 14 corresponds to the display data DATA during this period at the output voltage of the signal side driving circuit 12.

[0083] Thereafter, the output side line address ALx is again incremented sequentially, and whenever the output side row address ASx becomes "7" to "10", the display data corresponding to the scanning electrodes L1 to L4 are outputted from the display memory 26, and the hold data RD corresponding to the scanning electrodes L1 to L4 are outputted from the holding memory 28 to the drive control circuit 29 again.

[0084] During the period mentioned above, the drive control circuit 29 outputs the "dark rewriting" signal or "non-writing" signal to the signal side driving circuit 12 of the FLCD 20 as the display data DATA when the hold data RD is "bright" and the display data DD is "dark", outputs the "bright rewriting" signal as the display data DATA when the hold data RD is "dark" and the display data DD is "bright", and in the other cases outputs the "non-rewriting" signal. Voltage waveforms A', B', C'. D', E' are outputted from the drive control circuit 29 so as the voltage waveform combination of Fig. 15 corresponds to the display data DATA during this period at the output voltage of the signal side driving circuit 12.

[0085] Then, designating the output side group address ABx as "2", the output side group address ABx "2" is outputted to the discriminating memory 27 from the output control circuit 24 through the input/output switching circuit 25, and at the same time the output side line address ALx "5" and the output side row address ASx "1" are outputted to the display memory 26, and the output side line address ALx "5" and output side row address ASx "1" are outputted to the holding memory 28. In the output control circuit 24, during the output side row address ASx is "1" to "6", though the discrimination data SAME- which is the output signal of the discriminating memory 27 is checked, since the value of discrimination data corresponding to the scanning electrode groups L5 to L8 is "1", it is decided immediately to hold the output side group address ABx "2" as it is when the output side row address ASx is "1", and when the output side row address ASx is "2", the value of discrimination data corresponding to the scanning electrode groups L5 to L8 of the discriminating memory 27 is returned to "0", and waits as it is till the output side row address ASx becomes "7".

[0086] Though the same operation as described above is repeated thereafter, when the output side group address ABx becomes "5", the following operation is performed.

[0087] That is, from the output control circuit 24, the output side group address ABx "5" is outputted to the discriminating memory 27 through the input/output switching circuit 25, and at the same time the output side line address ALx "17" and the output side row address ASx "1" are outputted to the display memory 26, the output side line address ALx "17" and output side row address ASx "1" are outputted to the holding memory 28, and the output control circuit 24 checks whether the discrimination data SAME- which is the output signal of the discriminating memory 27 is "0" or "1", while the output side row address ASx is "1" to "6".

[0088] The value of discrimination data corresponding to the scanning electrode groups L17 to L20 is "0" as described above, so that when the output side row address ASx is "2", the value of discrimination data corresponding to the scanning electrode groups L17 to L20 of the discriminating memory 27 is held at "0". Then, the output control circuit 24 increments the group address ABx "6", designates the output side line adress ALx to "21", and when the output side row address ABx is "3". checks whether the discrimination data SAME- which is the output signal of the discriminating memory 27 is "0" or "1".

[0089] Since the value of discrimination data corresponding to the scanning electrode groups L21 to L24 is also "0", when the output side row address ASx is "4", the value of discrimination data corresponding to the scanning electrode groups L21 to L24 of the discriminating memory 27 is held at "0". Then, the output control circuit 24 increments the group address ABx to "7", designates the output side line address ALx to "25", and when the output side row address ASx is "5", checks again whether the discrimination data SAME- which is the output signal of the discriminating memory is "0" or "1".

[0090] Since the value of discrimination data corresponding to the scanning electrode groups L25 to L28 is also "0", when the output side row address ASx is "6" the value of discrimination data corresponding to the scanning electrode groups L25 to L28 of the discriminating memory 27 is held at "0". Then, the output control circuit 24 increments the group address ABx to "8", designates the output side line address ALx to "29", and designates the output side row address ASx as "7", but since the period for checking whether the discrimination data SAME- which is the output signal of the discriminating memory 27 is "0" or "1" is over, the output control circuit 24 holds the group address ABx at "8" as it is.

[0091] While the output side row address ASx is "7" to "10", display data DD corresponding to the scanning electrode L29 is outputted from the display memory 26 to the drive control circuit 29, and hold data RD corresponding to the scanning electrode L29 is outputted from the holding memory 28 to the drive control circuit 29.

[0092] Thereafter, the output side line address ALx is incremented sequentially to "30" to "32", and whenever the output side row address ASx becomes "7" to "10", the display data DD corresponding to the scanning electrodes L30 to L32 are outputted from the display memory 26 to the drive control circuit 29, and from the holding memory 28 the hold data RD corresponding to the scanning electrodes L30 to L32 are outputted to the drive control circuit 29.

[0093] During the period aforementioned, the drive control circuit 29 outputs the "dark rewriting" signal to the signal side driving circuit 12 of the FLCD 20 as display data DATA when hold data RD is "bright" and display data DD is "dark", outputs the "bright rewriting" signal or "non-rewriting" signal as display data DATA when hold data RD is "dark" and display data DD is "bright", and outputs the "non-rewriting" signal in the other cases. Voltage waveforms A', B'. C'. D', E' are outputted from the drive control circuit 29 so as the voltage waveform combination shown in Fig. 14 corresponds to the display data during this period at the output voltage of the signal side driving circuit 12.

[0094] Thereafter, the output side line address ALx is incremented sequentially to "29" to "32", and whenever the output side row address ASx becomes "7" to "10", the display data DD corresponding to the scanning electrodes L29 to L32 are outputted from the display memory 26 to the drive control circuit 29, and from the holding memory 28 the hold data RD corresponding to the scanning electrodes L29 to L32 are outputted.

[0095] During the period aforementioned, the drive control circuit 29 outputs the "dark rewriting" signal or "non-rewriting" signal to the signal side driving circuit 12 of the FLCD 20 as display data DATA when hold data RD is "bright" and display data DD is "dark", outputs the "bright rewriting" signal as display data DATA when hold data RD is "dark" and display data DD is "bright", and outputs the "non-rewriting" signal in the other cases. Voltage waveforms A', B', C', D', E' are outputted from the drive control circuit 29 so as the voltage waveform combination shown in Fig. 15 corresponds to the display data during this period at the output voltage of the signal side driving circuit 12.

[0096] Thereafter, as long as the display data DATA indicating Japanese characters meaning "ORDINARY DIELECTRIC" is continuously transmitted to the display memory 26 from the personal computer 2, the value of discrimination data corresponding to all of the scanning electrode groups of the discriminating memory 27 becomes "0" and the aforesaid operation (executed when the value of the discrimination data is "o") is repeated (while incrementing the group address ABx from "1" to "8".)

[0097] In the embodiment described above, though the FLCD 20 having the picture elements of 16 x 32 has been referred to for the purpose of simplification, when the display control method of the embodiment aforementioned is applied in a FLCD having the picture elements of 1024 x 1024, in which, actually, 16 adjoining scanning electrodes are used as one scanning electrode group, displays with sufficiently high rewriting speed was realized.

[0098] For example, the scanning side driving circuit 21 shown in Fig.13 may be constructed so as to decode the output side line address ALx after latching the same, and apply the voltage VCA to the corresponding scanning electrode L.

[0099] The invention may be emobdied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description and all changes which come within the meaning and the range of equivalency of the claims are therefore intended to be embraced therein.

[0100] There are described above novel features which the skilled man will appreciate give rise to advantages. These are each independent aspects of the invention to be covered by the present application, irrespective of whether or not they are included within the scope of the following claims.

Claims

1. A driving method for liquid crystal display device, wherein a ferroelectric liquid crystal (a) is interposed between a plurality of scanning electrodes (L) and signal electrodes (S) which are arranged in a direction intersecting each other, intersecting areas of the scanning electrodes (L) and the signal electrodes (S) are formed into picture elements (A), a selective voltage (VCA) for rewriting the picture elements (A) on the electrode is applied to one of the plural scanning electrodes. a non-selective voltage (VCB) for not rewriting the picture elements (A) on the electrode is applied to the remaining scanning electrodes, and a signal voltage (VSC,VSD,VSE) is applied to the signal electrodes responsive to data to be displayed by the picture elements on the scanning electrodes to which the selective voltage (VCA) is applied, said driving method for the liquid crystal display device comprising the steps of
   dividing the scanning electrodes (L) constituting the liquid crystal display device into a plurality of scanning electrode groups,
   applying sequentially the selective voltage (VCA) to the scanning electrodes constituting the scanning electrode group over two group fields,
   applying in a first group field the signal voltage (VSC,VSE) to the signal electrodes responsive to whether the picture elements on the selected scanning electrode are changed from the bright display state to the dark display state, or the dark and bright display states are not changed,
   applying, in a second group field, the signal voltage (VSD,VSE) to the signal electrodes responsive to whether the picture elements on the selected scanning electrode are changed from the dark display states to the bright display state, or the bright and dark display states are not changed,
   and uniting the two group fields together, bringing the picture elements on the scanning electrodes to respond to change to the dark display state from the bright display state, or to the bright display state from the dark display state, or not to change the bright and dark display states.

2. A driving apparatus for liquid crystal display device, having liquid crystal display device (20) in which a ferroelectric liquid crystal (a) is interposed between a plurality of scanning electrodes (L) and signal electrodes (S) which are arranged in a direction intersecting each other, and intersecting areas of the scanning electrodes (L) and the signal electrodes (S) are formed into picture elements (A); a scanning electrode driving circuit (21) in which a selective voltage (VCA) for rewriting the picture elements on the electrode is applied to one of the plural scanning electrodes, and a non-selective voltage (VCB) for not rewriting the picture elements on the electrode is applied to the remaining scanning electrodes; and a signal electrode driving circuit (12) in which a signal voltage (VSC,VSD,VSE) is applied to the signal electrode responsive to data to be displayed by the picture elements on the scanning electrodes to which the selective voltage (VCA) is applied;
   the scanning electrode driving circuit (21) dividing the scanning electrodes (L) constituting the liquid crystal display device (20) into a plurality of scanning electrode groups, and sequentially applying the selective voltage (VCA) to the scanning electrodes constituting the scanning electrode group over the two group fields; and
   the signal electrode driving circuit (12) in a first group field, applying the signal voltage (VSC,VSE) to the signal electrodes responsive to whether the picture elements on the selected scanning electrode are changed from the bright display state to the dark display state, on the bright and dark display state are not changed, and in a second group field, applying the signal voltage (VSD,VSE) to the signal electrodes responsive to whether the picture elements of the selected scanning electrode are changed from the dark display state to the bright display state, or the bright and dark display states are not changed, and uniting the two groups together, bringing the picture elements on the scanning electrodes to respond to change to the dark display state from the bright display state, or change to the bright display state from the dark display state, or not to change the bright and dark display states.

3. A driving apparatus for liquid crystal display device in accordance with claim 2, further comprising;
   a display memory (26) for storing one picture screen of data to be displayed next;
   a discrimination memory (27) for storing whether or not data in the display memory (26) has changed for every scanning electrode group in the lump; and
   a holding memory (28) for storing one picture screen of the state of picture elements displayed, at present, on the liquid crystal display device, wherein
   when storing data to be displayed on the display memory (26) in advance, whether or not the data in the display memory (26) has changed is stored simultaneously in the discriminating memory (27) for every scanning electrode group in the lump, and when rewriting the display screen, in response to the discriminating memory (27), the scanning electrode group including the picture elements whose data to be displayed has changed is checked, and the selective voltage (VCA) is applied to the scanning electrodes constituting the scanning electrode group including the picture elements whose data to be displayed is changed.

4. A method for driving a display device having a plurality of scanning electrodes, and a plurality of signal elements arranged so that a plurality of picture elements are formed at intersections therebetween, comprising the steps:
   sequentially applying a selection voltage (VCA) to a group of the scanning electrodes (S) over two group fields;
   applying a signal voltage (VSC) for changing the state of picture elements in the selected scanning electrodes from bright to dark display or a signal voltage (VSE) for not changing the state of the picture elements in the display, during a first group field; and
   applying a signal voltage (VSD) for changing the state of picture elements in the selected scanning electrodes from dark to bright display or the signal voltage (VSE) for not changing the state of the picture elements in the display, during a second group field.

Drawing