(57) A ferroelectric memory device includes a preamplifier that couples a bit line to
a sense amplifier. The preamplifier both provides additional bit line capacitance
needed to enable full switching of the ferroelectric capacitor in a selected memory
cell, and data signal amplification needed to obtain a reliable data signals from
the memory cells after the memory device has aged and the ferroelectric capacitors
in the memory cells are generating relatively small voltage signals. More specifically,
the preamplifier of the present invention is a set of capacitors which can be switched
between two configurations. In the first configuration, used while strobing a selected
memory cell, the capacitors are all connected in parallel to the bit line, thereby
providing the bit line capacitance needed to enable full switching of the ferroelectric
capacitor in the selected memory cell. In the second configuration, used after the
memory cell has been strobed, the capacitors in the preamplifier are disconnected
from the bit line, and connected in series so as to multiply the voltage developed
on the capacitors while the memory cell was strobed. The resulting multiplied or amplified
voltage signal is then processed by a sense amplifier.
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