Flexible single chip digital processor architecture

(19)

(11)

EP 0 498 595 A3

(12)	EUROPEAN PATENT APPLICATION

(88)	Date of publication A3:
	24.02.1993 Bulletin 1993/08

(43)	Date of publication A2:
	12.08.1992 Bulletin 1992/33

(21)	Application number: 92300892.4

(22)	Date of filing: 03.02.1992

(51)	International Patent Classification (IPC)⁵: G06F 9/38, G06F 7/48

(84)	Designated Contracting States:
	DE FR GB IT

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Priority:

05.02.1991 US 651067

(71)	Applicant: AT&T Corp.
	New York, NY 10013-2412 (US)

(72)	Inventors:
	Greenberger, Alan Joel Allentown, Pennsylvania 18104 (US) Rigge, Lawrence Allen Emmaus, Pennsylvania 18049 (US) Thierbach, Mark Ernest Allentown, Pennsylvania 18104 (US)

(74)	Representative: Watts, Christopher Malcolm Kelway, Dr. et al
	AT&T (UK) LTD. AT&T Intellectual Property Division 5 Mornington Road Woodford Green Essex IG8 OTU Woodford Green Essex IG8 OTU (GB)

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References cited: :

(54)	Flexible single chip digital processor architecture

(57) An application-specific single chip digital processor having flexible design expansion capability with minimal impact on the performance of a processor core. The processor core has an ALU and a register file (accumulators). The output of the ALU is connected to a multiplexer whose output is connected to the input of the register file. The output of the register file connects to one input of the ALU. A function unit, separate from the core, has an input connected to the output of the register file and an output connected to another input to the multiplexer. The core operates with a predefined instruction set. The function unit, which may be redesigned depending on the application, operates with a reserved (uncommitted) instruction set under control of the core.

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