[0001] This invention relates to a coil arrangement, as well as to a static measuring device
employing such an arrangement.
[0002] Most conventional coin validators rely on dynamic measurement of coins for assessing
the validity thereof. Usually, an array of coils is spaced along a passage through
which the coin passes, for measuring one or more of the properties thereof. The extended
coil arrangement, as well as the physical dimension of the coils, generally make for
a coin validator which is relatively bulky. In addition, dynamic coin validators are
prone to coin bounce, arising from burrs and bumps in the coins, as well as from dirt
accumulating on the runway.
[0003] According to the invention there is provided an inductive coil arrangement for measuring
at least one physical characteristic of an object, the coil arrangement comprising
at least one inductor formed out of at lest two superposed planar spiral tracks separated
by an insulating layer of a multilayer electrical device and having a conductive path
extending between the tracks.
[0004] Preferably, the inductive coil arrangement comprises a plurality of superposed inductors,
each inductor being arranged to measure different physical characteristics of an object.
[0005] Each spiral track is is conveniently etched from a conductive layer on one face of
an insulating substrate wafer, and each inductor preferably comprises a plurality
of alternating insulating substrate wafers and the spiral tracks laminated together.
[0006] The conductive path between the tracks may extend through the insulating layer from
a centre terminal of one track to the centre terminal of the superposed track.
[0007] The conductive path may also extend through the insulating layer from an outer peripheral
terminal of one spiral track to an outer peripheral terminal of the superposed spiral
track.
[0008] In one from of the invention, the inductive coil arrangement comprises first, second
and third superposed inductors forming part of a token validation apparatus, the first
inductor being arranged to measure the core resistivity of a tocken, the second inductor
being arranged to measure the surface resistivity of the token, and the third inductor
being arranged to measure the size of the token.
[0009] The invention extends to a method of manufacturing an inductive coil arrangement
comprising the steps of:
a) providing a plurality of planar insulating substrate wafers, each wafer carrying
a conductive layer on one side thereof;
b) printing a spiral pattern onto the conductive layer of each wafer with an etchant-resistive
material;
c) etching the unprinted portion of the conductive layer away so as to form spiral
tracks on each substrate;
d) aligning the wafers and laminating them together in the correct order so as to
form a multi-layer device, and
e) forming conductive paths between at least two of the superposed spiral tracks so
as to provide at least one multi-layer inductor.
[0010] Preferably, the step of forming the conductive paths includes the steps of providing
conductive terminals at the ends of each spiral track, aligning the conductive terminals,
forming holes through successive conductive terminals, and filling the holes a conductive
material.
[0011] According to a further aspect of the invention, there is provided a token validation
device for statically measuring one or more physical characteristics of a token comprising
a coil arrangement having at least two superposed planar spiral tracks which are separated
by an insulating layer of a multi-layer electrical device, a signal generator for
generating a signal having a predetermined magnitude and frequency for receipt by
the inductor, and signal processing means for receiving from the inductor a signal
representative of the physical characteristics of the token.
[0012] Preferably, the token validation device includes comparator means for comparing the
signal processed by the signal processing means with a reference signal, for assessing
the validity of the token being measured.
[0013] Conveniently, the token validation device includes at least two superposed inductors,
and sequential switching means for selectively energising the inductors one at a time,
for static measurement of at least two physical characteristics of the token.
[0014] The token validation device preferably comprises three superposed inductors arranged
to measure sequentially the respective core resistivity, the surface resistivity and
the size of the token.
[0015] The invention includes a token validation device which is fitted with a coil arrangement
of the type described above.
[0016] A preferred embodiment of the present invention will now be described with reference
to the accompanying drawings:
Figure 1 shows a schematic circuit diagram of a coin validator circuit
Figures 2A to 2D show the respective overlying spiral track layouts of a multi-layer
printed circuit board which together constitute a single inductor;
Figures 3 and 4 show a further two overlying spiral track layouts of the printed circuit
board making up a further inductor; and
Figure 5 shows an exploded perspective view of a plurality of printed circuit boards
which make up an inductive coil arrangement
[0017] Referring now to Figure 1, a coin validator circuit 10 has first, second and third
respective measuring inductors, or coils 12, 14 and 16 having respective inductances
of 15wH, 5f..lH and 85wH. The inductors 12,14 and 16 together constitute an inductive
coil arrangement 18 formed on a series of multi-layer printed circuit boards, details
of which will be described further on in the specification.
[0018] The first, second and third inductors 12, 14 and 16 form part of respective LC oscillators
20, 22 and 24. The oscillator 20, which includes the first coil 12 and an appropriately
sized separate capacitor 20A, operates at a resonant frequency of approximately 100kHz,
and energises the first coil at this frequency in order to measure the core resistivity
of a coin 26 which is held in a stationary position adjacent the inductive coil arrangement
18 by means of a coin validator mechanism. The second LC oscillator 22, which includes
a capacitor 22A, energises the second coil 14 at a frequency of approximately 1 MHz
in order to measure the resistivity of the coin plating. The third oscillator 24,
which has an associated capacitor 24A, energises the third coil 16 at a frequency
of approximately 1,1 MHz for measuring the size of the coin 26. Operation of the coin
validator circuit 10 is controlled by means of central signal processing and interface
unit 28. A RAM or EEPROM memory module 30 is linked to the central processing unit
28, and stored within it is data relating to the physical characteristics of various
standard coin types and configurations.
[0019] Once the coin 26 has been brought to a halt adjacent the coil arrangement 18, the
three LC oscillators 20,22 and 24 are activated sequentially for coin data measurements.
The first oscillator 20 is activated first, and energises the first coil 14. The core
resistivity of the coin 26 causes the peak-to-peak signal level from the first oscillator
to drop. The attenuated signal from the coil 12 is rectified and smoothed by means
of a rectifier 32, and is subsequently digitised by means of an A/D converter 34 for
reception at the CPU 28.
[0020] After the first oscillator 20 has been disabled, the second oscillator 22 is enabled
to measure the coin plating resistivity. The second coil 14 is energised, and the
resulting signal is smoothed and rectified by the rectifier 32, is digitised at the
A/D converter 34, and is subsequently received by the CPU 28. The second oscillator
is turned off and the third oscillator 24 then energises the coil 16 for measuring
the size of the coin 26 on the basis of the coin 26 causing a change of inductance
in the coil 16, thereby altering the frequency of the oscillator 24. The return frequency
is measured by means of a counter 36 which is enabled for a predetermined period.
The CPU in turn reads a digital value from the counter 36.
[0021] Once they have been received and stored at the CPU 28, the three digital values are
compared with corresponding digital values representative of valid coin types, which
have been stored in the RAM or EEPROM memory module 30. If the stored and measured
values correspond, this indicates that the coin 26 is valid and a signal from the
CPU energises a mechanical gate or other steering means for accepting the coin 26.
On the other hand, if the various values do not coincide, then a rejection signal
is transmitted to the coin validation apparatus, causing the coin 26 to be rejected.
The entire token validation measuring process takes approximately 150ms.
[0022] Referring now to Figures 2A to 2D, the first inductor 12 is formed from four superposed
printed circuit boards 72 to 78, comprising respective insulating substrate wafers
72A to 78A carrying respective spiral tracks 38, 46, 52 and 58 which are etched from
conductive copper carried on the upper surfaces of the substrate wafers 72A to 78A.
[0023] The top spiral track 38 of the first inductor 12 has an output which is linked to
an output terminal 40. The top spiral track 38 spirals inwardly to a centre terminal
42 from where it is plated through to a centre terminal 44 provided in the following
spiral track 46 on the wafer 74A. The spiral track 46 whorls outwardly in a clockwise
direction, and terminates at an outer peripheral terminal 48 which is plated through
to a corresponding terminal 50 in the following spiral track 52. The spiral track
52 whorls inwardly to a centre point 54, from where it in turn passes to a corresponding
centre point in the next spiral track 58, which spirals outwardly and terminates at
an output terminal 60. By etching the various spiral tracks out of the alternating
conductive layers of a series of printed circuit boards, and by subsequently superposing
the printed circuit boards, a single extremely compact inductive coil arrangement
may be provided, having a number of measuring inductors with a relatively high inductance.
[0024] The second inductor 14 in the inductive coil arrangement is illustrated schematically
in Figure 5, and comprises a pair of overlapping spiral tracks 61 and 61A carried
on respective substrate wafers 80A and 82A. The next two printed circuit boards 84
and 86 form the third coil 16, which comprises two spiral tracks, which are illustrated
in respective Figures 3 and 4. The spiral track 62 illustrated in Figure 3 has an
input terminal 64 which spirals inwardly towards a centre terminal 66. The centre
terminal 66 is plated through to a corresponding centre terminal 68 in the spiral
track 70.
[0025] Turning now to Figure 5, an exploded perspective view illustrating the manner in
which the coil arrangement is assembled is shown. Eight separate printed circuit boards
72 to 86 are provided for forming the three aforementioned inductors 12, 14 and 16.
Each printed circuit board 72 to 86 has a respective insulating substrate wafer 72A
to 86A with a conductive copper cladding on its upper face. Each of the eight spiral
tracks are printed onto the copper cladding using an etchant resistant material, and
the unprinted areas are removed by a photosensitive or other etchant.
[0026] The eight suitably prepared printed circuit boards 72 to 86 are then arranged in
the correct sequence, together with an uncladded insulating end wafer 88, are aligned,
and are laminated or bonded together to form a multi-layer device. Holes, such as
those illustrated at 90 in Figure 2D, are then drilled through the multi-layer device
at the various terminals, and a conductive solder is injected through the holes so
as to provide the appropriate conductive paths, such as the paths extending between
the centre terminals 42 and 44, between the outer peripheral terminals 48 and 50 and
between the centre terminals and 54 and 56. The end wafer 88 ensures that the spiral
tracks remain unaffected while through-plating is taking place. The internal connections
between the spiral tracks are illustrated schematically at 92 in Figure 5. Blind or
buried vias may be used in place of holes and solder in order to effect connections
between adjacent spiral tracks.
[0027] The inductive coil arrangement 18 may take a variety of forms. Several single-layer
inductors may be etched out of successive conductive layers of a multi-layer printed
circuit board. Alternatively, a single coil may comprise three or more overlapping
spiral tracks of three or more single printed circuit boards which have been sandwiched
together. In the specific embodiment described above, the eight double layered printed
circuit boards 72 to 86 may be replaced by four triple layered pcb's having conductive
layers on opposite faces of the wafer substrate. Spiral tracks are etched onto the
conductive layers, and the four pcb's are then sandwiched between five insulating
wafers. Any other multi-layer electrical device, in which conductive and insulating
layers alternate, may be utilised.
1. An inductive coil arrangement (18) for measuring at least one physical characteristic
of an object (26), characterised in that the coil arrangement (18) comprises at least
one inductor (12,14,16) formed out of at least two superposed planar spiral tracks
(38, 46, 52, 58, 61, 61 A, 62, 70) separated by an insulating layer (72A, 74A, 76A,
78A, 80A, 82A, 84A, 86A) of a multi-layer electrical device (72, 74, 76, 78, 80, 82,
84, 86) and having a conductive path (92) extending between the tracks.
2. An inductive coil arrangement as claimed in claim 1 characterised in that it comprises
a plurality of superposed inductors (12,14,16), each inductor being arranged to measure
different physical characteristics of an object (26).
3. An inductive coil arrangement as claimed in either one of the preceding claims
characterised in that each spiral track (38, 46, 52, 58, 61, 64, 62, 70) is etched
from a conductive layer on one face of an insulating substrate wafer (72A, 74A, 76A,
78A, 80A, 82A, 84A, 86A), and each inductor (12,14,16) comprises a plurality of alternating
insulating substrate wafers and spiral tracks laminated together.
4. An inductive coil arrangement as claimed in any one of the preceding claims characterised
in that the conductive path (92) between the tracks extends through the insulating
layer from a centre terminal (42,54) of one spiral track (38,52) to a centre terminal
(44,56) of the superposed spiral track (46,58).
5. An inductive coil arrangement as claimed in any one of claims 1 to 3 characterised
in that he conductive path extends through the insulating layer (76A) from an outer
peripheral terminal (50) of one spiral track (52) to an outer peripheral terminal
(48) of the superposed spiral track (46).
6. An inductive coil arrangement as claimed in any one of the preceding claims characterised
in that it comprises first, second and third superposed inductors (12,14,16) forming
part of a token validation apparatus (10), the first inductor (12) being arranged
to measure the core resistivity of a token (26), the second inductor (14) being arranged
to measure the surface resistivity of the token, and the third inductor (16) being
arranged to measure the size of the token.
7. A method of manufacturing an inductive coil arrangement (18) comprises the steps
of:
a) providing a plurality of planar insulating substrate wafers (72A, 74A, 76A, 78A,
80A, 82A, 84A, 86A), each wafer carrying a conductive layer on one side thereof;
b) printing a spiral pattern onto the conductive layer of each wafer with an etchant-resistive
material;
c) etching the unprinted portion of the conductive layer away so as to form spiral
tracks (38, 46, 52, 58, 61, 61 A, 62, 70) on each substrate;
d) aligning the wafers and laminating them together in the correct order so as to
form a multi-layer device (18), and
e) forming conductive paths (92) between at least two of the superposed spiral tracks
so as to provide at least one multi-layer inductor (12,14,16).
8. A method of manufacturing an inductive coil arrangement as claimed in claim 7 characterised
in that the step of forming the conductive paths includes the steps of providing conductive
terminals (40, 42, 44, 48, 50, 54, 56, 64, 66, 68) at the ends of each spiral track,
aligning the conductive terminals, forming holes (90) through successive conductive
terminals, and filling the holes with a conductive material.
9. A token validation device for statically measuring one or more physical characteristics
of a token, characterised in that it comprises a coil arrangement (18) having at least
one inductor (12,14,16) formed from at least two superposed planar spiral tracks (38,
46, 52, 58, 61, 61A, 62, 70) which are separated by an insulating layer (72A, 74A,
76A, 78A, 80A, 82A, 84A, 86A) of a multi-layer electrical device (72, 74, 76, 78,
80, 82, 84, 86), a signal generator (20,22,24) for generating a signal having a predetermined
magnitude and frequency for receipt by the inductor, and signal processing means (28,32,34,36)
for receiving from the inductor a signal representative of the physical characteristics
of the token.
10. A token validation device as claimed in claim 9 characterised in that it includes
comparator means (28,30) for comparing the signal processed by the signal processing
means with a reference signal, for assessing the validity of the token being measured.
11. A token validation device as claimed in either one of claims 10 or 11 characterised
in that it includes at least two superposed inductors (12,14,16), and sequential switching
means (28) for selectively energising the inductors one at a time, for static measurement
of at least two physical characteristics of the token.
12. A token validation device as claimed in claim 11 characterised in that it includes
three superposed inductors (12,14,16) arranged to measure sequentially the respective
core resistivity, the surface resistivity and the size of the token.
13. A token validation device as claimed in any one of claims 9 to 12 characterised
in that in includes an inductive coil arrangement (18) as claimed in any one of claims
1 to 5.