(57) A full adder comprises an exclusive-OR circuit and an exclusive-NOR circuit which
receives a first one-bit input data and a second one-bit input data for generating
an exclusive-OR signal and an exclusive-NOR signal, respectively. A first switching
circuit receives the exclusive-OR signal, the exclusive-NOR signal and a one-bit carry-in
data for outputting, as a one-bit sum data, the one-bit carry-in data when the first
and second one-bit input data are equal to each other, and a NOT signal of the one-bit
carry-in data when the first and second one-bit input data are different from each
other. A second switching circuit receives the exclusive-OR signal, the exclusive-NOR
signal, the one-bit carry-in data and the first one-bit input data for outputting,
as the one-bit carry-out data, the first one-bit input data when the first and second
one-bit input data are equal to each other, and the one-bit carry-in data when the
first and second one-bit input data are different from each other.
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