Background of the Invention:
[0001] The present invention relates to a semiconductor chip carrier for use in supporting
a semiconductor chip, and to a semiconductor device and an apparatus which includes
the semiconductor chip carrier and the semiconductor device, respectively.
[0002] A semiconductor chip carrier has been used in the field of semiconductor assembly
technique. In such a field, a chip carrier of plastic LCC (Leadless Chip Carrier)
type has recently attracted considerable attention as a chip carrier which is applicable
to a high density assembly in a circuit board, because it makes it possible to become
as thin as substantially 1mm.
[0003] A conventional LCC type chip carrier, as will later be described in detail, comprises
an insulating substrate which has a rectangular shape having four corners and which
has a central surface and a peripheral surface surrounding the central surface, and
a plurality of electrode leads deposited on the peripheral surface. On such a chip
carrier, a semiconductor chip is mounted on the central surface of the insulating
substrate to form a semiconductor device. After completion of the semiconductor device,
the insulating substrate is further mounted on a circuit board which has a plurality
of board electrodes on a board surface. The board electrodes are electrically connected
to the electrode leads on the chip carrier by the use of solder. Thus, the chip carrier
is mounted on the circuit board.
[0004] In the meantime, necessity of the aforesaid high density assembly requires to make
each electrode lead fine. Consequently, each electrode lead should be connected to
each board electrode through a very small contact area. As a result, strength of connection
between the solder and each electrode lead becomes weak with a decrease of the area
between the solder and each electrode lead. For example, provided that the strength
of connection by the solder is 500g/mm², the strength of 60g per one electrode lead
is acquired when the area of contact of the solder per one electrode lead is as small
as 0.12mm² (0.3 x 0.4 mm²). If the number of electrode leads is between 50 and 80,
the strength of connecting the package to the circuit board, as a whole, merely falls
within a range between 3kg and 5kg. Thus, the strength of the whole connection is
not so small.
[0005] However, a stress sometimes acts on the circuit board during or after an assembly
process. The circuit board is sometimes twisted or warped as a result of the stress.
Since the stress is concentrated on each electrode lead positioned at each of the
four corners of the rectangular insulating substrate of the chip carrier, the electrode
leads positioned thereat often come off the board electrodes by such a twist or warp
of the circuit board. Thus, it often happens that the electrode leads are peeled off
from the board electrodes at the four corners of the insulating substrate. Specifically,
when the chip carrier is mounted on the circuit board which is known as a thin-type
circuit board for a high density assembly and which has a thickness thinner than 0.6mm,
such a circuit board is apt to be easily twisted or warped during or after the assembly
process. Therefore, the problem that the electrode leads come off the board electrodes
is very serious in such a thin-type circuit board.
Summary of Invention
[0006] It is an object of this invention to provide a semiconductor chip carrier which is
strongly connected to a circuit board.
[0007] It is another object of this invention to provide a semiconductor chip carrier of
which electrode leads are firmly connected to board electrodes to prevent the electrode
leads and the board electrodes from being peeled off.
[0008] According to this invention, an improved semiconductor chip carrier which is for
use in supporting a semiconductor chip is provided.
[0009] In one aspect the invention provides a chip carrier for use in supporting a semiconductor
chip; said chip carrier comprising:
an insulating substrate which has a central portion having a primary surface and
a peripheral portion having a secondary surface surrounding said primary surface;
electrode leads disposed at positions distributed around the edges of the substrate,
the shape of the substrate being such that some of the electrode leads are at positions
at which, in the event of distortion of the substrate, greater stresses are imposed
on those electrode leads than on the remainder thereof, characterised in that the
electrode leads at said positions are wider than the remaining electrode leads.
[0010] The substrate may be polygonal, the wider electrode leads may include those at positions
nearest corners of the substrate.
[0011] In a further aspect the invention comprises an insulating substrate which has a substantially
rectangular shape having four corners and which has a central portion having a primary
surface and a peripheral portion having a secondary surface surrounding the primary
surface, and electrode leads deposited on the secondary surface, and electrode leads
deposited on the secondary surface; wherein the electrode leads comprises: first electrode
leads positioned remote from the four corners and each of which has a first predetermined
width; and second electrode leads each of which is adjacent to each of the corners
in comparison with the first electrode leads and each of which has a second width
wider than the first width.
[0012] The second electrode leads may be equal in number to four; each second electrode
lead being located on each four corner.
[0013] The second electrode leads may also be equal in number to eight; the eight second
electrode leads being located on both sides of each of the four corners with each
corner interposed therebetween.
[0014] In a yet further aspect, the invention provides a semiconductor device comprising
a chip corner as set forth above, a semiconductor chip which is mounted on the primary
surface of the corner and which has a selected one of an IC circuit, an LSI circuit
and a VLSI circuit; and a plurality of chip electrodes; and
connection means for connecting said chip electrodes to the electrode leads of
the carrier.
[0015] The invention also provides a semiconductor apparatus comprising:
a circuit board which has a board surface and a plurality of board electrodes;
a semiconductor device as set forth above, and further connection means for connecting
said board electrodes to the electrode leads of the chip carrier.
Brief Description of the Drawing:
[0016]
Fig. 1(A) is a plan view for use in describing a conventional semiconductor chip carrier;
Fig. 1(B) is a sectional view for use in describing the semiconductor chip carrier
illustrated in Fig. 1(A);
Fig. 2(A) is a plan view for use in describing the semiconductor chip carrier illustrated
in Fig. 1(A), which is mounted on a circuit board;
Fig. 2(B) is a sectional view for use in describing the semiconductor chip carrier
illustrated in Fig. 2(A);
Fig. 3(A) is a plan view for use in describing a semiconductor chip carrier according
to a first embodiment of this invention, which is mounted on a circuit board;
Fig. 3(B) is a sectional view for use in describing the semiconductor chip carrier
illustrated in Fig. 3(A); and
Fig. 4 is a plan view for use in describing a semiconductor chip carrier according
to a second embodiment of this invention.
Description of the Preferred Embodiment:
[0017] Referring to Figs. 1(A) and (B), a conventional semiconductor chip carrier will first
be described for a better understanding of this invention.
[0018] In Figs. 1(A) and 1(B), illustration is made about a semiconductor chip carrier 1
which is a plastic LCC type one. The semiconductor chip carrier 1 comprises an insulating
substrate 2 which is made of a glass epoxy resin plate. In Fig. 1(A), a predetermined
direction may be defined from the lefthand side of Fig. 1 to the righthand side thereof
on the insulating substrate 2 for brevity of description. Taking this into account,
the insulating substrate 2 also has two sides 3, 3 which are parallel to the predetermined
direction and the other two sides 4, 4 which are orthogonal to the predetermined direction.
Formed by the sides 3, 3 and 4, 4, the insulating substrate 2 has a substantially
rectangular shape which has four corners 2a, 2b, 2c, and 2d. The insulating substrate
2 also has a central portion 5 having a primary surface 5a and a peripheral portion
6 having a secondary surface 6a which surrounds the primary surface 5a. The primary
surface 5a is offset from the secondary surface 6a to form a recess 7 in which a semiconductor
chip is mounted. The peripheral portion 6 has a plurality of grooves 8 which are aligned
at equal spaces in each side surface of the peripheral portion 6. On the secondary
surface 6a of the peripheral portion 6, a plurality of electrode leads 9 are deposited
such that each electrode lead 9 is perpendicular to each side of the insulating substrate
2 and that each electrode lead 9 is extended into each groove 8. Each of the electrode
leads 9 has a predetermined or uniform width such as 0.3mm.
[0019] Now, referring to Figs. 2(A) and (B), description will be made as to an assembly
process of a semiconductor apparatus, namely, a method of mounting a semiconductor
chip to a circuit board through the chip carrier 1 illustrated in Fig. 1.
[0020] At first, description is made about a method of mounting a semiconductor chip 10
onto the chip carrier 1 to form a semiconductor device 11. The semiconductor chip
10 may have a circuit (not shown), such as selected one of an IC circuit, an LSI circuit,
and a VLSI circuit and a plurality of chip electrodes 12 electrically connected to
the circuit. As illustrated in Figs. 2(A) and (B), the semiconductor chip 10 is mounted
on the primary surface 5a formed by the recess 7. The chip electrodes 12 are then
connected to the electrode leads 9 through first connection elements, such as bonding
wires 13, 13. After these connections, a resin frame 14 rests on the portions of the
electrode leads 9 which are positioned on the secondary surface 6a of the peripheral
portion 6 through a layer 15 which protects the electrode leads 9 from the resin frame
14. The area surrounded by the resin frame 14 is then filled with resin 16 to cover
the semiconductor chip 10 with the resin 16 airtightly. Thus, the semiconductor device
11 is manufactured by a combination of the chip carrier 1 and the semiconductor chip
10.
[0021] Second, description is made about a method of mounting the semiconductor device 11
onto a circuit board 17 to form a semiconductor apparatus 18, as illustrated in Figs.
2(A) and (B). The circuit board 17 has a thickness which is not more than 0.6mm, a
board surface 19, and a plurality of board electrodes 20 deposited on the board surface
19. Solder paste regions, as second connection elements, are printed on the board
electrodes 20. The chip carrier 1 is then mounted on the circuit board 17 with the
electrode leads 9 electrically connected to the corresponding board electrodes 20.
In this event, the electrode leads 9 are also connected to the board electrodes 20
through solder masses 21 which serves as second connection elements by a solder reflow
method. Thus, the semiconductor apparatus 18 is formed by a combination of the semiconductor
device 11 and the circuit board 17.
[0022] However, when a stress acts on the circuit board 17 during or after the assembly
process of the semiconductor apparatus 18, the circuit board 17 is easily twisted
or warped as a result of the stress. Since the stress is concentrated on each electrode
lead 9 positioned at each of the four corners 2a, 2b, 2c, and 2d, the electrode leads
9 positioned thereat often come off the board electrodes 20 by such a twist or warp
of the circuit board 17, as mentioned in the preamble of the instant specification.
[0023] Referring to Figs. 3(A) and (B), description will at first proceed to a semiconductor
chip carrier according to a first embodiment of this invention. The illustrated semiconductor
chip carrier comprises some parts which are similar to those of the above-described
conventional semiconductor chip carrier and which are represented by the common reference
numerals.
[0024] Like in Figs. 1(A) and (B), the semiconductor chip carrier 31 illustrated in Figs.
3(A) and (B) also comprises the insulating substrate 2. On the secondary surface 6a
of the peripheral portion 6 of the insulating substrate 2, a plurality of electrode
leads 32 are deposited such that each electrode lead 32 is perpendicular to each side
of the insulating substrate 2 and that each electrode lead 32 is extended into each
groove 8.
[0025] The electrode leads 32 comprises first electrode leads 32A positioned remote from
the four corners 2a, 2b, 2c, and 2d and second electrode leads 32B each of which is
adjacent to each of the corners 2a, 2b, 2c, and 2d. The second electrode leads 32B
are equal in number to four and are located at the four corners 2a, 2b, 2c, and 2d,
respectively. Herein, each of the first electrode leads 32A has a first predetermined
or uniform width. On the other hand, each of the second electrode leads 32B has a
second width wider than the first predetermined or uniform width. Specifically, the
second width is approximately 0.6mm while the first width is approximately 0.3mm,
in the illustrated example. Besides, each of the first electrode leads and the second
electrode leads has a predetermined length of about 0.4mm.
[0026] Now, description will be made as to a process of assembling a semiconductor apparatus,
namely, a method of mounting the semiconductor chip 10 to the circuit board 17 with
the chip carrier 31 illustrated in Figs. 3(A) and (B).
[0027] Like the conventional semiconductor chip carrier 1 illustrated in Figs. 2(A) and
(B), the semiconductor chip 10 is, at first, mounted to the chip carrier 31 to form
a semiconductor device 33. After the chip electrodes 12 are connected to the electrode
leads 32 through bonding wires 13, 13, a resin frame 14 rests on the portions of the
electrode leads 32 which are positioned on the secondary surface 6a through the layer
15. The area surrounded by the resin frame 14 is then filled with the resin 16 to
cover the semiconductor chip 10 with the resin 16 airtightly. Thus, the semiconductor
device 33 is manufactured by a combination of the chip carrier 31 and the semiconductor
chip 10.
[0028] Second, the semiconductor device 33 is mounted onto the circuit board 17 to form
a semiconductor apparatus 34. After the solder paste regions are printed on the board
electrodes 20, the chip carrier 31 is mounted on the circuit board 17 with the electrode
leads 32 electrically connected to the corresponding board electrodes 20. In this
event, the electrode leads 32 are also connected to the board electrodes 20 through
the solder masses 21 by the solder reflow method. Thus, the semiconductor apparatus
34 is formed by a combination of the semiconductor device 33 and the circuit board
17.
[0029] When a stress acts on the circuit board 17 during or after the assembly process of
the semiconductor apparatus 34, the circuit board 17 is easily twisted or warped as
a result of the stress. In such a case, the stress is concentrated on each electrode
lead 32 positioned at each of the four corners 2a, 2b, 2c, and 2d. However, each electrode
lead 32B positioned thereat has the second width of approximately 0.6mm equal to twice
the first width. Accordingly, the area of contact of the solder 21 per one electrode
lead 32B is as wide as 0.24mm² (0.6 x 0.4 mm²) while the area of contact of the solder
21 per one electrode lead 32A is as narrow as 0.12 mm² (0.3 x 0.4 mm²). Each electrode
lead 32B is therefore strongly connected to the corresponding board electrode 20.
As a result, not only the electrode lead 32B but also the electrode leads 32A adjacent
to the electrode lead 32B seldom come off the board electrodes 20 by such a twist
or warp of the circuit board 17. Consequently, strength of mechanical connection between
the electrode leads 32 and the board electrodes 20 can be extremely improved in the
illustrated example.
[0030] Referring to Fig. 4, a semiconductor chip carrier according to a second embodiment
of this invention is similar in structure to that illustrated in Figs. 3(A) and (B)
except that the second electrode leads 32B are equal in number to eight. In this connection,
a pair of the second electrode leads 32B is located on both sides of each of the four
corners 2a, 2b, 2c, and 2d. As a result, each of the corners 2a, 2b, 2c, and 2d is
interposed between each pair of the second electrode leads 32B.
[0031] With this embodiment, the electrode lead 32B of each pair has the second width of
approximately 0.6mm. Each pair of the electrode leads 32B is therefore strongly connected
to the corresponding board electrode 20 (shown in Figs. 3(A) and (B)). As a result,
strength of connection between the electrode leads 32 and the board electrodes 20
becomes stronger than that in the aforesaid first embodiment of this invention.
[0032] While this invention has thus far been described in conjunction with only two embodiments
thereof, it will readily be possible for those skilled in the art to put this invention
into practice in various other manners. For example, the insulating substrate 2 may
be made of a multilayer ceramic plate which is formed by a plurality of ceramic layers.
On the other hand, the primary surface 5a may be flush with the secondary surface
6a. Moreover, number of the second electrode leads may not be restricted to four and
eight.
1. A chip carrier for use in supporting a semiconductor chip; said chip carrier comprising:
an insulating substrate which has a central portion having a primary surface and
a peripheral portion having a secondary surface surrounding said primary surface;
electrode leads disposed at positions distributed around the edges of the substrate,
the shape of the substrate being such that some of the electrode leads are at positions
at which, in the event of distortion of the substrate, greater stresses are imposed
on those electrode leads than on the remainder thereof, characterised in that the
electrode leads at said positions are wider than the remaining electrode leads.
2. A chip carrier as claimed in Claim 1 wherein the substrate is polygonal and the wider
electrode leads include those at positions nearest the corners of the substrate.
3. A chip carrier for use in supporting a semiconductor chip; said chip carrier comprising:
an insulating substrate which has a substantially rectangular shape having four
corners and which has a central portion having a primary surface and a peripheral
portion having a secondary surface surrounding said primary surface;
first electrode leads deposited on said secondary surface at positions remote from
said four corners and each of which has a first predetermined width; and
second electrode leads each of which is adjacent to each of said corners in comparison
with said first electrode leads and each of which has a second width wider than said
first width.
4. A chip carrier as claimed in Claim 3 wherein said second width is approximately 0.6mm,
while said first width is approximately 0.3mm.
5. A chip carrier as claimed in Claim 3 or 4 wherein said second electrode leads are
equal in number to four; each second electrode lead being located at a said corner.
6. A chip carrier as claimed in any of Claims 3 to 5 wherein said second electrode leads
are located on both sides of each of said four corners with each corner interposed
therebetween.
7. A chip carrier as claimed in Claim 6 wherein said second electrode leads are equal
in number to eight.
8. A chip carrier as claimed in any preceding claim wherein said insulating substrate
is made of a glass epoxy resin plate.
9. A chip carrier as claimed in any preceding claim, wherein said insulating substrate
is made of a multilayer ceramic plate formed by a plurality of ceramic layers.
10. A chip carrier as claimed in any preceding claim wherein said primary surface is offset
from said secondary surface.
11. A chip carrier as claimed in any preceding claim wherein said primary surface is flush
with said secondary surface.
12. A chip carrier as claimed in any preceding claim wherein each of said electrode leads
has a predetermined length, said length being approximately 0.4mm.
13. A semiconductor device comprising a chip carrier as claimed in any preceding claim
a semiconductor chip which is mounted on the primary surface of the carrier and
which has a selected one of an IC circuit, an LSI circuit and a VLSI circuit; and
a plurality of chip electrodes; and
connection means for connecting said chip electrodes to the electrode leads of
the carrier.
14. A semiconductor apparatus comprising:
a circuit board which has a board surface and a plurality of board electrodes;
a semiconductor device as claimed in Claim 13, and further connection means for
connecting said board electrodes to the electrode leads of the chip carrier.
15. A semiconductor apparatus as claimed in Claim 14, wherein said circuit board has a
thickness which is not more than 0.6mm.