Method for producing electrically erasable and programmable read-only memory cells with a single polysilicon level

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EP 0 545 074 A3

(12)	EUROPEAN PATENT APPLICATION

(88)	Date of publication A3:
	18.08.1993 Bulletin 1993/33

(43)	Date of publication A2:
	09.06.1993 Bulletin 1993/23

(21)	Application number: 92118573.2

(22)	Date of filing: 30.10.1992

(51)	International Patent Classification (IPC)⁵: H01L 21/82

(84)	Designated Contracting States:
	DE FR GB

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Priority:

29.11.1991 IT MI913196

(71)	Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.
	I-20041 Agrate Brianza (Milano) (IT)

(72)	Inventors:
	Ghezzi, Paolo I-26027 Rivolta d'Adda (Cremona) (IT) Pio, Federico I-20147 Milano (IT) Riva, Carlo I-20052 Monza (Milano) (IT)

(74)	Representative: Forattini, Amelia et al
	c/o Internazionale Brevetti Ingg. ZINI, MARANESI & C. S.r.l. Piazza Castello 1 I-20121 Milano I-20121 Milano (IT)

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References cited: :

(54)	Method for producing electrically erasable and programmable read-only memory cells with a single polysilicon level

(57) A method for producing electrically erasable and programmable read-only memory cells with a single polysilicon level, including the use of a sacrificial layer (5) of silicon oxide to produce a high-thickness silicon oxide layer on the active area. The active area of the cell is protected from heavy source and drain implantation in order to improve reliability.

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