Programmable integrated circuit output pad

(19)

(11)

EP 0 547 349 A3

(12)	EUROPEAN PATENT APPLICATION

(88)	Date of publication A3:
	04.08.1993 Bulletin 1993/31

(43)	Date of publication A2:
	23.06.1993 Bulletin 1993/25

(21)	Application number: 92118747.2

(22)	Date of filing: 02.11.1992

(51)	International Patent Classification (IPC)⁵: H03K 19/0175, H03K 19/003, H03K 19/0185

(84)	Designated Contracting States:
	DE FR GB IT

(30)

Priority:

16.12.1991 US 807971

(71)	Applicant: HEWLETT-PACKARD COMPANY
	Palo Alto, California 94304-1181 (US)

(72)	Inventors:
	Knee, Derek L. Sunnyvale California 94087 (US) Wheless, Thomas O. Eagle Idaho 83616 (US) Li, Wang Kay San Jose California 95129 (US)

(74)	Representative: Baillie, Iain Cameron et al
	c/o Ladas & Parry Altheimer Eck 2 80331 München 80331 München (DE)

(56)

References cited: :

(54)	Programmable integrated circuit output pad

(57) A system is described that includes an integrated circuit chip (10) having output paths (28) connected to a network (25) whose electrical characteristics can vary. The system includes a circuit for adjusting output drive applied to a pad (15) on the chip (10). The circuit includes a PVT monitor (18) for providing an output that is related to process, voltage and temperature parameter variations on the chip (10). A processor (20) determines network configuration information and enables the network's electrical characteristics to be determined. The processor (20) is responsive to an output from the PVT monitor (18) and the network's determined electrical characteristics to provide control outputs (70, 72, 74) indicative of a required output drive current level. A drive current circuit (16) includes alterable circuitry and is responsive to the processor's control output (70, 72, 74) to provide the required output drive levels to the pad (15).

Search report