Cathode structures

Abstract

 An electrode structure for a field emission vacuum device comprises an array of emitter tips (1) of micron dimensions protruding from a substrate (6) and an overlying grid layer (5) with an aperture (3) therethrough. A thin coating of material is formed over each tip by evaporation or sputtering of the material. An insulating spacer layer (7) between the substrate and the grid layer also has an aperture (9) encircling each emitter tip, the aperture in the insulating layer being of larger diameter than that in the grid layer, so that the evaporated or sputtered material does not reach the wall of the aperture in the insulating layer to cause a grid/cathode short-circuit. The evaporated or sputtered thin film may be formed of, for example, Pd, Ir or Pt.

Description

[0001] This invention relates to cathode structures, and particularly to the manufacture of field emission cathodes.

[0002] The fabrication of reliable high-current field emission cathodes requires the accurate fabrication of arrays of sharp field emitters across macroscopic areas. Typical field emitter cathodes, shown schematically in Figure 1 of the accompanying drawings, consist of tips 1 which are 1-2µm high and are a few (<10) microns apart, with each tip in the centre of an aperture 3 in a grid 5, the grid being supported on, but electrically isolated from, the tip-bearing substrate 6 by an insulating spacer layer 7. With this geometry, emission currents of many micro-amps per tip are obtained from each tip for grid-tip voltages of about 100V, provided that the tips have radii of approximately 10nm. Since the emission depends exponentially on the electric field at the tip and therefore exponentially on the tip radii, the individual tips must have very accurately similar tip radii if each is to contribute to the total emission current at the single common applied voltage. It is only by having very similar emission currents from each tip that high total currents can be achieved.

[0003] For arrays with ±50% variation in tip radii the total current per tip which can be achieved from such an array is less than a tenth of the maximum current which can be achieved from individual tips. In contrast, control of the accuracy of the tip geometry to within 1nm allows such an array to produce average currents per tip of approximately half the maximum individual tip current.

[0004] It is therefore clear that fabrication of nanometre precision is important in maximising the current density achievable from field emitter array cathodes. For this reason, many field emission cathodes have been made using single-crystal silicon semiconductor tips, since the single-crystal structure and the large available knowledge base relating to the etching of silicon have allowed very accurate atomic-scale tips to be formed.

[0005] However, even these techniques are ultimately limited by variations in the initial lithography, and the ultimate currents that can be achieved, even from single tips, are lower than might be achieved from metal emitters.

[0006] An object of the present invention is to provide a process for finely controlling the chemical, structural and geometric properties of field emission cathode tips in order to achieve larger and more stable emission currents.

[0007] According to the invention there is provided a process for manufacturing a field emission electrode structure, comprising the steps of forming a tapered cathode tip on a substrate; forming a grid layer spaced from the substrate and having an aperture substantially aligned with the cathode tip; and depositing a coating on the tip by evaporation or sputtering of coating material.

[0008] An embodiment of the invention will now be described, by way of example, with reference to the accompanying drawings, in which

Figure 1 is a schematic cross-sectional view through part of a known field emitter device as described above, and

Figures 2, 3 and 4 are schematic cross-sectional views through the device of Figure 1, each showing a respective modification in accordance with the invention.

[0009] As described above, conventional field emission cold cathodes comprise an array of emitter tips 1 from which electrons are extracted by applying a high voltage (about 100V) to the grid structure 5, which is supported approximately 1-2µm from the tip-bearing substrate 6 by the insulating spacer layer 7.

[0010] For the purposes of the present invention, the aperture 9 in the spacer layer is preferably larger than the aperture 3 in the grid so that, over a reasonable range of angles close to the cathode axis there is no line of sight view of the insulation layer 7 from an evaporation source mentioned below.

[0011] In accordance with the invention, a thin tip coating 11 (Figure 2) is formed by evaporation of a material (preferably a metal) on to the whole cathode structure after the fabrication of the Figure 1 device is complete. The lack of a line of sight view of the insulation layer from the evaporation source 8 ensures that no metal layer is formed on the insulating spacer layer 7 around the aperture 9, so that there is no shorting between the tips and the grid.

[0012] Because this process step can be carried out at the end of the cathode fabrication and after the electrical connections have been made, the step is ideally effected in the final vacuum enclosure of the device of which the cathode is a part. The coating may be applied by a process similar to the firing of a reactive metal getter in a conventional thermionic cathode device. In the present invention, however, the process brings about coating of the cathode, and not removal of unwanted materials as is the intention with a getter.

[0013] Particular examples of the invention will now be described. In order to increase emission current and stability, micromachined silicon tips may be coated with a few nanometres of a non-reactive and refractory metal such as Pd, Ir or Pt. Provided that the tips are maintained at low temperature, such coatings will be relatively stable. However, it may be advantageous for the formation of the associated silicide structure (e.g. PdSi₂) which will form, if the coating is carried out on cathodes maintained at high temperature, or during subsequent annealing to a high temperature. In the particular case of Pd, silicide formation will be rapid at about 400°C. In the case of Ni and Co layers, silicides formed and annealed at about 500°C will form epitaxial, oriented coatings which will result in similar crystallographic orientations and therefore similar work functions on different tips, leading to similar convergence of emission properties of each tip in the array.

[0014] Although convergence of emission properties can be achieved by such crystallographic means, amorphisation of the emitter surface will lead to similar effects. In particular, ion bombardment cleaning (preferably done by introducing a noble gas into the device encapsulation and creating a plasma by suitable biasing of subsidiary electrodes (not shown), is preferably carried out to clean the tip surfaces prior to metal deposition. This process will result in an amorphous (Si) tip surface, subsequent to metal deposition. The same process may be repeated to produce an amorphous metal coating.

[0015] Although the final emitter surface is preferably a refractory metal, such material is not easily evaporated. A refractory coating may be formed, however, by coating the emitter tip 1 with a lower melting point material such as Ti and subsequently reacting it with either the (Si) substrate or by gas phase atoms encircling the tip. In the case of Ti, a refractory metallic TiN film may be formed by ion bombarding the evaporated Ti coating with nitrogen ions.

[0016] Referring to Figure 3 of the drawings, in an alternative process for producing a thin coating (preferably metallic) on the tips 1, the evaporated material is made to cover not only the emitter tips but also the upper surface of the grid 5 (and also the upper surface of any additional grid (not shown) which may be provided spaced from the grid 5. The layer 11 formed on the grid 5 provides an advantage in that, if the device has to operate in an environment in which the vacuum is imperfect, any resulting ion bombardment which tends to sputter coating off the tips 1, as indicated by arrows 13, will also sputter some coating off the grid or grids, as indicated by arrows 15, so that the coating material sputtered off the grid(s) will tend to recoat the tips.

[0017] In a further alternative process, as illustrated in Figure 4, the grid 5 (and preferably any additional grid) is made of the same material as the coating layer 11. If then, in use, the tips are subjected to ion bombardment, any coating material lost from the tips will tend to be replaced by material sputtered from the grid(s).

Claims

1. A process for manufacturing a field emission electrode structure, characterised by the steps of forming a tapered cathode tip (1) on a substrate (6); forming a grid layer (5)spaced from the substrate and having an aperture (3) substantially aligned with the cathode tip; and depositing a coating (11) on the tip by evaporation or sputtering of coating material.

2. A process as claimed in Claim 1, characterised in that the grid layer (5) is spaced from the substrate (6) by a dielectric layer (7) which has an aperture (9) therethrough substantially aligned with the cathode tip, the aperture in the dielectric layer being of larger diameter than the aperture in the grid layer, whereby the coating material (11) evaporated or sputtered on to the cathode tip through the aperture in the grid layer does not reach the wall of the aperture in the dielectric layer.

3. A process as claimed in Claim 1 or Claim 2, characterised in that the coating material (11) is subsequently reacted with the substrate material or with a gaseous material encircling the cathode tip (1) or with material ion-implanted into the cathode tip.

4. A process as claimed in any preceding claim, characterised in that the coating material comprises a metal.

5. A process as claimed in Claim 4, characterised in that the metal is a refractory metal.

6. A process as claimed in Claim 5, characterised in that the refractory metal is Pd, Ir or Pt.

7. A process as claimed in any preceding claim, characterised in that the coating is annealed after deposition.

8. A process as claimed in Claim 7, characterised in that the substrate (6) is formed of silicon, and the annealing step causes the formation of the coating into a silicide.

9. A process as claimed in any preceding claim, characterised in that the surface of the grid layer (5) remote from the substrate (6) is coated with the coating material during the evaporation or sputtering step for subsequent transfer to the cathode tip by ion bombardment.

10. A process as claimed in any preceding claim, characterised in that the grid layer(5) is formed of the coating material; and in that the coating on the cathode tip (1) is formed by sputtering of the grid layer.

Drawing