The present invention relates to a display device, comprising a liquid-crystal material between two support plates held at a defined spacing from one another and having surfaces facing one another, a pattern of N line electrodes being provided on one surface and a pattern of column electrodes on the other surface in which the line electrodes cross the column electrodes and a matrix of display elements is thus formed at the position of the crossovers, and the device comprises a control circuit for presenting square-wave data signals to the column electrodes and a line-scanning circuit for periodically scanning the line electrodes and presenting square-wave line selection voltages signals.

Display devices of that kind are known from GB 2 020 875 A or US 5 151 690 A. The first reference shows an adressable matrix which consists of liquid crystals defined by the crossing regions of row and column electrodes. The state of such a liquid crystal is related to the magnitude of electrical signals applied to those electrodes and to the number of elements in the matrix. The electric signals are modified according to the number of elements in the matrix so that the operating margin between on and off potentials can be maximized. A certain number of columns are scanned and energized in succession while the states of the certain number of elements displayed in each row are prestored and ciculated in a register for that row. Via a circuit the voltage levels for on and off are determined to be applied to the row electrode according to each bit in the register and an elector is operated as each column in turn is scanned.

The second reference shows a very similar device where the scanning electrodes are formed on one of two subtrates between which a liquid-crystal-layer is interposed. Scanning electrode voltage driving wave forms consisting of selective and non-selective voltages are applied to the scanning electrodes of the liquid-crystal-panel.

Such display devices are normally operated with multiplex addressing in accordance with the so-called RMS mode.

The method of addressing (based on the so-called RMS behavior of the liquid-crystal material) is described, inter alia, by Alt and Pleshko in IEEE Trans. El. Dev. ED 21, 1974, pages 146-155, by Neahing and Kmetz in IEEE Trans. El. Dev. ED 26, 1979, pages 795-802, and by Kawakami et al. in SID-IEEE Record of Biennial Display Conference, 1976, pages 50-52. This method of addressing is regarded as the commonest for the addressing of liquid-crystal display devices which are constructed as a matrix of picture elements such as that described above, in which no active electronic switch (such as, for example, thin-film transistor) is used for each picture element.

With this method of addressing, the picture elements are switched from a first state to a second state which is optically different therefrom with the aid of the line-scanning circuit which periodically scans the line electrodes with a line-selection pulse of magnitude V_s and with the aid of the control circuit for presenting data signals to the column electrodes, which control circuit feeds data voltages of magnitude +/- V_d to the column electrodes for the time in which a line electrode is scanned, in such a way that the optical state which is achieved in a display element is determined by the so-called root-mean-square (RMS) voltage value across the element concerned.

The RMS voltage value V₂ for the selected display elements, i.e., the display elements in the on state, is given by:$${\text{V}}_{\text{2}}{}^{\text{2}}{\text{= (V}}_{\text{s}}{\text{+ V}}_{\text{d}}{\text{)}}^{\text{2}}{\text{/N + (N - 1) * V}}_{\text{d}}{}^{\text{2}}\text{/N}$$
The RMS voltage value V₁ for the unselected display elements, i.e., the display elements in the off state is given by:$${\text{V}}_{\text{1}}{}^{\text{2}}{\text{= (V}}_{\text{s}}{\text{- V}}_{\text{d}}{\text{)}}^{\text{2}}{\text{/N + (N - 1) * V}}_{\text{d}}{}^{\text{2}}\text{/N}$$
Figure 2 diagrammatically shows a transmission-voltage characteristic of a picture cell belonging to this display device.

Alt and Pleshko derived relationships which, for a given value of the ratio S = V₂/V₁ (also referred to as threshold steepness in the transmission-voltage characteristic), show how great the maximum number of lines N_max is which can be addressed by this method while retaining a predetermined contrast, and the way in which the voltage V_s of the line selection pulse and the data voltages +/- V_d must be chosen in order to achieve this. These relationships are as follows:$${\text{N}}_{\text{max}}{\text{= {(S}}^{\text{2}}{\text{+ 1)/(S}}^{\text{2}}{\text{- 1)}}}^{\text{2}}$$$${\text{(V}}_{\text{s}}{\text{/V}}_{\text{d}}{\text{)}}^{\text{2}}{\text{= N}}_{\text{max}}$$$${\text{V}}_{\text{d}}{}^{\text{2}}{\text{= V}}_{\text{1}}{}^{\text{2}}\text{* {0.5/(1 - Q)}}$$ where Q² = N_max^-1

If the line selection voltage V_s and the data voltage V_d are now chosen in accordance with the expressions (2) and (3), and if N_max lines are used, the resulting RMS voltage across a selected picture element will be equal to V₂ and the resulting RMS voltage across an unselected picture element will be equal to V₁.

A greater degree of multiplexing, in other words a higher value of N_max, requires a steeper slope in the transmission-voltage characteristic, i.e., a value of the quantity S = V₂/V₁ closer to 1.0.

With the so-called "SUPER-TWISTED" liquid-crystal effects at present known (and already used), very high N_max values can be achieved because the threshold steepness S of the transmission-voltage characteristic of these effects has a value which is very close to the limit value of 1.0.

Figure 1 diagrammatically shows a portion of a matrix-oriented display device 1 having N_max selection lines (row electrodes) 2 and describes the operating principle of the abovementioned RMS multiplex address method. This address method is generally referred to as "line-at-a-time" RMS multiplex addressing.

The information to be displayed is presented on the data lines (column electrodes) 3. There are display elements 4 situated at the position of the crossover points of the selection lines 2 and the data lines 3. Depending on the information presented on the data lines 3, the display elements 4 are in an on state or an off state. The picture information (data voltage +/- V_d) is supplied synchronously with the selection of the lines or row electrodes with the aid of the line-selection voltage V_s. Thus, starting from the time instant t₁ the line 2^a is selected for a period t₁ (also referred to as line time), which line, together with the information then present on the data lines 3^a, 3^b, 3^c (i.e. +/- V_d) determines the optical state of the picture elements 4^aa, 4^bb, 4^cc.

During this period t₁ in which the line 2^a is selected, there is a voltage +/- V_d across all the other picture elements which correspond to the line electrodes 2^b, 2^c, etc.

Starting from the time instant t₂ (where t₂ - t₁ = t₁) the line 2^b is selected for the period t₁. The information then present on the data lines 3 (i.e. +/- V_d) determines the state of the picture elements 4^ba, 4^bb, 4^bc.

After this line time t₁, the next line is then selected. The entire picture is thus written in line by line. After the last line of the matrix has been selected, the entire cycle is repeated (so-called "repeated scan procedure"). The duration of a single write-in cycle is referred as the raster time or frame time t_f:t_f = N * t₁, where N is the number of lines which are successively scanned in this way.

In this RMS address method, it is important that both the rise time and the fall time (or the switching time for transition to the 'on' or the 'off' state, respectively) of the optical effect are much greater than the raster time. Under these conditions, the display element responds to the cumulative effect of a number of address pulses (or selection pulses). In this case, a liquid-crystal display element, in particular, responds in the same way as if it has been addressed by a sinusoidal or square-wave signal having the same RMS voltage value as that of the 'on' and 'off' voltages V₂ and V₁ given by the expressions (1) and (2).

As already discussed, the maximum number of selection lines N_max is related to the value of the ratio V₂/V₁ (threshold steepness).

Recently novel address schemes have been described which, in contrast to the "line-at-a-time" addressing described above, make use of "multi-line-at-a-time" selection of line electrodes during the raster time.

This multiline addressing is described in:

• 1. Dutch Patent Application 9200606 in the name of Welzen;
• 2. The Proceedings of SID-IEEE Display Conference, Boston (USA), May '92, pages 228-231, authors: Scheffer and Clifton.
• 3. The Proceedings of SID-IEEE Display Conference, Boston (USA), May '92, pages 232-235, authors: Ihara et al.

This multi-line addressing is used to reduce or to eliminate the so-called "FRAME RESPONSE" behavior. Said characteristic "FRAME RESPONSE" behavior occurs, in particular, in the case of fast-switching liquid-crystal display devices having a high degree of multiplexing (= large number of lines to be multiplexed) and having the standard line-at-a-time addressing. "FRAME RESPONSE" behavior results in loss of contrast and brightness.

With multi-line addressing, simultaneous selection of a plurality of lines takes place during the scanning of the matrix. These factors have the consequence that the single, high selection pulse which is necessary in line-at-a-time addressing for each line during each raster time is replaced by a plurality of smaller pulses which are regularly distributed over the raster time.

Both the occurrence of a plurality of separate selection pulses having a shortened pulse duration and the lower voltage levels of said selection pulses in multi-line addressing reduce or eliminate the "FRAME RESPONSE" behavior and ensure that the optical effect exhibits RMS behavior.

With a suitable choice of the voltage form (and amplitude) of the selection voltage and of the data wave signals, multi-line addressing does not lead to a reduction in the maximum number of lines to be addressed. For a given transmission-voltage characteristic with a steepness V₂/V₁, N_max is in turn determined in accordance with expression (3) derived for RMS behavior occurring.

Both in the case of the line-at-a-time and in the case of multi-line addressing, the actual RMS voltage value for an "on" element (or selected display element) in a column in which all the picture elements are in the "on" state may differ from the RMS voltage value for a selected display element in a column in which the picture elements are, for example, alternately "on" and "off".

This difference is due, inter alia, to resistive and capacitive effects as a result of which the address-voltage signals supplied (and in particular the data signals) are applied in a more or less "deformed" manner across the picture elements concerned.

It will be apparent that this 'deformation' results in a reduction in the RMS voltage value and that this reduction in the RMS voltage value across a picture element becomes greater as more "on"-"off" transitions (always including the "off"-"on" transitions) occur in a column. For the transmission characteristic, shown in Figure 2, of a so-called negative-contrast display device (in which the unselected, or "off", elements have a low transmission and the selected, or "on", elements have a high transmission), these factors can result in perceptible brightness differences between "on" elements in columns having different picture contents (or having a different number of "on"-"off" transitions).

These brightness differences (generally referred to as "crosstalk" or "ghost" phenomena) are, in particular, perceptible in highly multiplexed dot-matrix liquid-crystal display devices.

A method of reducing crosstalk due to differences in data-voltage patterns (the so-called vertical crosstalk) has recently been described in the Proceedings of SID-IEEE Display Conference, Las Vegas (USA), May '90, pages 412-415, authors: Kaneka et al.

This method makes use of a special polarity change sequence in which the polarities of the address-voltage signals always change in sign after scanning 2 lines during the raster scan. The start position of these polarity changes is also changed or shifted for successive frames.

The object of the invention which will be described in this patent application is to provide a display device in which the abovementioned crosstalk effect is reduced as much as possible without making use of special polarity-change sequences.

For this purpose the display device of the invention is characterized in that the display device comprises an electronic circuit unit generating grey values by means of pulse-height modulation and which registers the associated value of the parameter X_au (j) which is defined as the number of times the level of the data voltage changes for each column j of the matrix of display elements and for each raster scan, whereby during the raster scan, the amplitude V_d of the data voltage +/- V_d, which is across a picture element during the non-select period in the case of the given description of the line-at-a-time addressing is different for columns having a different X_au value and the chosen value of V_d is greater to the extent that X_au is greater and, in particular, in accordance with a relationship V_d = V_d(X_au) which is determined by proceeding from the requirement that picture elements which are assumed to be in the same state but occur in columns with a different X_au value must have equal, or virtually equal V_RMS voltages, further the same V_d value is used for a range of X_au values, viz. from X_au up to and including (X_au + n) where n = 1, 2, 3, and that an appropriate voltage whose amplitude (AMP_c) is determined by the X_au value of the column concerned is presented to the separate columns for a certain time interval after each raster scan, whereby the same AMP_c value is used for a range of X_au values, viz. from X_au up to and including (X_au + n) where n = 1,2,3,.... .

The control circuit should comprise a "counter unit" which registers the number of "on" -"off" transistions in each column of the matrix of the display device.

The (increasing) loss in RMS voltage value over a certain picture element as a consequence of a (increasing) number of "on"-"off" transistions in the column concerned can be compensated for by using a modified (or higher) amplitude of the data voltage during the raster scan.

It is also possible to carry out this compensation not by using a modified data voltage during the raster scan but, of example, presenting a voltage pulse whose magnitude is determined by the number of "on"-"off" transistions in the column concerned simultaneously to the separate columns, after every frame scan for a certain time interval (for example, equal to the line time t₁).

The presentation of these voltage pulses and the abovementioned different data voltages may take place by means of the driver ICs which are used in the multi-line addressing.

• Figure 1 shows a portion of a matrix-oriented display device;
• Figure 2 shows a transmission characteristic of so-called negative-contrast display device;
• Figure 3 shows a relationship between the voltage V_LC across an LC element and time elapsed; and
• Figures 4A and 4B show waveforms of voltages across an element A and B, respectively.

The invention with which the crosstalk effect can be reduced will now be explained in greater detail.

In this description use will be made of the line-at-a-time addressing. The invention is, however, not limited to line-at-a-time addressing and anyone who is to some extent familiar with this specialist field can establish that the invention can also be used for multi-line addressing.

Figure 3 diagrammatically shows the way in which the voltage V_lc across an LC element (represented as a capacitor C) increases with time on presenting a voltage jump of V_in in the presence of a resistor R. The time dependence of V_lc is given as:$${\text{V}}_{\text{lc}}{\text{= V}}_{\text{in}}\text{* (1 - exp(-t/τ))}$$ where τ is the RC time constant.

The RMS voltage value follows from:$${\text{V}}_{\text{RMS}}{\text{}}^{\text{2}}{\text{= (V}}_{\text{in}}{\text{}}^{\text{2}}{\text{/T)∫}}_{\text{C}}^{\text{T}}{\text{(1 - exp(-t/τ))}}^{\text{2}}\text{dt}$$
After some mathematics, the following expression is found for the RMS voltage value (normalized with respect to V_in):$$\begin{gathered} {\text{V}}_{\text{RMS}}{\text{}}^{\text{2}}\text{= 1 - τ/2T * (exp(-2T/τ) - 1) + 2τ/T} \\ \text{* (exp(-T/τ) - 1)} \end{gathered}$$
For practical values of τ and T (such as those which will occur in 'real' display devices) it can be assumed that τ/T << 1, and consequently expression (8) can be reduced to:$${\text{V}}_{\text{RMS}}{\text{}}^{\text{2}}\text{= 1/T * (T - 3τ/2)}$$
If a square-wave voltage sequence is involved which has square-waves having durations of T₁, T₂ ... T_n, where T₁ + T₂ + ... T_n = T_T, the resulting V_RMS is given by:$$\begin{gathered} {\text{V}}_{\text{RMS}}{\text{}}^{\text{2}}{\text{= (T}}_{\text{1}}{\text{- 3τ/2)/T}}_{\text{T}}{\text{+ (T}}_{\text{2}}{\text{- 3τ/2)/T}}_{\text{T}}\text{+ ...} \\ {\text{+ (T}}_{\text{n}}{\text{- 3τ/2)/T}}_{\text{T}}{\text{= 1 - n * 3τ/2T}}_{\text{T}} \end{gathered}$$ Thus, the effective (RMS) voltage is determined by the number of square-wave voltages and therefore, in reality, by the number of passages through zero.

Consider, for example, 2 selected elements A and B in column i and column j, respectively, of the dot-matrix display device, the elements in column i being alternately "on" and "off". The voltage across element A during a raster time can be reproduced diagrammatically as shown in Figure 4A.

Figure 4B diagrammatically shows the voltage across element B with the assumption that only one "on"-"off" transition occurs in column j.

The deformation of the square-wave voltages (as a consequence of the RC behavior as explained on page 8) is reproduced diagrammatically both in Figure 4A and in Figure 4B. It will be clear that the V_RMS of element A is less than the RMS voltage associated with element B.

This reduction in V_RMS can be compensated for by making use of a data-voltage amplitude which is higher than prescribed according to the Alt and Pleshko relationships (in which case ideal, undeformed square-wave voltage signals are assumed).

For column i and column j, different data-voltage levels will then have to be used.

How large these voltage levels should be in order to compensate for the loss in V_RMS (in order to achieve equal V_RMS voltages for the elements A and B, and also for any randomly selected element in a random column k having a random number of "on"-"off" transitions) can be derived if the extent of deformation of the square-wave voltages is known.

The height of the data-voltage levels for compensating for V_RMS losses can, however, also be determined experimentally by means of transmission (or brightness) measurement of an "on" element as a function of the number of "on"-"off" transitions. In this connection a procedure to be followed may be as follows:

• 1. Determine the transmission of an "on" element in a column having only selected picture elements; this transmission value serves as reference value.
• 2. Then determine, as a function of the number of "on"-"off" transitions, the data-voltage level that should be set in order to achieve the reference transmission mentioned under 1. for an "on" element.

The relationship V_d = V_d(X_au) is thus determined experimentally (X_au = number of "on"-"off" transitions).

In principle, a large number of data-voltage levels are required with this compensation method, and this can be achieved with multi-level TFT column drivers.

In practice, the number of voltage levels required can be reduced appreciably because the use of one and the same V_d value in the case of, for example, X_au and (X_au + 1) transitions does not necessarily result in visually perceptible brightness differences.

For the practical implementation of this compensation method, it is therefore useful to determine the range of "on"-"off" transitions: X_au up to and including (X_au + n) where n = 1, 2, 3, ... for which one and the same V_d voltage can be used without all these factors giving rise to perceptible brightness differences.

In the compensation method described above, different V_d values are used for columns with different X_au values during the raster scan.

Compensation for V_RMS losses as a consequence of "on"-"off" transitions can also be achieved by using the same V_d value during the scanning of the N-line matrix for columns having different X_au values and by presenting a voltage pulse whose amplitude V_j(X_au) is dependent on the X_au value in the column concerned simultaneously to the separate columns j after every frame scan for a certain time interval t_x (for example, equal to the line time t₁). During this time interval t_x, one and the same voltage, for example the non-select line voltage (which, according to the address scheme shown in Figure 1, is equal to zero) is fed to all the rows. The height of the voltage pulse to be supplied V_j(X_au) can be determined relatively simply experimentally with the aid of transmission measurements according to a procedure such as is described for the determination of the different column voltages V_d(X_au) which are used in the first-mentioned compensation method.

In connection with the practical implementation of this second compensation method, it is also now the case that it is useful to determine the range of "on"-"off" transitions: X_au up to and including (X_au + n), where n = 1, 2, 3, ... for which one and the same V_j voltage can be used without all these factors resulting in perceptible brightness differences.

For the line-at-a-time addressing, the polarities of both the data signals and of the line-select signals should change in sign, for example after every raster time; this is done in order to prevent the occurrence of direct-voltage components. In practice, this polarity change is often used after a certain number of line times, the number being less than N.

This means that the number of "on"-"off" transitions (including the transitions "off"-"on") no longer needs to be equal to the number of changes in polarity of V_d (or changes in the V_d level) as is reproduced diagrammatically in Figure 1 and Figure 4.

In the description of both compensation methods, X_au can therefore be better interpreted as the number of changes in polarity of V_d during a raster time or, still more generally, as the number of times the level of the data voltage changes.

This last interpretation of X_au is, in particular, of importance for multi-line addressing.

The idea of presenting voltage pulses having different amplitudes to the separate columns after each frame scan can also be used to achieve grey values in display devices having a dot-matrix structure such as those described in this patent application.

This will be explained below in greater detail.

At present grey levels are produced by frame modulation (FM) or by pulse-width modulation (PWM).

FM is described, inter alia, in SID Digest of Technical Papers XIV, pages 32-33, 1983. A disadvantage of FM is the occurrence of "flicker" in fast-switching liquid-crystal display devices. PWM is described, inter alia, in SID Digest of Technical Papers XI, pages 28-29, 1980. PWM has, inter alia, the disadvantage that highfrequency signals are necessary for a large number of grey levels.

A third method of achieving grey levels makes use of pulse-height modulation (PHM) and is essentially used in display devices in which each picture element is provided with an active electronic switch such as, for example, a thin-film transistor. In such actively controlled matrix display devices, a grey level is in fact achieved for a picture element by supplying the element concerned with a voltage having a certain amplitude. This method cannot, however, readily be used in the matrix display devices which are described in this patent application and which are addressed by the line-at-a-time or multi-line RMS addressing.

All this is connected with the fact that any change in the amplitude of the column voltage is 'felt' by all the elements in the column concerned. Suppose, for example, that, in a particular column, and element is to have a grey level which is achieved by presenting a data voltage of magnitude f*V_d, where -1 <= f <= +1, during the line-selection time (line-at-a-time addressing is assumed for simplicity). For an "on" element in this column, it is then true that:$${\text{V}}_{\text{on}}{\text{}}^{\text{2}}{\text{= (V}}_{\text{s}}{\text{+ V}}_{\text{d}}{\text{)}}^{\text{2}}{\text{/N + (N - 2)*V}}_{\text{d}}{\text{}}^{\text{2}}{\text{/N + (f*V}}_{\text{d}}{\text{)}}^{\text{2}}\text{/N}$$
In other words, according to expression (11), the RMS voltage of an "on" element is dependent on the (absolute) value of the parameter f. Obviously, this is undesirable.

The loss in RMS voltage can be compensated for by supplying a voltage pulse to the column concerned after each frame scan (for, for example, a line time t₁). In that case it is generally true that the height of this voltage pulse is dependent on the number of elements in the column concerned having a particular grey level, expressed, for example, in the value of the factor f, in which case completely "on" and completely "off" may also be regarded as grey levels.

Given this number of 'grey' element and their respective grey value, the height of the voltage pulse can in principle be determined (or calculated) by deriving expressions under these circumstances for, for example, the RMS voltage of an "on" and an "off" element and equating the RMS voltage values calculated in this way to those according to expressions (1) and (2).

The following example serves to illustrate the procedure which can be followed in this case. In this example, it is assumed that the compensation pulse V_c is supplied for a line time t₁.
EXAMPLE: 4-line matrix, in which one "on" element and three picture elements having different grey levels (or f values) occur in a particular column.

For the 4-line matrix, the RMS voltage of an "on" element (and of an "off" element) is given according to the Alt and Pleshko line-at-a-time address scheme by:$${\text{V}}_{\text{on}}{\text{}}^{\text{2}}{\text{= (S}}_{\text{4}}{\text{+ D}}_{\text{4}}{\text{)}}^{\text{2}}{\text{/4 + 3*D}}_{\text{4}}{}^{\text{2}}\text{/4}$$$${\text{V}}_{\text{off}}{\text{}}^{\text{2}}{\text{= (S}}_{\text{4}}{\text{- D}}_{\text{4}}{\text{)}}^{\text{2}}{\text{/4 + 3*D}}_{\text{4}}{}^{\text{2}}\text{/4}$$ where: S₄ = D₄ * SQRT(4);
S₄ = line-select voltage and D₄ = data voltage.

In achieving grey values with PHM (and, consequently, using a compensation voltage pulse), a 5th line is, as it were, added to the 4-line matrix. This line does not actually need to be present: it is a virtual line.

The "on" element in this example now has the following RMS voltage:$$\begin{gathered} {\text{V}}_{\text{on}}{\text{}}^{\text{2}}{\text{= (S}}_{\text{5}}{\text{+ D}}_{\text{5}}{\text{)}}^{\text{2}}{\text{/5 + (f}}_{\text{i}}{\text{*D}}_{\text{5}}{\text{)}}^{\text{2}}{\text{/5 + (f}}_{\text{2}}{\text{*D}}_{\text{5}}{\text{)}}^{\text{2}}{\text{/5 + (f}}_{\text{3}}{\text{*D}}_{\text{5}}{\text{)}}^{\text{2}}\text{/5} \\ {\text{+ V}}_{\text{c}}{}^{\text{2}}\text{/5} \end{gathered}$$ where: f_i*D₅ is the amplitude of the data voltage which is supplied to the element i concerned having a grey value with parameter value f_i.

The contribution V_c ²/5 arises because, during selection of the 5th (virtual) line, a certain voltage is presented to the column.

The value of V_c can be derived from the requirement: V_on² according to (12) = V_on² according to (14).

On choosing$${\text{S}}_{\text{5}}{\text{= S}}_{\text{4}}\text{* SQRT(5/4)}$$$${\text{and D}}_{\text{5}}{\text{= D}}_{\text{4}}\text{* SQRT(5/4)}$$ we find that:$$\begin{gathered} {\text{3*D}}_{\text{4}}{}^{\text{2}}{\text{/4 = (1/5)*(f}}_{\text{1}}{\text{*D}}_{\text{4}}{\text{)}}^{\text{2}}{\text{*(5/4) + (1/5)*(f}}_{\text{2}}{\text{*D}}_{\text{4}}{\text{)}}^{\text{2}}\text{*(5/4)} \\ {\text{+ (1/5)∗(f}}_{\text{3}}{\text{*D}}_{\text{4}}{\text{)}}^{\text{2}}{\text{*(5/4) + V}}_{\text{c}}{}^{\text{2}}\text{/5} \end{gathered}$$ Or:$${\text{V}}_{\text{c}}{}^{\text{2}}{\text{/5 = D}}_{\text{4}}{}^{\text{2}}{\text{* (3 - f}}_{\text{1}}{}^{\text{2}}{\text{- f}}_{\text{2}}{}^{\text{2}}{\text{- f}}_{\text{3}}{}^{\text{2}}\text{)/4}$$$${\text{V}}_{\text{c}}{}^{\text{2}}{\text{/5 = D}}_{\text{4}}{}^{\text{2}}{\text{* (3 - Σf}}_{\text{i}}{}^{\text{2}}\text{)/4}$$
Thus, if V_c is chosen in accordance with expression (19), the resulting V_on² will be identical to that according to expression (12). If we had considered an "off" element instead of an "on" element, the result would have been identical. Consider, for example, the element having a grey level corresponding to f₁. The RMS voltage V_f1 of this element is given by:$$\begin{gathered} {\text{V}}_{\text{f1}}{}^{\text{2}}{\text{= (S}}_{\text{5}}{\text{+ f}}_{\text{1}}{\text{*D}}_{\text{5}}{\text{)}}^{\text{2}}{\text{/5 + D}}_{\text{5}}{}^{\text{2}}{\text{/5 + (f}}_{\text{2}}{\text{*D}}_{\text{5}}{\text{)}}^{\text{2}}{\text{/5 + (f}}_{\text{3}}{\text{*D}}_{\text{5}}{\text{)}}^{\text{2}}\text{/5} \\ {\text{+ V}}_{\text{c}}{}^{\text{2}}\text{/5} \end{gathered}$$
After substituting expressions (18), (15) and (16) in (20), it is found that:$${\text{V}}_{\text{f1}}{\text{}}^{\text{2}}{\text{= (S}}_{\text{4}}{\text{+ f}}_{\text{1}}{\text{*D}}_{\text{4}}{\text{)}}^{\text{2}}{\text{/4 + (4/4)*D}}_{\text{4}}{}^{\text{2}}{\text{- (1/4)*(f}}_{\text{1}}{\text{*D}}_{\text{4}}{\text{)}}^{\text{2}}$$
With S₄ = SQRT(4) * D₄, we find that:$${\text{V}}_{\text{f1}}{\text{}}^{\text{2}}{\text{= {8 + 2*SQRT(4)*f}}_{\text{1}}{\text{} * D}}_{\text{4}}{}^{\text{2}}\text{/4}$$
It is also true that:$${\text{V}}_{\text{on}}{\text{}}^{\text{2}}{\text{= {8 + 2}}^{\text{∗}}{\text{SQRT(4)) * D}}_{\text{4}}{}^{\text{2}}\text{/4}$$
If we compare expression (22) with (23) it follows that for f₁ < 1, the RMS voltage V_f1² is in fact less than V_on². It is possible to set up (more general) equations for the general case of an N-line matrix. The value of V_c can then be derived by a procedure such as that described above, in which case, inter alia, the choice made will be:$${\text{S}}_{\text{N+1}}\text{= SQRT((N+1)/N) * SN, and}$$$${\text{D}}_{\text{N+1}}\text{= SQRT((N+1)/N) * DN.}$$ Suppose that the ith element in a certain column should be "on". The RMS voltage of this element if the 'virtual' (N+1)-line matrix is addressed then becomes: After substituting the above relationships between S_N+1 and S_N and between D_N+1 and D_N in expression (24) and equating this expression to that according to the standard Alt and Pleshko RMS addressing of N-lines:

V_on² = (S_N + D_N)²/N + (N-1)*D_N²/N, where S_N² = N * D_N², it is found that: where the factor f_i = 1 is included in this last summation. In other words, given the information content (of a particular column), the height of the voltage pulse V_c to be supplied (to the column concerned), which ensures that grey levels can be achieved with the aid of PHM while maintaining the correct RMS voltages of the "on" and "off" elements, can be determined.

One of the typical embodiment of the display device of the present invention, is characterized in that the device comprises an electronic circuit unit which registers the accosicated value of the parameter X_au(j), which is defined in the above mentioned description, for each column j of the matrix of display element s and for each raster scan.

And the display device of the present invention is further characterized in that during the raster scan, the amplitude V_d of the data voltage +/- V_d (which is across a picture element during the non-select period in the case of the given description of the line-at-a-time addressing) is different for columns having a different X_au value.

In the case of multi-line addressing, there is no question of a bi-level data voltage +/- V_d, but multi-level data voltages are ures; for example, for 3-line addressing, 4 voltage levels will be used with 2 different amplitudes; +/- V₃ and +/- V₃/3.

Note that, the value of V₃ will be chosen as different, as mentioned above.