DATA TRANSMISSION DELAYING CIRCUIT USING TIME-MULTIPLEXED LATCH ENABLE SIGNALS - Patent 0640261

(19)

(11)

EP 0 640 261 A1

(12)

(43)	Date of publication:
	01.03.1995 Bulletin 1995/09

(21)	Application number: 92913469.0

(22)	Date of filing: 14.05.1992

(51)

International Patent Classification (IPC):

H03K 5/ 135^{( . )}
H03L 7/ 00^{( . )}
H04L 7/ 027^{( . )}

H03D 3/ 24^{( . )}
H04L 7/ 02^{( . )}
H04L 7/ 033^{( . )}

(86)	International application number:
	PCT/US1992/004080

(87)	International publication number:
	WO 1993/023937 (25.11.1993 Gazette 1993/28)

(84)	Designated Contracting States:
	DE GB

(71)	Applicant: VLSI TECHNOLOGY, INC.
	San Jose California 95131 (US)

(72)	Inventor:
	EBZERY, Thomas Andover, MA 01810 (US)

(74)	Representative: Cross, Rupert Edward Blount, et al
	BOULT, WADE & TENNANT 27 Furnival Street London EC4A 1PQ London EC4A 1PQ (GB)

(54)	DATA TRANSMISSION DELAYING CIRCUIT USING TIME-MULTIPLEXED LATCH ENABLE SIGNALS