(19)
(11) EP 0 655 553 A1

(12) EUROPEAN PATENT APPLICATION

(43) Date of publication:
31.05.1995 Bulletin 1995/22

(21) Application number: 93830473.0

(22) Date of filing: 29.11.1993
(51) International Patent Classification (IPC)6F02P 3/04
(84) Designated Contracting States:
DE FR GB IT

(71) Applicants:
  • SGS-THOMSON MICROELECTRONICS S.r.l.
    I-20041 Agrate Brianza (Milano) (IT)
  • CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
    I-95121 Catania (IT)

(72) Inventors:
  • Palara, Sergio
    I-95026 Acitrezza (IT)
  • Sueri, Stefano
    I-95125 Cantania (IT)

(74) Representative: Pellegri, Alberto et al
c/o Società Italiana Brevetti S.p.A. Via Puccini, 7
21100 Varese
21100 Varese (IT)


(56) References cited: : 
   
       


    (54) Generation of a diagnostic signal when the current through a power transistor reaches a level close to a limit current


    (57) A diagnostic signal, indicative of the reaching of a predefined level, lower than a fixed maximum limit value, by the current flowing through a power transistor, is generated while employing a single comparator of a reference voltage with the voltage present across a sensing resistance, thus preventing problems arising from different offset characteristics of distinct comparators. By the use of current mirrors, the generation of a diagnostic signal when the current reaches a level that can be fixed very close to the limiting value, may be reliably triggered, irrespectively of the offset characteristic of the single comparator employed.




    Description

    BACKGROUND OF THE INVENTION



    [0001] For controlling the energy stored in an inductive load, it is important to make available a diagnostic signal when the current in the inductor reaches a preset level.

    [0002] A driving system for an inductor is depicted in Fig. 1. The inductor L is connected between a supply node Vs and a transistor T₁ that acts as a switch, driven by a drive circuit (DRIVE) to an input of which a signal VIN is applied.

    [0003] As shown in Fig. 2, when VIN goes high, T₁ turns-on and a current IC starts to flow through the inductor, increasing with a linear law in function of time. For any value I reached by the current, the corresponding energy that is stored in the inductance is given by:





       The power stage normally comprises a circuit for limiting the maximum current in order to avoid destruction of the transistor, therefore in the diagram of Fig. 2, the current is limited to a maximum value Imax. Moreover, if the transistor T₁ must be turned-off always at the same level of energy stored in the inductor, it is necessary to produce a signal when the current I reaches a preset level ID, in order to maximize the energy stored in the inductor at the end of each charging phase, that is when T₁ turns off. This is often required, for example, in electronic sparkplug driving, where it is also necessary that the level ID at which the turning off occurs be very close to the maximum limit current Imax.

    [0004] In conventional systems, this is achieved in the manner depicted in Fig. 3. A maximum current limiting circuit A1 (LIMITATOR) intervenes on the drive circuit (DRIVE) when the voltage drop on the sensing resistance Rs, due to IC, equals the reference voltage E₁, that is when

    .

    [0005] Similarly, a diagnostic signal VD of Fig. 2, is produced when

    , considering that, for the above reported reasons, ID may have a value very close to Imax. To this purpose, a second diagnostic comparator (DIAGNOSTIC) A2 is employed.

    [0006] Given that ID must be lower than Imax, though close thereto, E₁ must also be greater than E₂ but must have a value very close thereto. The absolute values of E₁ as well as of E₂ should on the other hand be as low as possible, because to them corresponds a voltage drop on Rs due to the current IC. Such a voltage drop is in series with the saturation voltage of the transistor and causes power dissipation, therefore the voltage on Rs and therefore also E₁ and E₂ should not be greater than few 10mV. This means that if a diagnostic signal, for example for a value greater than 90% of the limit current Imax, is required;

    must be verified.

    [0007] As a numeric example, by assuming: Imax=5A and Rs=10mΩ; E₁=50mV and therefore

    . This means that

    . Occasionally,

    may be required and the difference between E₁ and E₂ must be even smaller than few mV.

    [0008] The known arrangement of Fig. 3 is critical, because the voltage difference on Rs at which the operational amplifiers A₁ and A₂ must react is very small (in the order of millivolts) and is comparable in terms of order of magnitude with the voltage offset of the comparators that are employed. This may determine a non-negligeable imprecision in the signalling of the reaching by the current IC of the diagnostic level ID. Eventually, if the offset of the differential amplifier A₂ become greater in absolute value than the voltage difference E₁ - E₂, the system will not produce the required diagnostic signal, with serious consequence on the functioning of the system.

    [0009] In other words, in all the applications where for obvious reasons of optimization, the current level ID must be fixed very close to the limit level Imax, the known circuits may be operating in extremely critical conditions and therefore losing in reliability and precision in ensuring a correct ratio between ID and Imax.

    OBJECTIVE AND SUMMARY OF THE INVENTION



    [0010] A main objective of the present invention is to provide a system for generating a diagnostic signal, indicative of the reaching by the current flowing through a power transistor of a preset level, the precision of which be substantially insensitive of the input offset of the respective detecting circuits.

    [0011] A further aim of the invention is to simplify the known circuit by employing a single monitoring comparator in order to eliminate the imprecision deriving from different characteristics of equivalent input offset of distinct monitoring comparators.

    [0012] The new method of the invention is implemented by a circuit that employs a single detecting differential amplifier, capable of producing a signal the level of which is a function of the difference between a reference voltage and a voltage present across a sensing resistance of the current flowing through the power transistor. The signal produced by the differential amplifier (comparator) is conventionally employed for driving a transistor that is functionally connected so as to subtract part of a driving current that is delivered toward the power transistor by a conventional drive circuit.

    [0013] In this way, a negative reaction is implemented that determines a maximum limit of the current through the power transistor and, according to a preferred embodiment of the invention, the same signal produced by the comparator is used for driving a second transistor through which a current that is essentially lower than said current subtracted to the first transistor is forced.

    [0014] Therefore, the signal present across said second transistor is employed for producing the desired diagnostic signal by employing a threshold circuit.

    [0015] The second transistor, driven in a current mirror relationship with the first current limiting transistor, reaches a state of saturation before the first transistor and therefore determines the triggering of a threshold circuit that generates the diagnostic signal upon the reaching of a current level ID, positively lower by a pre-established quantity than the limit current value Imax.

    [0016] The current forced through the second transistor Is a mirrored current that may have a given ratio with a driving current that is delivered toward the power transistor.

    [0017] The ratio between ID and Imax no longer depends from the input equivalent offset of the comparator, as in the circuits of the prior art, because the respective circuits that determine: one, the limit value of the current through the output power transistor, and the other, the generation of a diagnostic signal upon the reaching of a certain level ID by the current, are both driven by the same signal produced by the comparator. Therefore, the circuit permits to fix said ratio even very close to unity, though ensuring a correct operation of the circuit also in presence of disturbances. In practice, the invention allows to maximize the energy handled by the power transistor, while retaining a high degree of safety and realiability.

    BRIEF DESCRIPTION OF THE DRAWINGS



    [0018] The different features and advantages of the invention will become even clearer through the following description of an important embodiment and by referring to the attached drawings, wherein:

    Figure 1 is a functional diagram of an output stage for driving a load L;

    Figure 2 shows a series of diagrams of operation of a power stage, according to certain recurrent requisites for this type of circuit, as described above;

    Figure 3 is a block diagram of a control system for a power stage according to the requisites set forth in the diagrams of FIg. 2, as described above;

    Figure 4 is a functional block diagram of a control circuit for a power stage according to the present invention;

    Figure 5 is a circuit diagram of an embodiment of the circuit of the invention.


    GENERAL DESCRIPTION OF THE INVENTION



    [0019] The functional block diagrams of Figures 3 and 4 place in evidence the distinction between the known method for generating a diagnostic signal VD, depicted in Fig. 3, and the method of the invention depicted in Fig. 4.

    [0020] As may be observed, the invention contemplates the use of a single comparator, which may be constituted by a differential amplifier A (comparator) capable of generating a signal in function of the difference between a reference voltage E₁ and the voltage present across a sensing resistance Rs, through which the current IC flowing in the power transistor T₁ (and in the load L) flows.

    [0021] The signal produced by the comparator A drives two circuits. The first circuit (LIMITATOR) produces a limiting signal of the maximum current that may flow through the power transistor T₁, which acts on the drive circuit (DRIVE) that delivers a driving current to the power transistor T₁. The second circuit (DIAGNOSTIC) is a circuit capable of producing a diagnostic signal VD upon the reaching by part of the current IC of a value ID that is lower by a re-established amount than the limiting value Imax of the current IC, as established by the LIMITATOR circuit.

    PREFERRED EMBODIMENT OF THE INVENTION



    [0022] A preferred embodiment of the circuit of the invention is shown in Fig. 5. The circuit operates in the following manner. When VIN is commanded high, the control circuit CONTROL closes the switch M and a current IG flows in T₂. Also T₄ and T₅, both connected in a current mirror configuration with the transistor T₂, are turned-on and generate currents, the value of which will depend from the respective ratio of emitter area with T₂.

    [0023] T₅ provides a driving current:

    , to the base of T₉, which activates the power transistor T₁ with a base current

    . Of course, the equalities:

    will be verified and the current IC will start to flow in the inductor L through the transistor T₁.

    [0024] When IC reaches the value:

    , the differential amplifier A is activated and through its output starts to deliver current to the bases of the transistors T₆ and T₇.

    [0025] T₇ starts to absorb a current I₇, by subtracting it to the driving current I₅, so that , being

    and being I₅ constant, upon an increase of I₇, IF will also increase and therefore

    will decrease. Finally, when IB has dropped down to the value given by:

    , the current through the load would stabilize at a maximum level Imax, which cannot be overcome in view of the fact that the feedback loop of the amplifier A tends to maintain the condition

    .

    [0026] According to the invention, to obtain a diagnostic signal VD, a transistor T₆, functionally connected in a current mirror configuration with the transistor T₇, is employed. Therefore, the two transistors T₆ and T₇ will reach a state of conduction simultaneously and with a current ratio that directly depends from the ratio between their emitter areas. As an example, it may be assumed that

    .

    [0027] A diagnostic signal:

    is generated by the threshold circuit composed of the stage comprising T₃ and R₁. The signal VD is generated upon the turning-on of T₃, which is determined by the signal present substantially across the transistor T₆. The turning-on of T₃ will occur only if: I₆ > I₄; but

    , IF being equal to

    .

    [0028] Therefore, by imposing the condition:

    , the transistor T₆, once it has absorbed all the current I₄, saturates and activates T₃, thus determining the generation of the diagnostic signal VD.

    [0029] The diagnostic signal VD is always produced positively before the the reaching of the maximum limit current, because, as already mentioned,

    , and being

    , the collector voltage of the transistor T₆ tends to fall positively before the collector voltage of T₇. By suitably adjusting the emitter area ratio between T₆ and T₇ and between T₄ and T₅, it is possible to precisely determine a certain ratio ID/Imax, which may also be very close to unity.

    [0030] The only parameter of the circuit described above, which may still determine an imprecision in the definition of the level of current in the inductor at which the diagnostic signal is generated, may be desumed from the expression already reported above:

    . In fact, IF depends from the current gains of T₁ and T₉, which may vary with the temperature and/or be subject to a process "spread".

    [0031] This cause of possible imprecision may be better understood by considering the expressions:

    , I₆ > I₄ and

    . The first equality denounces a strong dependence on temperature due to the term IF, while the second disequality is independent of temperature. As a consequence the third equality above could be incoherent with the first two relationships.

    [0032] In order to prevent the effects of this possible problem, an additional circuit composed of the transistors T₈ and T₁₀, may be introduced, as shown in the embodiment of Fig. 5. The function of the additional circuit is the following.

    [0033] T₈ and T₁₀ are connected in current mirror configuration with T₉, therefore the following conditions hold:

    ;

    ;

    where A₈, A₉ and A₁₀ are the respective emitter areas of the transistors.

    [0034] Moreover, with the addition of the circuit composed by T₈ and T₁₀, it may be shown that in order for a diagnostic signal VD to be generated, the following conditions must hold:


    ; while

    ; but

    and

    from where, by assuming for example

    , the following relationships are derived:









    by having set:






    [0035] Dependence from the current gain of transistors is exibited only by the current I₈, which (from Fig. 5) is given by:


       However, the term I₈ is present both in the expression (1) and in the expression (2) which, if combined with the equation (3), show that the condition of generation of a diagnostic signal is practically independent from the current gain of the power transistor T₁.


    Claims

    1. A method for generating a diagnostic signal, indicative of the reaching of a predefined level, lower than a maximum limit value, by the current flowing through a power transistor which comprises generating at least a signal, function of the difference between a reference voltage and a voltage produced on a sensing resistance through which said current flows and using said signal for signalling the reaching of said preset level, characterized by the fact that a unique signal, function of said voltage difference, drives a first circuit that limits the maximum current and a threshold circuit generating said diagnostic signal.
     
    2. A method as defined in claim 1, characterized by comprising
       driving, with said unique signal a first transistor, functionally capable of subtracting part of a driving current delivered to said power transistor, and a second transistor;
       forcing through said second transistor a current essentially lower than said substracted current, for saturating a third transistor;
       using a signal present across said saturating third transistor for triggering the generation of said diagnostic signal.
     
    3. A circuit for limiting the maximum current of the power transistor (T₁) and for generating a diagnostic signal (VD) indicative of the reaching by part of the current (IC) through said power transistor T₁ of a preset level, lower than a maximum current level, comprising at least a differential amplifier (A) capable of generating a signal, the level of which is a function of the difference between a reference voltage (E₁) and a voltage present across a sensing resistance (Rs) of said current (IC) and at least a first transistor (T₇) driven by said signal, functionally capable of subtracting of part (I₇) of a driving current (I₅) delivered to said power transistor (T₁) by a control circuit, determining a maximum limit of the current (IC), characterized by comprising
       at least a second transistor (T₆) driven by said signal;
       means (T₄) capable of forcing through said second transistor (T₆) a current (I₄) essentially lower than said current (I₇) subtracted by said first transistor (T₆);
       a threshold circuit (T₃, R₁), driven by a signal present across said second transistor (T₆), capable of producing said second diagnostic signal (VD).
     
    4. A circuit as defined in claim 3, characterized by comprising a current mirror circuit (T₂, T₄, T₅) capable of mirroring a control current (I₄) through a third transistor (T₄) constituting said means capable of forcing a current through said second transistor T₆, and through a fourth transistor (T₅) capable of delivering said driving current (I₅) to said power transistor (T₁).
     
    5. A circuit according to claim 4, wherein said third transistor (T₄) has a smaller size than said fourth transistor (T₅).
     
    6. A circuit according to claim 5, wherein said power transistor (T₁) if driven through a stage composed of a fifth transistor (T₉) , driven by a current equivalent to the current (I₅) driven by said fourth transistor, less said current (I₇), subtracted by said first transistor (T₇).
     
    7. A circuit according to claim 6, characterized by comprising a sixth transistor (T₈), connected to said fifth transistor (T₉), to form a current mirror with a seventh, diode-configured, transistor (T₁₀), said sixth transistor (T₈) absorbing current from the driving node of said threshold circuit (T₃, R₁); the ratio among the respective emitter areas of said fifth, sixth and seventh transistors (T₉, T₈, T₁₀) being such as to render the triggering condition of said threshold circuit (T₃, R₁) independent from variation of the current gain of the power transistor (T₁).
     




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