(19)
(11) EP 0 715 770 A1

(12)

(43) Date of publication:
12.06.1996 Bulletin 1996/24

(21) Application number: 94922567.0

(22) Date of filing: 15.07.1994
(51) International Patent Classification (IPC): 
H01L 21/ 761( . )
H01L 21/ 76( . )
H01L 21/ 265( . )
(86) International application number:
PCT/US1994/007958
(87) International publication number:
WO 1995/006956 (09.03.1995 Gazette 1995/11)
(84) Designated Contracting States:
DE FR GB

(30) Priority: 03.09.1993 US 19930117574

(71) Applicant: NATIONAL SEMICONDUCTOR CORPORATION
Santa Clara, California 95052 (US)

(72) Inventors:
  • HANSON, David, A.
    Palo Alto, CA 94303 (US)
  • ARONOWITZ, Sheldon
    San Jose, CA 95127 (US)
  • DEMIRLIOGLU, Esin, K.
    Cupertino, CA 95014 (US)

(74) Representative: Bowles, Sharon Margaret, et al 
BOWLES HORTON Felden House Dower Mews High Street
Berkhamsted Hertfordshire HP4 2BL
Berkhamsted Hertfordshire HP4 2BL (GB)

   


(54) PLANAR ISOLATION METHOD FOR USE IN FABRICATION OF MICROELECTRONICS