Microprocessor systems for electronic postage arrangements

(19)

(11)

EP 0 736 846 A3

(12)	EUROPEAN PATENT APPLICATION

(88)	Date of publication A3:
	16.10.1996 Bulletin 1996/42

(43)	Date of publication A2:
	09.10.1996 Bulletin 1996/41

(21)	Application number: 96110413.0

(22)	Date of filing: 25.01.1983

(51)	International Patent Classification (IPC)⁶: G07B 17/02

(84)	Designated Contracting States:
	BE CH DE FR GB LI NL

(30)

Priority:

29.01.1982 US 343877

(62)	Application number of the earlier application in accordance with Art. 76 EPC:
	92114140.4 / 0513880

(71)	Applicant: PITNEY BOWES INC.
	Stamford Connecticut 06926-0790 (US)

(72)	Inventor:
	Check, Frank T., Jr. San Jose, CA 95117 (US)

(74)	Representative: Avery, Stephen John et al
	Hoffmann, Eitle & Partner, Patent- und Rechtsanwälte, Arabellastrasse 4 81925 München 81925 München (DE)


	Remarks:
	This application was filed on 27 - 06 - 1996 as a divisional application to the application mentioned under INID code 62.

(54)	Microprocessor systems for electronic postage arrangements

(57) A microprocessor system suitable for an electronic postage arrangement comprises a microprocessor (10) ,register means (20, 21) coupled to said microprocessor for storing postage accounting data and a plurality of sensors (50, 51, 52) for detecting operation conditions in said postage meter . The microprocessor has a software routine stored in a permanent memory (11) to check said sensors periodically during operation and means responsive to the noncorrespondence of the outputs of said sensors and a unique code stored in said microprocessor permanent memory, upon a comparison performed in accordance with said software routine, for indicating an error condition.

Search report