(19)
(11) EP 0 757 447 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
22.04.1998 Bulletin 1998/17

(43) Date of publication A2:
05.02.1997 Bulletin 1997/06

(21) Application number: 96111715.7

(22) Date of filing: 19.07.1996
(51) International Patent Classification (IPC)6: H03M 1/18
(84) Designated Contracting States:
DE FR GB IT

(30) Priority: 31.07.1995 US 509589

(71) Applicant: HARRIS CORPORATION
Melbourne, FL 32905 (US)

(72) Inventors:
  • Andren, Carl
    Indialantic, Florida 32903 (US)
  • Lucas, Leonard V.
    Palm Bay, Florida 32905 (US)
  • Gokhale, Ravindra V.
    Satellite Beach, Florida 32937 (US)
  • Snell, James
    Palm Bay, Florida 32095 (US)

(74) Representative: Fleuchaus, Leo, Dipl.-Ing. et al
Melchiorstrasse 42
81479 München
81479 München (DE)

   


(54) A/D reference level adjustment circuit to maintain optimum dynamic range at the A/D


(57) A method and circuit for controlling a reference voltage for an analog-to-digital converter having plural outputs includes a sensor for indicating when outputs from the A/D converter are at least a desired voltage, and a processor responsive to the sensor and connected to a digital-to-analog converter which provides a reference voltage for the A/D converter. The processor provides signals to the D/A converter which change the reference voltage. A logic unit in the processor increments an accumulator when either an I or a Q component in the A/D converter output is at least the desired voltage and decrements the accumulator when neither the I nor the Q component is at least the desired voltage. A counter may buffer the accumulator changes.






Search report