(19)
(11) EP 0 881 671 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
30.06.1999 Bulletin 1999/26

(43) Date of publication A2:
02.12.1998 Bulletin 1998/49

(21) Application number: 98109536.7

(22) Date of filing: 26.05.1998
(51) International Patent Classification (IPC)6H01L 21/70, H01L 21/77, H01L 21/98, H01L 33/00, H01S 3/025
(84) Designated Contracting States:
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
Designated Extension States:
AL LT LV MK RO SI

(30) Priority: 28.05.1997 JP 138903/97

(71) Applicant: Matsushita Electric Industrial Co., Ltd.
Kadoma-shi, Osaka 571-8501 (JP)

(72) Inventors:
  • Chino, Toyoji
    Mino-shi, Osaka (JP)
  • Yoshida, Takayuki
    Neyagawa-shi, Osaka (JP)
  • Matsuda, Kenichi
    Moriguchi-shi, Osaka (JP)

(74) Representative: Schwabe - Sandmair - Marx 
Stuntzstrasse 16
81677 München
81677 München (DE)

   


(54) Method for fabricating semiconductor device


(57) A method for fabricating a semiconductor device, in which a semiconductor chip having a first surface and a second surface substantially parallel to each other is mounted on a submount such that the first surface faces the submount, includes: a first step of applying resin to at least one of the semiconductor chip and the submount; a second step of applying a pressure to the semiconductor chip and the submount so that the semiconductor chip and the submount are bonded to each other by the resin, resulting in electrical connection therebetween; and a third step of performing at least one of a film formation process, an etching process, a patterning process, and a washing process for the second surface of the semiconductor chip.







Search report