Content addressable memory system

(19)

(11)

EP 0 899 743 A3

(12)	EUROPEAN PATENT APPLICATION

(88)	Date of publication A3:
	04.08.1999 Bulletin 1999/31

(43)	Date of publication A2:
	03.03.1999 Bulletin 1999/09

(21)	Application number: 98202045.5

(22)	Date of filing: 18.06.1998

(51)	International Patent Classification (IPC)⁶: G11C 15/04

(84)	Designated Contracting States:
	AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
	Designated Extension States:
	AL LT LV MK RO SI

(30)

Priority:

28.08.1997 US 919227

(71)	Applicant: NORTHERN TELECOM LIMITED
	Montreal, Quebec H2Y 3Y4 (CA)

(72)	Inventors:
	Schultz, Kenneth James Kanata, Ontario K2K 2B6 (CA) Gibson, Garnet Frederick Randall Nepean, Ontario K2G 5V5 (CA) Shafari, Farhad Nepean, Ontario K2J 4K8 (CA)

(74)	Representative: Humphrey-Evans, Edward John et al
	Nortel Patents London Road Harlow, Essex CM17 9NA Harlow, Essex CM17 9NA (GB)

(54)	Content addressable memory system

(57) A system includes a plurality of content addressable memory (CAM) chips which are cascaded and connected to a common bus. Each of the CAM chips provides search results (hit, match address and multiple match). A hit signal and a multiple match signal are propagated from chip to chip. A system hit result is given from the furthest down stream CAM chip. The match address result of the system is given from the common bus, where on-chip self-timed signals guarantee that there is no driving contention on the bus.

Search report