(19)
(11) EP 0 907 257 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
12.04.2000 Bulletin 2000/15

(43) Date of publication A2:
07.04.1999 Bulletin 1999/14

(21) Application number: 98118429.4

(22) Date of filing: 29.09.1998
(51) International Patent Classification (IPC)7H03M 13/27, H03M 13/29
(84) Designated Contracting States:
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
Designated Extension States:
AL LT LV MK RO SI

(30) Priority: 30.09.1997 JP 26704897

(71) Applicant: KABUSHIKI KAISHA TOSHIBA
Kawasaki-shi, Kanagawa-ken 210-8572 (JP)

(72) Inventor:
  • Noda, Chosaku K.K. Toshiba, Intell. Property Div.
    Tokyo 105-8001 (JP)

(74) Representative: Henkel, Feiler, Hänzel 
Möhlstrasse 37
81675 München
81675 München (DE)

   


(54) Error correction of interleaved data blocks


(57) An error correction coding method comprises the steps of dividing data into first blocks with predetermined size, assigning the data to a plurality of channels and writing into the memory by making the first blocks a unit, performing a coding of at least two types of error correction codes for the data written into the memory for each channel in a second block unit constituted by a predetermined number of the first blocks and adding a check parity to generate a third block, reading the third block from the memory by adding a different offset for each of the plurality of channels, and multiplexing read the third block to a data series in a unit of a predetermined length.







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