A WELL TO SUBSTRATE PHOTODIODE FOR USE IN A CMOS SENSOR ON A SALICIDE PROCESS

Description

BACKGROUND

[0001] This invention is generally related to photodetecting semiconductor structures, and more specifically to photodiodes built using modem state of the art Complementary Metal Oxide Semiconductor (CMOS) fabrication processes.

[0002] A key component of all imaging systems is the photodetector, a device used to detect incident photons of visible light that originate from an object whose image is to be captured. Some prior art detection devices include those illustrated in Figures 1A and 1B. Figure 1A illustrates a conventional technique for realizing a photodiode having a p-type doped substrate and a heavily doped N+ diffusion layer forming a p-n junction. The p-n junction is surrounded by an insulating oxide region. The N+ can be the source/drain diffusion of an adjacent transistor with the p-substrate being electrically contacted if necessary through conventional means.

[0003] Most photodiodes operate based on the principle of reverse-biasing a p-n junction diode such that a depletion region is formed. Next, the photodiode is subjected to incident light as shown which travels through the transparent oxide layers and into the silicon. The properties of the semiconductor are such that electron-hole pairs are generated both inside and outside the depletion region in response to the incident photons of visible light. These photogenerated electron-hole pairs are then swept away by diffusion and drift mechanisms and collected in the depletion region, thereby inducing a photocurrent representing a portion of the desired image.

[0004] A significant factor contributing to the sensitivity of a photodiode is its ability to capture as many incident photons as possible. In the example of Figure 1A, virtually the entire N+ surface region above the depletion region is exposed, such that the incident photons can enter the structure through the large N+ region.

[0005] Integrated circuits built using modem and future generation fabrication processes are placing severe constraints on the design, implementation and performance of photodetecting structures. For example, modem integrated circuits such as image sensor ICs often attempt to incorporate a large number of photodetecting elements into the single IC die to meet limited physical space requirements. To meet such a challenge, the N+ region of the conventional photodiode in Figure 1A must be made considerably smaller, thereby reducing the sensitivity of the photodiode structure.

[0006] Moreover, as the total power dissipated by an IC keeps increasing due to increasing complexity of the functions desired to be implemented, semiconductor fabrication processes keep up by allowing ever shrinking dimensions for the constituent circuit elements. Shrinking dimensions and larger numbers of interconnects, however, present increased resistances across the entire IC. For example, field effect transistor (FET) devices built using advanced CMOS processes have such small lateral and vertical dimensions that the resistance presented by the highly doped diffusion regions at the source and drain, as well as the polysilicon layer of the gate, become too high for effective signal transmission. To alleviate this problem, modem CMOS fabrication processes of the polysilicon self-aligned type provide the additional process step of covering the exposed silicon areas of the source, drain, and gate with a high conductivity material known as a silicide so as to present lower sheet resistance to the subsequently formed metal contacts. The silicide layer may be formed by applying a layer of metal such as titanium over the exposed silicon, and then causing a reaction between the titanium and silicon to transform the metal layer into a silicide.

[0007] Image sensors incorporating a self-aligned silicide are known in the art, see e.g., H-S Wong et al. IEEE International Electron Devices Meeting (IEDM), p. 915-918, 1996.

[0008] In a self-aligned CMOS ("salicided") process, silicide strapping covers the entire N+ region of the source and drain in Figure 1A. Because the silicide is virtually an opaque material, although up to 10% of light can get through at the thickness used in CMOS processes, the photodiode in Figure 1A can rely only on incident photons which reach the depletion region from an angle. As a result, image arrays using photodiodes as in Figure 1A are less effective in capturing an image when built on a CMOS salicided process.

[0009] One way to increase the number of photons that reach the p-n junction of Figure 1A is to customize the silicide by adding process steps to further pattern the silicide, such that no silicide is formed over those regions used for photodetection. However, such an additional step will be time consuming and will increase manufacturing costs when the IC is mass produced.

[0010] Another way to increase the photon count appears in Figure 1B as a series of "edge-intensive" photodiodes, where the incident light enters the photodiode through multiple translucent oxide regions surrounding an interdigitated silicide structure. Such a scheme renders a less effective photodiode as compared to the conventional non-salicided design in Figure 1A as less photons are captured per unit area.

[0011] Finally, another disadvantage of the photodiode structures in Figures 1A and 1B is that they will require customized fabrication steps, especially with modem and future processes. That is because as transistor dimensions continue to shrink with advanced fabrication processes, the diffusion region depths for the source and drain of a field effect transistor (FET) must also shrink to permit the proper design of short channel FETs. As the diffusion depths shrink, the optical properties of photodiodes built using such diffusion-substrate junctions also change. Thus, to maintain the original optical properties, a different diffusion region will need to be built solely for photodiodes. This addition to the standard diffusion regions used for the FETs undesirably increases process complexity. Therefore, there is a need for a photodiode structure that can be implemented using standard IC fabrication processes but which also allows for flexibility in defining the optical properties.

SUMMARY

[0012] According to a first aspect of this invention there is provided a photodiode as claimed in claim 1 herein.

[0013] According to a second aspect of this invention there is provided a method as claimed in claim 9 herein.

[0014] According to a third aspect of this invention there is provided an image capturing system as claimed in claim 10 herein.

DRAWINGS

[0015] The elements of the invention set forth above and other aspects and advantages of the invention will be better understood with regard to the following description, appended claims, and accompanying drawings where:

Figures 1A and 1B illustrate different prior art photodetecting structures.

Figures 2A and 2B show a cross-section of a semiconductor structure containing the invention according to first and second embodiments, respectively.

Figure 3 is a layout of a photocell containing a photodiode according to the first and second embodiments of the invention.

Figures 4A and 4B illustrate a cross-section of a semiconductor structure containing the invention according to third and fourth embodiments, respectively.

Figure 5 is a layout of a photocell according to the third and fourth embodiments of the invention.

Figure 6 is an equivalent circuit of an exemplary photocell.

Figure 7 illustrates a block diagram of an exemplary image sensor circuit.

Figure 8 is a block diagram of an image capture system incorporating the invention.

DETAILED DESCRIPTION

[0016] Figures 2A and 2B illustrate semiconductor structures implemented in a modem silicon CMOS fabrication process that contain first and second embodiments of the photodiode of the invention, respectively. The photodiode in each of Figures 2A and 2B features a photosensitive p-n region formed by a substrate 200 and a well 203 sitting in the substrate. The well 203 is typically formed by ion implantation of the substrate 200. The insulating field oxide 207 substantially covers the well 203, except for a small highly-doped diffusion region 209 for making electrical contact with the well. The substrate 200 may also be electrically contacted using well known techniques (not shown). Other techniques known to those skilled in the art are also available for making electrical contact with the well and substrate.

[0017] The photodiode is effectively created between ground, a common node having electrical contact with the substrate, and the diffusion region 209. In one particular embodiment of the invention, the substrate 200 has p-type conductivity and well 203 has n-type conductivity. For this scenario, the diffusion region 209 would be heavily doped as an N+ diffusion region to make ohmic contact to the well 203. Alternatively, the p-n junction can be formed between a n-substrate and a p-well, with a P+ diffusion region for contacting the well 203. Other different substrate and well combinations are possible and within the capabilities of those reasonably skilled in CMOS integrated circuit design. In all cases, however, a diode depletion region is formed across and near the p-n junction between the well 203 and the substrate 200. After applying the correct reverse bias voltage to the resulting photodiode, a photocurrent can then be induced in response to the transmitted incident light.

[0018] Figure 2A shows the invention as used with a space efficient topology in a modem CMOS fabrication process. The field oxide 207 is thus represented by a shallow trench isolation (STI). Figure 2B shows an alternate embodiment where the field oxide can be of the Local Oxidation of Silicon (LOCOS) type. The structure of Figure 2B remains otherwise identical to the structure of Figure 2A described above. In both cases, however, it should be noted that the photodiode exists beneath the field oxide. Thus, the oxide (either STI or LOCOS) is not being used for electrically isolating the photodiode in a lateral direction. This contrasts with the conventional structures in Figures 1A and 1B where the oxide layer plays a lateral isolation role for the photodiodes. The photodiode of the invention effectively receives lateral electrical isolation in part from the high doping of the substrate.

[0019] The remaining features of Figures 2A and 2B define a FET structure having gate conducting layer 235. The FET acts as a conventional reset transistor for the photodiode, as shown by the FET with gate M3 receiving a Reset signal in an exemplary photocell circuit 600 in the schematic of Figure 6. The FET also features a drain/source conducting layer 225 formed over a drain/source diffusion 215, and a gate having oxide 231 covered by polysilicon 233 and conducting gate layer 235. Diffusion 209 is covered by conducting layer 223 and plays the role of both source for the FET and ohmic contact to the photodiode's well 203. The conducting layers are typically formed by depositing a layer of refractory metal over the silicon and then alloying the metal on the silicon surface using known techniques to form the silicide. For example, the refractory metal can be one of cobalt, titanium, tungsten, tantalum, and molybdenum.

[0020] The silicides are virtually opaque and therefore reflect virtually all incident optical signals. However, the field oxide (typically silicon dioxide) is substantially transparent to the incident optical signals of interest, i.e., those that can be detected by the photosensitive region, and therefore allows a significant number of photons to enter the photodiode. The photosensitive region is defined as that portion of the well 203 and substrate 200 where electron-hole pairs are generated in response to transmitted light. This includes a depletion region at and around the p-n junction defined between the well and the substrate, as well areas inside the well and substrate but lying outside the depletion region.

[0021] The optical properties of the invention's photodiode can be adjusted to a certain degree without any significant effects on the performance of a FET formed in another substantially identical well region on the same IC. This can be done by, for example, varying the depth of the well 203 and keeping the width of the diffusion regions 209 and 215 constant. In this way, the invention's photodiode structure can keep abreast of advanced fabrication processes which call for increasingly shallower diffusion regions.

[0022] Figure 3 is an exemplary layout of a CMOS photocell that incorporates the invention. The plane cut by the line A-A' defines a cross-section of a portion of the photocell, the portion being illustrated by earlier Figures 2A and 2B. The invention's photodiode is represented in the layout as n-well 203 with N+ diffusion 209. The size (area) of the photodiode as defined by the well 203 boundary is typically maximized in relation to the area of the photocell. The adjacent field effect transistor (FET) has gate 233, and drain 215 connected to supply voltage V_DD.

[0023] Figures 4A and 4B illustrate alternative third and fourth embodiments of the invention, where a metal line connects the well N+ diffusion 409 of the photodiode to a separate source N+ diffusion 419 for the adjacent reset FET. The structures in Figures 4A and 4B remain otherwise identical to those in Figures 2A and 2B described above, with Figure 4B showing an STI oxide and Figure 4A having a LOCOS oxide. Figure 5 is a layout of a photocell featuring the structure in either Figures 4A or 4B. The plane cut along lines A-A' defines a cross-section of a portion of the photocell illustrated in Figures 4A and 4B.

[0024] Figure 6 is a schematic of photocell circuit 600 based upon the layouts of Figures 3 and 5, showing the metal strips M1, M2, and M3 as connections to the respective gates of three FETs in the photocell. The Reset, Row, and Bitline terminals are also shown, as well as the connections to the positive supply node V_DD. Reset circuitry includes the FET with metal strip M3, whereas the readout circuitry features FETs with metal strips M1 and M2. Photocell circuit 600 includes a photodiode having an n-well in a p-substrate, the n-well connected to gate metal M1 and the source of FET with gate metal M3, and the p-substratc connected to aground. The operation of the photocell circuit 600 will be readily apparent to one skilled in the art of CMOS image sensing circuitry.

[0025] The photodiode invention may be utilized as part of an image sensor IC, a portion of which is shown in Figure 7. The sensor IC 700 includes an array of photocell circuits 600 interfacing row decoder/drivers 707 and column decoder 703. Signals that represent the image are output by the processing block 711 which may include analog signal conditioning circuitry to deliver analog image signals. Alternatively, the exemplary sensor IC 700 may also include on-board A/D converters coupled to the analog output of each photocell, and digital signal processing circuitry in the processing block 711 for digital manipulation of the photocell signals to yield digital image signals. Also, in that case, the A/D conversion may occur before or after the column decoder 703.

[0026] The sensor IC 700 can be incorporated into an image capture system such as a digital camera. Figure 8 shows such an embodiment including sensor array 710 coupled to an optical interface and an A/D conversion block.

[0027] To summarize, a well-to-substrate photodiode is disclosed. The photodiode structure can be implemented using standard CMOS fabrication processes without requiring separately engineered diffusion regions, and therefore presents a cost efficient and flexible solution to the problem of integrating an image sensor array into digital ICs.

Claims

1. A photodiode for converting incident optical signals into electrical signals, comprising:

a substrate layer (200) of semiconductor material of a first conductivity type; characterised by

a well of semiconductor material (203) of a second conductivity type having a top and bottom, the bottom of the well being disposed in the substrate and a p-n junction defined therebetween, the well and substrate defining a photosensitive region of said photodiode;

a diffusion region of semiconductor material of the second conductivity type (209) in contact with the well, characterized in that the diffusion region has a greater dopant concentration than the well to promote electrical contact with the well; and

a field oxide region (207) covering a substantial portion of the top of the well, the oxide region permitting the passage of at least some of the incident optical signals into the photosensitive region.

2. The photodiode of claim 1, wherein the substrate layer and well comprise the semiconductor material silicon.

3. The photodiode of claim 1 further comprising a metal electrical contact (223) connected to the diffusion region.

4. The photodiode of claim 1, wherein a metal electrical contact (225) is formed by depositing a layer of refractory metal over the diffusion region and salacided by causing a reaction between the layer of refractory metal and the diffusion region.

5. The photodiode of claim 1, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

6. The photodiode of claim 1, wherein the first conductivity type is n-type, and the second conductivity type is p-type.

7. The photodiode of claim 1, wherein the oxide region is a shallow trench isolation (STI) region.

8. The photodiode of claim 1, wherein the oxide region is a Local Oxidation of Silicon region (LOCOS).

9. A method of manufacturing a photodiode as claimed in claim including the steps of:

providing a substrate layer (200) of semiconductor material of a first conductivity type;

forming a well of semiconductor material (203) of a second conductivity type having atop and bottom, the bottom of the well being disposed in the substrate and a p-n junction being defined therebetween, the well and substrate defining a photosensitive region of said photodiode;

forming a diffusion region of semiconductor material of the second conductivity type in contact with the well, characterized in that the diffusion region has greater dopant concentration than the well to promote electrical contact with the well; and

providing a field oxide region (207) covering a substantial portion of the top of the well, the oxide region being arranged to permit the passage of at least some incident optical signals into the photosensitive region.

10. An image capturing system comprising:

an optical interface for exposure to incident light,

an array of photodiodes (710) each photodiode as claimed in any of claims 1 - 8,

an A/D converter coupled to the sensor array, a digital signal processing unit coupled to the A/D conversion unit for processing and compressing digital data received from the A/D conversion unit to yield a detected image, and

a storage unit coupled to the digital signal processing unit for storing the detected image.

11. A system as claimed in claim 10, wherein the photodiodes are arranged in rows and columns and there is further provided a plurality of row decoder/drivers (707) coupled to the photodiodes for generating a row select signal for a row of photodiodes, and a column decoder (703) coupled to the photodiodes for decoding a column of the photodiodes.

Ansprüche

1. Fotodiode zur Umwandlung einfallender optischer Signale in elektrische Signale, wobei die Fotodiode folgendes umfasst:

eine Substratschicht (200) aus Halbleitermaterial eines ersten Leitfähigkeitstyps; gekennzeichnet durch

eine Senke aus Halbleitermaterial (203) eines zweiten Leitfähigkeitstyps mit einer Ober- und Unterseite, wobei die Unterseite der Senke in dem Substrat angeordnet ist, und wobei dazwischen ein P-N-Übergang definiert ist, wobei die Senke und das Substrat einen fotoempfindlichen Bereich der genannten Fotodiode definieren;

einen Diffusionsbereich aus Halbleitermaterial des zweiten Leitfähigkeitstyps (209), der sich in Kontakt mit der Senke befindet, dadurch gekennzeichnet, dass der Diffusionsbereich eine höhere Dotierstoffkonzentration aufweist als die Senke, so dass der elektrische Kontakt mit der Senke gefördert wird; und

einen Feldoxidbereich (207), der einen wesentlichen Abschnitt der Oberseite der Senke abdeckt, wobei der Oxidbereich den Verlauf zumindest einiger der einfallenden optischen Signale in den fotoempfindlichen Bereich ermöglicht.

2. Fotodiode nach Anspruch 1, wobei die Substratschicht und die Senke das Halbleitermaterial Silizium umfassen.

3. Fotodiode nach Anspruch 1, wobei diese ferner einen metallischen elektrischen Kontakt (223) umfasst, der mit dem Diffusionsbereich verbunden ist.

4. Fotodiode nach Anspruch 1, wobei ein metallischer elektrischer Kontakt (225) gebildet wird durch Abscheiden einer Schicht aus hochschmelzendem Metall über den Diffusionsbereich und einem Salicid-Prozess unterzogen, indem eine Reaktion zwischen der Schicht aus hochschmelzendem Metall und dem Diffusionsbereich bewirkt wird.

5. Fotodiode nach Anspruch 1, wobei es sich bei dem ersten Leitfähigkeitstyp um einen P-Typ handelt, und wobei es sich bei dem zweiten Leitfähigkeitstyp um den N-Typ handelt.

6. Fotodiode nach Anspruch 1, wobei es sich bei dem ersten Leitfähigkeitstyp um einen N-Typ handelt, und wobei es sich bei dem zweiten Leitfähigkeitstyp um den P-Typ handelt.

7. Fotodiode nach Anspruch 1, wobei es sich bei dem Oxidbereich um einen STI-Bereich (schmale, seichte Gräben) handelt.

8. Fotodiode nach Anspruch 1, wobei es sich bei dem Oxidbereich um einen LOCOS-Bereich (Lokale Oxidation von Silizium) handelt.

9. Verfahren zur Herstellung einer Fotodiode nach Anspruch 1, wobei das Verfahren die folgenden Schritte umfasst:

das Bereitstellen einer Substratschicht (200) aus Halbleitermaterial eines ersten Leitfähigkeitstyps;

das Bilden einer Senke aus Halbleitermaterial (203) eines zweiten Leitfähigkeitstyps mit einer Ober- und Unterseite, wobei die Unterseite der Senke in dem Substrat angeordnet ist, und wobei dazwischen ein P-N-Übergang definiert ist, wobei die Senke und das Substrat einen fotoempfindlichen Bereich der genannten Fotodiode definierten;

das Bilden eines Diffusionsbereichs aus Halbleitermaterial des zweiten Leitfähigkeitstyps (209), der sich in Kontakt mit der Senke befindet, dadurch gekennzeichnet, dass der Diffusionsbereich eine höhere Dotierstoffkonzentration aufweist als die Senke, so dass der elektrische Kontakt mit der Senke gefördert wird; und

das Bereitstellen eines Feldoxidbereichs (207), der einen wesentlichen Abschnitt der Oberseite der Senke abdeckt, wobei der Oxidbereich den Verlauf zumindest einiger der einfallenden optischen Signale in den fotoempfindlichen Bereich ermöglicht.

10. Bilderfassungssystem, das folgendes umfasst:

eine optische Schnittstelle zur Exposition in Bezug auf einfallendes Licht;

eine Anordnung von Fotodioden (710), wobei jede Fotodiode einem der Ansprüche 1 bis 8 entspricht;

einen Analog-Digital-Umsetzer, der mit der Sensoranordnung gekoppelt ist, wobei eine digitale Signalverarbeitungseinheit mit dem Analog-Digital-Umsetzer gekoppelt ist, um von dem Analog-Digital-Umsetzer empfangene digitale Daten zu verarbeiten und zu komprimieren, so dass als Ergebnis ein detektiertes Bild resultiert; und

eine Speichereinheit, die mit der digitalen Signalverarbeitungseinheit gekoppelt ist, um das detektierte Bild zu speichern.

11. System nach Anspruch 10, wobei die Fotodioden in Zeilen und Spalten angeordnet sind, und wobei ferner eine Mehrzahl von Zeilendecodierern/Steuereinheiten (707) bereitgestellt wird, die mit den Fotodioden gekoppelt sind, um ein Zeilenauswahlsignal für eine Zeile von Fotodioden zu erzeugen, und mit einem Spaltendecodierer (703), der mit den Fotodioden gekoppelt ist, um eine Spalte von Fotodioden zu decodieren.

Revendications

1. Photodiode pour convertir des signaux optiques incidents en des signaux électriques, comprenant :

une couche de substrat (200) de matériau semi-conducteur d'un premier type de conductivité ; caractérisé par

un puits de matériau semi-conducteur (203) d'un second type de conductivité ayant une partie supérieure et une partie inférieure, la partie inférieure du puits étant disposée dans le substrat et une jonction p-n définie entre elles, le puits et le substrat définissant une région photosensible de ladite photodiode ;

une région de diffusion du matériau semi-conducteur du second type de conductivité (209) en contact avec le puits, caractérisé en ce que la région de diffusion a une concentration de dopants supérieure à celle du puits pour promouvoir le contact électrique avec le puits ; et

une région d'oxyde de champ (207) couvrant une partie sensible de la partie supérieure du puits, la région d'oxyde permettant le passage d'au moins une partie des signaux optiques incidents dans la région photosensible.

2. Photodiode selon la revendication 1, dans laquelle la couche de substrat et le puits comprennent du silicium de matériau semi-conducteur.

3. Photodiode selon la revendication 1 comprenant en outre un contact électrique métallique (223) connecté à la région de diffusion.

4. Photodiode selon la revendication 1, dans laquelle un contact électrique métallique (225) est formé en déposant une couche de métal réfractaire sur la région de diffusion et salacidé en provoquant une réaction entre la couche de métal réfractaire et la région de diffusion.

5. Photodiode selon la revendication 1, dans laquelle le premier type de conductivité est le type p, et le second type de conductivité est le type n.

6. Photodiode selon la revendication 1, dans laquelle le premier type de conductivité est le type n, et le second type de conductivité est le type p.

7. Photodiode selon la revendication 1, dans laquelle la région d'oxyde est une région d'isolation de tranchée peu profonde (en anglais « Shallow Trench Isolation » - STI).

8. Photodiode selon la revendication 1, dans laquelle la région d'oxyde est une région d'oxydation locale de silicium (en anglais « Local Oxidation of Silicon » - LOCOS).

9. Procédé de fabrication d'une photodiode selon la revendication 1 comprenant les étapes consistant à :

fournir une couche de substrat (200) de matériau semi-conducteur d'un premier type de conductivité ;

former un puits de matériau semi-conducteur (203) d'un second type de conductivité ayant une partie supérieure et une partie inférieure, la partie inférieure du puits étant disposée dans le substrat et une jonction p-n définie entre elles, le puits et le substrat définissant une région photosensible de ladite photodiode ;

former une région de diffusion du matériau semi-conducteur du second type de conductivité en contact avec le puits, caractérisé en ce que la région de diffusion a une concentration de dopants supérieure à celle du puits pour promouvoir le contact électrique avec le puits ; et

fournir une région d'oxyde de champ (207) couvrant une partie sensible de la partie supérieure du puits, la région d'oxyde permettant le passage d'au moins une partie des signaux optiques incidents dans la région photosensible.

10. Système de capture d'image comprenant:

une interface optique à des fins d'exposition à la lumière incidente,

une matrice de photodiodes (710), chaque photodiode étant conforme à l'une quelconque des revendications 1 à 8,

un convertisseur A/N couplé à la matrice de capteurs, une unité de traitement de signaux numériques couplée à l'unité de conversion A/N pour traiter et compresser les données numériques reçues de l'unité de conversion A/N afin de produire une image détectée, et

une unité de stockage couplée à l'unité de traitement numérique pour stocker l'image détectée.

11. Système selon la revendication 10, dans lequel les photodiodes sont agencées en rangées et colonnes et il est en outre fourni une pluralité de décodeurs/pilotes de rangée (707) couplés aux photodiodes pour générer un signal de sélection de rangée pour une rangée de photodiodes, et un décodeur de colonne (703) couplé aux photodiodes pour décoder une colonne des photodiodes.

Drawing