(19)
(11) EP 1 026 657 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
19.06.2002 Bulletin 2002/25

(43) Date of publication A2:
09.08.2000 Bulletin 2000/32

(21) Application number: 00300444.7

(22) Date of filing: 21.01.2000
(51) International Patent Classification (IPC)7G09G 3/36, G09G 3/20
(84) Designated Contracting States:
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
Designated Extension States:
AL LT LV MK RO SI

(30) Priority: 04.02.1999 GB 9902343

(71) Applicants:
  • SHARP KABUSHIKI KAISHA
    Osaka 545-8522 (JP)
  • THE SECRETARY OF STATE FOR DEFENCE in Her Britannic Majesty's Gvmnt. of the United Kingdom of Great Britain & Northern Ireland
    Farnborough, Hampshire GU14 0LX (GB)

(72) Inventors:
  • Graham, Alistair
    Powick, Worcestershire WR2 4QR (GB)
  • Hughes, Jonathan Rennie
    St Johns, Worcestershire WR2 4JW (GB)

(74) Representative: Harding, Richard Patrick et al
Marks & Clerk, 4220 Nash Court, Oxford Business Park South
Oxford OX4 2RU
Oxford OX4 2RU (GB)

   


(54) Addressable matrix arrays


(57) A ferroelectric liquid crystal display panel 10 comprises a layer of ferroelectric liquid crystal material contained between two substrates and bearing first and second electrode structures on their inside surfaces. The first and second electrode structures comprise respectively a series of row and column electrode tracks 4 and 5 which cross one another to form a matrix array of switching elements. The addressing of the switching elements is controlled by a data signal generator 14 and a strobe signal generator 15 by applying data waveforms in parallel to the column electrode tracks 41, 42..4n and by sequentially applying a strobe waveform to the row electrode tracks 51, 52..5m so as to switch selected switching elements along each row from one state to another. In order to compensate for differential waveform distortion across the display due to the effects of the different electrode track resistances seen at each column driver input, the data signal generator 14 is coupled to the column electrode tracks by compensating resistances R1, R2, R3, etc. having resistance values which vary from the first to the last columns. It is therefore possible to substantially equalise the picture quality across the display, and to ensure that temperature variations across the display caused by the different power components of the different waveforms are substantially equalised.







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