(19)
(11) EP 1 107 064 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
29.12.2004 Bulletin 2004/53

(43) Date of publication A2:
13.06.2001 Bulletin 2001/24

(21) Application number: 00125392.1

(22) Date of filing: 04.12.2000
(51) International Patent Classification (IPC)7G03F 7/20
(84) Designated Contracting States:
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR
Designated Extension States:
AL LT LV MK RO SI

(30) Priority: 06.12.1999 JP 34675399
14.12.1999 JP 35476299

(71) Applicant: Olympus Optical Co., Ltd.
Tokyo (JP)

(72) Inventors:
  • Yamada, Hidetoshi
    Tokyo (JP)
  • Kikuchi, Susumu
    Hachioji-shi, Tokyo (JP)
  • Kitahara, Toshihiro
    Tachikawa-shi, Tokyo (JP)
  • Fukuyama, Hiroya
    Sagamihara-shi, Kanagawa (JP)
  • Nagasaki, Tatsuo
    Yokohama-shi, Kanagawa (JP)

(74) Representative: Käck, Jürgen, Dipl.-Ing. 
Kahler Käck Mollekopf Patentanwälte Vorderer Anger 239
86899 Landsberg
86899 Landsberg (DE)

   


(54) Exposure apparatus


(57) The exposure apparatus is one that is arranged to project one unit of circuit pattern onto the surface of a resist on a substrate to be manufactured and to expose it over the surface of this resist. The exposure apparatus thereby includes processing means that enables forming a high-resolution circuit pattern image on the substrate by the use of image display means able to ensure a wide display region without deteriorating the resolution and that when dividing the one unit of circuit pattern into a plurality of regions in order to ensure an inexpensive, reliable exposure operation divides it so that adjacent ones of the divided regions may partly overlap each other, exposure means that has equipped therein a plurality of optical systems each of that projects one of a plurality of the divided regions onto the surface of the resist on the substrate, and control means that using the exposure means causes a plurality of the divided regions to be simultaneously projected on the surface of the resist in such a way as to cause duplex regions between the adjacent regions to overlap each other on the surface of the resist on the substrate to thereby cause the one unit of circuit pattern image to be formed on the surface of the resist on the substrate.







Search report